Additional Resources
--------------------

*************************
Document Revision History
*************************

The following table shows the revision history for this document.

+--------------+----------+----------------------------------------------------------------------------------+
|     Date     | Revision |  Notes                                                                           |
+==============+==========+==================================================================================+
| Feb 01, 2021 |      1.0 | Genesis                                                                          |
+--------------+----------+----------------------------------------------------------------------------------+
| Mar 05, 2021 |      1.1 | Fix typos; Add FPGA flash commands; Expand CSDR response                         |
+--------------+----------+----------------------------------------------------------------------------------+
| Apr 01, 2021 |      1.2 | Fix typos; Fix SMBus recap commands; Fix CSDR response                           |
+--------------+----------+----------------------------------------------------------------------------------+
| Apr 19, 2021 |      1.3 | Fix typos; Edit CSDR response, Add SC flash & FPGA flash read back commands      |
+--------------+----------+----------------------------------------------------------------------------------+

Xilinx Resources
~~~~~~~~~~~~~~~~


For support resources such as Answers, Documentation, Downloads, and
Forums, see `Xilinx <https://www.xilinx.com/support>`__
`Support <https://www.xilinx.com/support>`__.

Documentation Navigator and Design Hubs
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


Xilinx® Documentation Navigator (DocNav) provides access to Xilinx
documents, videos, and support resources, which you can filter and
search to find information. To open DocNav:

-  From the Vivado® IDE, select **Help → Documentation and Tutorials**.

-  On Windows, select **Start → All Programs → Xilinx Design Tools →
   DocNav**.

-  At the Linux command prompt, enter docnav.

Xilinx Design Hubs provide links to documentation organized by
design tasks and other topics, which you can use to learn key
concepts and address frequently asked questions. To access the
Design Hubs:

-  In DocNav, click the **Design Hubs View** tab.

-  On the Xilinx website, see the `Design
   Hubs <https://www.xilinx.com/cgi-bin/docs/ndoc?t=design%2Bhubs>`__
   page.

***Note*:** For more information on DocNav, see the `Documentation
Navigator <https://www.xilinx.com/cgi-bin/docs/rdoc?t=docnav>`__
page on the Xilinx website.

References
~~~~~~~~~~

These documents provide supplemental material useful with this guide:

1.  `*Intelligent Platform Management Interface FRU
    Specification* <https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/ipmi-platform-mgt-fru-info-storage-def-v1-0-rev-1-3-spec-update.pdf>`__

2.  *Alveo FRU Data Specification*
    (`UG1378 <https://www.xilinx.com/cgi-bin/docs/bkdoc?k=accelerator-cards%3Bd%3Dug1378-alveo-fru-data-specification.pdf>`__)

3.  `*PLDM base
    specification* <https://www.dmtf.org/sites/default/files/standards/documents/DSP0240_1.0.0.pdf>`__

4.  `*PLDM for platform monitoring and control
    specification* <https://www.dmtf.org/sites/default/files/standards/documents/DSP0248_1.1.1.pdf>`__

5.  `*SMBus 2.0 Specification* <http://smbus.org/specs/smbus20.pdf>`__

6.  `*MCTP SMBus/I2C Transport Binding
    Specification* <https://www.dmtf.org/sites/default/files/standards/documents/DSP0237_1.1.0.pdf>`__

7.  *Alveo U200 and U250 Data Center Accelerator Cards Data Sheet*
    (`DS962 <https://www.xilinx.com/cgi-bin/docs/ndoc?t=data_sheets%3Bd%3Dds962-u200-u250.pdf>`__)

8.  *Alveo U280 Data Center Accelerator Cards Data Sheet*
    (`DS963 <https://www.xilinx.com/cgi-bin/docs/ndoc?t=data_sheets%3Bd%3Dds963-u280.pdf>`__)

9.  *Alveo U50 Data Center Accelerator Cards Data Sheet*
    (`DS965 <https://www.xilinx.com/cgi-bin/docs/ndoc?t=data_sheets%3Bd%3Dds965-u50.pdf>`__)

10. `MSP432P4xx SimpleLink™ Microcontrollers Bootloader
    (BSL) <http://www.ti.com/lit/ug/slau622i/slau622i.pdf>`__

11. *UltraScale Architecture Configuration User Guide*
    `(UG570) <https://www.xilinx.com/support/documentation/user_guides/ug570-ultrascale-configuration.pdf>`__

12. *Zynq UltraScale+ Device Technical Reference Manual*
    `(UG1085) <https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf>`__

**AMD Support**

For support resources such as answers, documentation, downloads, and forums, see the `Alveo Accelerator Cards AMD/Xilinx Community Forum <https://forums.xilinx.com/t5/Alveo-Accelerator-Cards/bd-p/alveo>`_.

**License**

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License.

You may obtain a copy of the License at
`http://www.apache.org/licenses/LICENSE-2.0 <http://www.apache.org/licenses/LICENSE-2.0>`_

All images and documentation, including all debug and support documentation, are licensed under the Creative Commons (CC) Attribution 4.0 International License (the "CC-BY-4.0 License"); you may not use this file except in compliance with the CC-BY-4.0 License.

You may obtain a copy of the CC-BY-4.0 License at
`https://creativecommons.org/licenses/by/4.0/ <https://creativecommons.org/licenses/by/4.0/>`_

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.


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