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Embedded Design Tutorials
2020.2
Versal ACAP Embedded Design Tutorial
Introduction
Getting Started
Versal ACAP CIPS and NoC (DDR) IP Core Configuration
Debugging Using the Vitis Software Platform
Boot and Configuration
System Design Example using Scalar Engine and Adaptable Engine
System Design Example for High-Speed Debug Port with SmartLynq+ Module
Appendix: Creating the PLM
Versions
Master
Embedded Design Tutorials
»
Index
Index
Last updated on January 29, 2021.