Acceleration Kernels¶
This section covers details about how to build the HLS/RTL acceleration kernels. The kernels are HLS code that can be built using Vitis HLS and the compiled kernels are provided as .xo files. These compiled kernels then can be used with any Vitis platform.
Building Kernels¶
Follow the steps mentioned below to build the kernel. These are mostly applicable for building any HLS kernel.
Setup the Vitis HLS 2022.1 software. Refer to Vitis Software Development Platform 2022.1.
Edit the makefile to point the PLATFORM_FILE to any Vitis 2022.1 platform.
Edit the options in <kernel_folder>/kernel_config.h.
Make <kernel name>.
Image Processing Kernel¶
Image-processing Kernel is capable of hardware accelerated resizing, color space conversion and cropping of region of interest in a frame. VVAS releases full HLS source code of the Image-processing 2.0 IP/Kernel.
Kernel Configuration¶
Image-processing IP is highly configurable and supports several features. All applications may not need all the features. Keeping all the features enabled results in lots of FPGA resources being consumed. Hence it is recommended to enable only those features that are required for your applications. The image-processing kernel configuration can be edited by changing the <VVAS_SOURCES>/vvas-accel-hw/image_processing/image_processing_config.h file. The parameters in the following table can be changed as required.
Table 14: Image-Processing Kernel Configuration
Parameter Macro |
Possible Values |
Description |
|---|---|---|
H SC_SAMPLES_PER_CLOCK |
1, 2, 4 |
Pixels per clock |
HSC_MAX_WIDTH |
64 to 7680 |
Maximum width of the resolution supported |
HSC_MAX_HEIGHT |
64 to 4320 |
Maximum height of the resolution supported |
HS C_BITS_PER_COMPONENT |
8, 10 |
Bits per component |
HSC_SCALE_MODE |
0: Bilinear 1: Bicubic 2: Polyphase |
Scaling algorithm |
HAS_RGBX8_YUVX8 |
0: Disable 1: Enable |
RGBX8 and YUVX8 color format support |
HAS_YUYV8 |
0: Disable 1: Enable |
YUYV8 color format support |
HAS_RGBA8_YUVA8 |
0: Disable 1: Enable |
RGBA8 and YUVA8 color format support |
HAS_RGBX10_YUVX10 |
0: Disable 1: Enable |
RGBX10 and YUVX10 color format support |
HAS_Y_UV8_Y_UV8_420 |
0: Disable 1: Enable |
Y_UV8 and Y_UV8_420 color format support |
HAS_RGB8_YUV8 |
0: Disable 1: Enable |
RGB8 and YUV8 color format support |
H AS_Y_UV10_Y_UV10_420 |
0: Disable 1: Enable |
Y_UV10 and Y_UV10_420 color format support |
HAS_Y8 |
0: Disable 1: Enable |
Y8 color format support |
HAS_Y10 |
0: Disable 1: Enable |
Y10 color format support |
HAS_BGRA8 |
0: Disable 1: Enable |
BGRA8 color format support |
HAS_BGRX8 |
0: Disable 1: Enable |
BGRX8 color format support |
HAS_UYVY8 |
0: Disable 1: Enable |
UYVY8 color format support |
HAS_BGR8 |
0: Disable 1: Enable |
BGR8 color format support |
HAS_R_G_B8 |
0: Disable 1: Enable |
R_G_B8 color format support |
HAS_Y_U_V8_420 |
0: Disable 1: Enable |
Y_U_V8_420 color format support |
Steps to Build Kernel¶
Source the Vitis HLS 2022.2 software.
Edit the makefile to point the PLATFORM_FILE, (.xpfm) file, to any Vitis 2022.2 platform (tested using the ZCU104 base platform).
Edit the options in the image_processing/image_processing_config.h.
Make image_processing.xo. The generated output will be in the xo folder as xo/ image_processing.xo.