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Vitis AI User Guides / DPU Product Guides
=========================================

.. list-table:: Developer User Guides
   :widths: 30 70
   :header-rows: 1

   * - Document Title
     - Description

   * - `Vitis AI User Guide (UG1414) <https://docs.xilinx.com/r/en-US/ug1414-vitis-ai>`__
     - Describes the Vitis™ AI Development Kit, a full-stack deep learning SDK for the Deep-learning Processor Unit (DPU).

   * - `Vitis AI Optimizer User Guide (UG1333) <https://docs.xilinx.com/r/en-US/ug1333-ai-optimizer>`__
     - Describes the process of leveraging the Vitis AI Optimizer to prune neural networks for deployment.

   * - `Vitis AI Library User Guide (UG1354) <https://docs.xilinx.com/r/en-US/ug1354-xilinx-ai-sdk>`__
     - Documents libraries that simplify and enhance the deployment of models in Vitis AI.


.. list-table:: DPU IP Product Guides
   :widths: 70 30
   :header-rows: 1

   * - Supported Platform
     - Product Guide

   * - Zynq® Ultrascale+™, Kria™	Versal® Embedded, Alveo™, ZCU102, ZCU104, K26 SOM
     - `DPUCZDX8G (PG338) <https://docs.xilinx.com/r/en-US/pg338-dpu>`__

   * - Versal Edge VEK280
     - `Early access <https://www.xilinx.com/member/vitis-ai-vek280.html>`__
	 
   * - Versal Embedded VCK190
     - `DPUCVDX8G (PG389) <https://docs.xilinx.com/r/en-US/pg389-dpucvdx8g>`__

   * - Alveo V70
     - `Early access <https://www.xilinx.com/member/v70.html#vitis_ai>`__

   * - 16nm DDR U200,U250
     - `DPUCADF8H (PG400) <https://docs.xilinx.com/r/en-US/pg400-dpucadf8h>`__

   * - Alveo 16nm HBM U280, U55C, U50, U50LV
     - `DPUCAHX8H (PG367) <https://docs.xilinx.com/r/en-US/pg367-dpucahx8h>`__

   * - Alveo 16nm HBM U280, U50LV
     - `DPUCAHX8L (PG366) <https://docs.xilinx.com/r/en-US/pg366-dpucahx8l>`__

   * - Versal VCK5000
     - `DPUCVDX8H (PG403) <https://docs.xilinx.com/r/en-US/pg403-dpucvdx8h>`__