AI Engine Debug Walkthrough Tutorial - From Simulation to Hardware |
AI Engine Source Code Debug on Hardware |
The following showcase the features:
Limitations of Source Code Debug on Hardware
Source Code Debug on Hardware¶
Step 1. Setup Connection to the Hardware Board¶
Step 1.1. Target Connection Setup¶
Run hardware server from computer that connects to target board¶
Launch hw_server from the computer that has JTAG connection to the VCK190 board.
Step 1.2. Vitis IDE Setup¶
Create debug target connection from Vitis™ IDE.
Step 1.3. Target Connection Verification¶
Step 2. Debug Project in Vitis IDE¶
Step 2.1. Target Preparation¶
Make sure that sd_card is burn with expected binaries.
Plug-in sd_card into SD card slot and power up the board.
After board boots up, click on Debug to launch debugger.
Note: The sd_card.img
at Hardware/package/sd_card.img
is the file for regular use. sd_card.img
at Hardware/package_aie_debug
is for debug run on board.
Step 2.2. Launch debugger¶
Launch PS application with xclbin (or PS application expected variables), so it is ready to be debugged.
After PS application is running and waiting to be debugged, launch Vitis IDE debugger.
Debugger launched, expected to see AI Engine cores, source code window that allows debug (step-into, step-through, step-return), variables view, breakpoint view, register view. Application is ready to be debugged.
From Vitis IDE, the application is being debugged during run time.
From Vitis IDE, click on resume for all AI Engine cores, and final “TEST PASSED” is displayed.
Limitations of Source Code Debug on Hardware¶
There are maximum four breakpoints available for each tile. One of these four breakpoints is assigned to first line of main() by default and can be cleared and then assigned to other lines during debug.
Due to compiler,
-O0
option is not supported, non-sequential execution when stepping through source code is expected.If an individual kernel is highlighted, select resume button to continue execution until next breakpoint or blocked to wait for I/O. If the beamformer design is highlighted, select resume button to resume all kernels execution until meet each kernel’s breakpoint or blocked waiting for each kernel’s I/O operation.
Due to compiler optimization, some variables’ values are stored in registers. “N/A” is shown in variables view for those optimized variables’ values. Limitations from AI Engine debug with AIE emulator applies.
printf()
is not supported in hardware debug.
Support¶
GitHub issues will be used for tracking requests and bugs. For questions go to support.xilinx.com.
License¶
Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
XD005 | © Copyright 2021 Xilinx, Inc.