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Vitis Accel Examples
2020.2

Table of Contents

  • Prerequisites
  • Supported Shells
  • Compilation and Execution

Category of Examples

  • Hello World
  • AIE Examples
  • Host
    • Concurrent Kernel Execution
    • Copy Buffer
    • Data Transfer
    • Device Query (CPP)
    • Debug Profile
    • Error Handling
    • Error Handling (CPP)
    • HBM Bandwidth
    • HBM Bandwidth - Pseudo Random Ethash
    • HBM Simple
    • HBM Large Buffers
    • HBM Bandwidth for large buffers using RAMA IP
    • Host Global Bandwidth
    • IOPS Test
    • Multiple Compute Units (Asymmetrical)
    • Multiple Compute Units
    • Overlap Host and Kernel
    • P2P Simple Example
    • P2P bandwidth Example
    • P2P overlap bandwidth Example
    • P2P FPGA to FPGA Example
    • P2P FPGA to FPGA Bandwidth Example
    • Slave Bridge Simple
    • Slave Bridge Bandwidth
    • Slave Bridge Copy Buffer
    • Slave Bridge Copy Kernel
    • Stream Free Running Kernel (HLS C/C++)
    • Control and Status Register access continuously streaming kernel (HLS C/C++)
    • Device Only Buffer
    • Stream Kernel to Kernel Memory Mapped
  • C++ Kernels
  • Demos
  • Emulation Examples
  • Library Examples
  • System Optimization Kernels
  • RTL Kernels
  • OpenCL Kernels
  • Validate

Common Utilities

  • Common Files

Versions

  • Master (2020.2)
  • Previous Versions

This Page

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Vitis Accel Examples
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  • Host
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HostΒΆ

OpenCL host code for optimized interfacing with Xilinx Devices.

List of Examples

  • Concurrent Kernel Execution
  • Copy Buffer
  • Data Transfer
  • Device Query (CPP)
  • Debug Profile
  • Error Handling
  • Error Handling (CPP)
  • HBM Bandwidth
  • HBM Bandwidth - Pseudo Random Ethash
  • HBM Simple
  • HBM Large Buffers
  • HBM Bandwidth for large buffers using RAMA IP
  • Host Global Bandwidth
  • IOPS Test
  • Multiple Compute Units (Asymmetrical)
  • Multiple Compute Units
  • Overlap Host and Kernel
  • P2P Simple Example
  • P2P bandwidth Example
  • P2P overlap bandwidth Example
  • P2P FPGA to FPGA Example
  • P2P FPGA to FPGA Bandwidth Example
  • Slave Bridge Simple
  • Slave Bridge Bandwidth
  • Slave Bridge Copy Buffer
  • Slave Bridge Copy Kernel
  • Stream Free Running Kernel (HLS C/C++)
  • Control and Status Register access continuously streaming kernel (HLS C/C++)
  • Device Only Buffer
  • Stream Kernel to Kernel Memory Mapped
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