ChipScoPy Overview

ChipScoPy is an open-source Python project that enables communication with and control of Xilinx hardware debug solutions. Users are able to program designs and begin debugging in a few simple steps. Client Python scripts have access to a rich API for hardware interaction. The main features of the ChipScoPy package are:

• Device detection, programming, and status

• Memory subsystems support

• Fabric Debug Core support

  • Integrated Logic Analyzer (ILA)

  • Virtual Input Output (VIO)

• Hardened Core support

  • DDR Memory Controller (DDRMC)

  • Integrated Bit Error Ratio Tester (IBERT)

  • System Monitor (SysMon)

  • Network on Chip Performance Monitor (NoC PerfMon)

  • PCI Express (PCIe)

Note

ChipScoPy ILA and VIO support is not available for UltraScale+ devices.

When to use ChipScoPy API vs. Vivado Lab Edition?

Vivado Lab Edition is best for:

• Interactive GUI-based debugging of Versal design running in HW

• Ultrascale+ debug support

ChipScoPy API is best for:

• Integrating Versal HW test into lab and/or mfg test environments

• Leveraging third-party and open-source packages

• A lightweight, user-customizable flow

• Creating custom demos

• Integrating into 3rd party EDA and/or T&M applications