QDMA Features

QDMA Windows Driver supports the following list of features

QDMA Hardware Features

  • SRIOV with 4 Physical Functions (PF) and 252 Virtual Functions (VF)

  • Memory Mapped (MM) and Stream (ST) interfaces per queue

  • 2048 queue sets

    • 2048 H2C (Host-to-Card) descriptor rings

    • 2048 C2H (Card-to-Host) descriptor rings

    • 2048 completion rings

  • Supports MSI-X Interrupts

    • 2048 MSI-X vectors.

    • Up to 32 MSI-X per function.

    • Interrupt Aggregation

    • User Interrupts

    • Error Interrupts

  • Mailbox communication between PF and VF

  • HW Error reporting

  • Immediate data transfers

  • Streaming H2C to C2H and C2H to H2C loopback support

  • Configuring queues in internal mode or bypass mode

  • Dynamic queue configuration

  • Descriptor bypass(8, 16, 32 descriptor sizes) support

  • Descriptor Prefetching

  • Completion ring descriptors of 8, 16, 32 bytes sizes

  • ECC support

Features Supported only in QDMA3.1 Designs

  • Interrupt support for Mailbox events

  • Flexible interrupt allocation between PF and VF

  • Zero byte transfers

  • Streaming C2H completion entry coalescing

  • Disabling overflow check in completion ring

  • Completion ring descriptors of 64 bytes sizes

  • Flexible BAR mapping for QDMA configuration register space

For details on Hardware Features refer to QDMA_Product_Guide.

QDMA Software Features

  • Polling and Interrupt Modes

    • Polling Mode

      In Poll Mode, Software polls for the write back completions (Status Descriptor Write Back)

    • Direct Interrupt Mode

      In Direct Interrupt mode, each queue is assigned to one of the available interrupt vectors in a round robin fashion to service the requests. Interrupt is raised by the HW upon receiving the completions and software reads the completion status.

    • Indirect Interrupt Mode

      In Indirect Interrupt mode or Interrupt Aggregation mode, each vector has an associated Interrupt Aggregation Ring. The QID and status of queues requiring service are written into the Interrupt Aggregation Ring. When a PCIe MSI-X interrupt is received by the Host, the software reads the Interrupt Aggregation Ring to determine which queue needs service. Mapping of queues to vectors is programmable

  • Dynamic queue configuration, refer to Interface file, qdma_exports.h (struct queue_config) for configurable parameters

  • Dynamic driver configuration, refer to Interface file, qdma_exports.h

  • Asynchronous and Synchronous IO support

  • Display the Version details for SW and HW

  • Debug mode and Internal only mode support