Data Structures

struct device_info

#include "xvsec_drv.h"

Overview

PCIe device information for verbose option.

Fields

uint16_t vendor_id

PCIe Vendor Identifier

uint16_t device_id

PCIe Device Identifier

uint16_t device_no

PCIe Device number

uint16_t device_fn

PCIe Device function

uint16_t subsystem_vendor

PCIe Subsystem Vendor Identifier

uint16_t subsystem_device

PCIe Subsystem Device Identifier

uint16_t class_id

PCIe Class Identifier

uint32_t is_msi_enabled

Flag which indicates MSI enabled status

uint32_t is_msix_enabled

Flag which indicates MSIx enabled status

int cfg_size

Size of the PCIe Device configuration space

Data Structures

struct axi_cache_attr

#include "xvsec_mcap.h"

Overview

AXI cache and protection settings V2 corresponds to Versal devices.

Fields

uint8_t axi_cache

AXI cache bits

uint8_t axi_prot

AXI protection bits

unnamed-struct v2

AXI cache attributes for Versal Devices

struct axi_reg_data

#include "xvsec_mcap.h"

Overview

AXI register access structure (for Read & Writes) V2 corresponds to Versal devices.

Fields

enum axi_access_mode mode

Holds AXI sub-device operating mode (32 bit /128 bit), 128 bit mode only supported for write operation

uint32_t address

AXI register address

uint32_t data [4]

data field holds the data to write into the provided address for Write operation. Holds the data at the provided address for read operation

unnamed-struct v2

AXI register access parameters for Versal Devices

struct bitstream_file

#include "xvsec_mcap.h"

Overview

XVSEC-MCAP bitstream parameters for programming V1 corresponds to US/US+ devices.

Fields

char* partial_clr_file

Partial clear bitstream file to program ultrascale devices

char* bitstream_file

bitstream file to program

enum bitstream_program_status status

Status of the bitstream programming

unnamed-struct v1

MCAP bitstream parameters for US/US+

struct cfg_data

#include "xvsec_mcap.h"

Overview

Parameters needed to perform MCAP read and writes V1 corresponds to US/US+ devices V2 corresponds to Versal devices.

Fields

char access

access field. ‘b’ for byte access, ‘h’for half word access, ‘w’ for word access

uint16_t offset

VSEC address offset

uint32_t data

data field holds the info to write into the provided offset for Write operation. Holds the info at the provided offset for read operation

unnamed-struct v1

MCAP register read/write parameters for US/US+ and Versal

struct file_download_upload

#include "xvsec_mcap.h"

Overview

File download & upload parameters for sub-devices connected via NOC V2 corresponds to Versal devices.

Fields

enum axi_access_mode mode

Holds AXI sub-device operating mode (32 bit / 128 bit), 128 bit mode only supported for write operation

enum axi_address_type addr_type

Holds address type (fixed or increment )

uint32_t address

Holds address from where download/upload should happen

char* file_name

File to download/upload

size_t length

Data length read in bytes (for upload option)

enum data_transfer_mode tr_mode

data transfer mode

uint32_t sbi_address

SBI reg block address

enum file_operation_status op_status

File Download/Upload Status

size_t err_index

upload/download failed at byte index

unnamed-struct v2

File download & upload parameters for Versal Devices

struct fpga_cfg_reg

#include "xvsec_mcap.h"

Overview

FPGA configuration parameters to perform read and writes V1 corresponds to US/US+ devices.

Fields

uint16_t offset

FPGA configuration register number

uint32_t data

data field holds the info to write into the provided offset for Write operation. Holds the info at the provided offset for read operation

unnamed-struct v1

FPGA configuration parameters for US/US+ Devices

struct fpga_cfg_regs

#include "xvsec_mcap.h"

Overview

FPGA configuration register set(See UG570 for more information) V1 corresponds to US/US+ devices.

Fields

uint32_t valid

Valid flag to indicate registers validity

uint32_t crc

CRC Register

uint32_t far

Frame Address Register

uint32_t fdri

Frame Data Register, Input Register (write configuration data)

uint32_t fdro

Frame Data Register, Output Register (read configuration data)

uint32_t cmd

Command Register

uint32_t ctl0

Control Register 0

uint32_t mask

Mask Register for CTL0 and CTL1 Registers

uint32_t stat

Status Register

uint32_t lout

Legacy Output Register for Daisy Chain

uint32_t cor0

Configuration Option Register 0

uint32_t mfwr

Multi Frame Write Register

uint32_t cbc

Initial CBC Value Register

uint32_t idcode

Device ID Register

uint32_t axss

User Access Register

uint32_t cor1

Configuration Option Register 1

uint32_t wbstar

Warm Boot Start Address Register

uint32_t timer

Watchdog Timer Register

uint32_t scratchpad

Scratch Pad Register for Dummy Read and Writes

uint32_t bootsts

Boot History Status Register

uint32_t ctl1

Control Register 1

uint32_t bspi

BPI/SPI Configuration Options Register

unnamed-struct v1

FPGA configuration register for US/US+ Devices

struct mcap_regs

#include "xvsec_mcap.h"

Overview

MCAP register set V1 corresponds to US/US+ devices V2 corresponds to Versal devices.

Fields

uint32_t valid

Valid flag to indicate registers validity

uint32_t ext_cap_header

Extended capability header register

uint32_t vendor_header

Vendor Specific header register

uint32_t fpga_jtag_id

FPGA JTAG ID register

uint32_t fpga_bit_ver

FPGA bit-stream version register

uint32_t status_reg

Status Register

uint32_t control_reg

Control Register

uint32_t wr_data_reg

Write Data Register

uint32_t rd_data_reg [4]

Read Data Register: 4 data words

Read Data Register

unnamed-struct v1

MCAP register sets for US/US+ device

uint32_t address_reg

RW Address register

unnamed-struct v2

MCAP register sets for Versal device