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emaclite
Vitis Drivers API Documentation
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emaclite
Vitis Drivers API Documentation
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Macros | |
| #define | XEL_TXBUFF_OFFSET (0x00000000) |
| Register offsets for the Ethernet MAC. More... | |
| #define | XEL_MDIOADDR_OFFSET (XEL_TXBUFF_OFFSET + 0x07E4) |
| MDIO Address offset register. More... | |
| #define | XEL_MDIOWR_OFFSET (XEL_TXBUFF_OFFSET + 0x07E8) |
| MDIO write data register offset. More... | |
| #define | XEL_MDIORD_OFFSET (XEL_TXBUFF_OFFSET + 0x07EC) |
| MDIO read data register offset. More... | |
| #define | XEL_MDIOCNTR_OFFSET (XEL_TXBUFF_OFFSET + 0x07F0) |
| MDIO Control Register offset. More... | |
| #define | XEL_GIER_OFFSET (XEL_TXBUFF_OFFSET + 0x07F8) |
| Offset for the GIE Register. More... | |
| #define | XEL_TSR_OFFSET (XEL_TXBUFF_OFFSET + 0x07FC) |
| Tx status. More... | |
| #define | XEL_TPLR_OFFSET (XEL_TXBUFF_OFFSET + 0x07F4) |
| Tx packet length. More... | |
| #define | XEL_RXBUFF_OFFSET (0x00001000) |
| Receive Buffer. More... | |
| #define | XEL_RSR_OFFSET (XEL_RXBUFF_OFFSET + 0x07FC) |
| Rx status. More... | |
| #define | XEL_RPLR_OFFSET (XEL_RXBUFF_OFFSET + 0x0C) |
| Rx packet length. More... | |
| #define | XEL_MAC_HI_OFFSET (XEL_TXBUFF_OFFSET + 0x14) |
| MAC address hi offset. More... | |
| #define | XEL_MAC_LO_OFFSET (XEL_TXBUFF_OFFSET) |
| MAC address lo offset. More... | |
| #define | XEL_BUFFER_OFFSET (0x00000800) |
| Next buffer's offset same for both TX and RX. More... | |
| #define | XEL_MDIO_ADDRESS_MASK 0x00003E0 |
| MDIO Address/Write Data/Read Data Register Bit Masks. More... | |
| #define | XEL_MDIO_ADDRESS_SHIFT 0x5 |
| PHY Address shift. More... | |
| #define | XEL_MDIO_OP_MASK 0x00000400 |
| PHY read access. More... | |
| #define | XEL_MDIOCNTR_STATUS_MASK 0x00000001 |
| MDIO Control Register Bit Masks. More... | |
| #define | XEL_MDIOCNTR_ENABLE_MASK 0x00000008 |
| MDIO Enable. More... | |
| #define | XEL_GIER_GIE_MASK 0x80000000 |
| Global Interrupt Enable Register (GIER) Bit Masks. More... | |
| #define | XEL_TSR_XMIT_BUSY_MASK 0x00000001 |
| Transmit Status Register (TSR) Bit Masks. More... | |
| #define | XEL_TSR_PROGRAM_MASK 0x00000002 |
| Program the MAC address. More... | |
| #define | XEL_TSR_XMIT_IE_MASK 0x00000008 |
| Xmit interrupt enable bit. More... | |
| #define | XEL_TSR_LOOPBACK_MASK 0x00000010 |
| Loop back enable bit. More... | |
| #define | XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 |
| Buffer is active, SW bit only. More... | |
| #define | XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) |
| define for programming the MAC address into the EmacLite More... | |
| #define | XEL_RSR_RECV_DONE_MASK 0x00000001 |
| Receive Status Register (RSR) More... | |
| #define | XEL_RSR_RECV_IE_MASK 0x00000008 |
| Recv interrupt enable bit. More... | |
| #define | XEL_TPLR_LENGTH_MASK_HI 0x0000FF00 |
| Transmit Packet Length Register (TPLR) More... | |
| #define | XEL_TPLR_LENGTH_MASK_LO 0x000000FF |
| Transmit packet length lower byte. More... | |
| #define | XEL_RPLR_LENGTH_MASK_HI 0x0000FF00 |
| Receive Packet Length Register (RPLR) More... | |
| #define | XEL_RPLR_LENGTH_MASK_LO 0x000000FF |
| Receive packet length lower byte. More... | |
| #define | XEL_HEADER_SIZE 14 |
| Size of header in bytes. More... | |
| #define | XEL_MTU_SIZE 1500 |
| Max size of data in frame. More... | |
| #define | XEL_FCS_SIZE 4 |
| Size of CRC. More... | |
| #define | XEL_HEADER_OFFSET 12 |
| Offset to length field. More... | |
| #define | XEL_HEADER_SHIFT 16 |
| Right shift value to align length. More... | |
| #define | XEL_MAX_FRAME_SIZE (XEL_HEADER_SIZE+XEL_MTU_SIZE+ XEL_FCS_SIZE) |
| Max length of Rx frame used if length/type field contains the type (> 1500) More... | |
| #define | XEL_MAX_TX_FRAME_SIZE (XEL_HEADER_SIZE + XEL_MTU_SIZE) |
| Max length of Tx frame. More... | |
| #define | XEL_MAC_ADDR_SIZE 6 |
| length of MAC address More... | |
| #define | XEL_ETHER_PROTO_TYPE_IP 0x0800 |
| IP Protocol. More... | |
| #define | XEL_ETHER_PROTO_TYPE_ARP 0x0806 |
| ARP Protocol. More... | |
| #define | XEL_ETHER_PROTO_TYPE_VLAN 0x8100 |
| VLAN Tagged. More... | |
| #define | XEL_ARP_PACKET_SIZE 28 |
| Max ARP packet size. More... | |
| #define | XEL_HEADER_IP_LENGTH_OFFSET 16 |
| IP Length Offset. More... | |
| #define | XEL_VLAN_TAG_SIZE 4 |
| VLAN Tag Size. More... | |
| #define | XEmacLite_ReadReg(BaseAddress, RegOffset) XEmacLite_In32((BaseAddress) + (RegOffset)) |
| Read from the specified EmacLite device register. More... | |
| #define | XEmacLite_WriteReg(BaseAddress, RegOffset, RegisterValue) XEmacLite_Out32((BaseAddress) + (RegOffset), (RegisterValue)) |
| Write to the specified EmacLite device register. More... | |
| #define | XEmacLite_GetTxStatus(BaseAddress) (XEmacLite_ReadReg((BaseAddress), XEL_TSR_OFFSET)) |
| Get the Tx Status Register Contents. More... | |
| #define | XEmacLite_SetTxStatus(BaseAddress, Data) (XEmacLite_WriteReg((BaseAddress), XEL_TSR_OFFSET, (Data))) |
| Set the Tx Status Register Contents. More... | |
| #define | XEmacLite_GetRxStatus(BaseAddress) (XEmacLite_ReadReg((BaseAddress), XEL_RSR_OFFSET)) |
| Get the Rx Status Register Contents. More... | |
| #define | XEmacLite_SetRxStatus(BaseAddress, Data) (XEmacLite_WriteReg((BaseAddress), XEL_RSR_OFFSET, (Data))) |
| Set the Rx Status Register Contents. More... | |
| #define | XEmacLite_IsTxDone(BaseAddress) |
| Check to see if the transmission is complete. More... | |
| #define | XEmacLite_IsRxEmpty(BaseAddress) |
| Check to see if the receive is empty. More... | |
Functions | |
| void | XEmacLite_SendFrame (UINTPTR BaseAddress, u8 *FramePtr, unsigned ByteCount) |
| Send an Ethernet frame. More... | |
| u16 | XEmacLite_RecvFrame (UINTPTR BaseAddress, u8 *FramePtr) |
| Receive a frame. More... | |