llfifo
Vitis Drivers API Documentation
xllfifo_hw.h File Reference

Macros

#define XLlFifo_ReadReg(BaseAddress, RegOffset)   (Xil_In32((BaseAddress) + (RegOffset)))
 XLlFifo_ReadReg returns the value of the register at the offet, RegOffset, from the memory mapped base address, BaseAddress. More...
 
#define XLlFifo_WriteReg(BaseAddress, RegOffset, Value)   ((Xil_Out32((BaseAddress) + (RegOffset), (Value))))
 XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress. More...
 
Registers
#define XLLF_ISR_OFFSET   0x00000000
 Interrupt Status. More...
 
#define XLLF_IER_OFFSET   0x00000004
 Interrupt Enable. More...
 
#define XLLF_TDFR_OFFSET   0x00000008
 Transmit Reset. More...
 
#define XLLF_TDFV_OFFSET   0x0000000c
 Transmit Vacancy. More...
 
#define XLLF_TDFD_OFFSET   0x00000010
 Transmit Data. More...
 
#define XLLF_AXI4_TDFD_OFFSET   0x00000000
 Axi4 Transmit Data. More...
 
#define XLLF_TLF_OFFSET   0x00000014
 Transmit Length. More...
 
#define XLLF_RDFR_OFFSET   0x00000018
 Receive Reset. More...
 
#define XLLF_RDFO_OFFSET   0x0000001c
 Receive Occupancy. More...
 
#define XLLF_RDFD_OFFSET   0x00000020
 Receive Data. More...
 
#define XLLF_AXI4_RDFD_OFFSET   0x00001000
 Axi4 Receive Data. More...
 
#define XLLF_RLF_OFFSET   0x00000024
 Receive Length. More...
 
#define XLLF_LLR_OFFSET   0x00000028
 Local Link Reset. More...
 
#define XLLF_TDR_OFFSET   0x0000002C
 Transmit Destination. More...
 
#define XLLF_RDR_OFFSET   0x00000030
 Receive Destination. More...
 
Interrupt bits

These bits are associated with the XLLF_IER_OFFSET and XLLF_ISR_OFFSET registers.

#define XLLF_INT_RPURE_MASK   0x80000000
 Receive under-read. More...
 
#define XLLF_INT_RPORE_MASK   0x40000000
 Receive over-read. More...
 
#define XLLF_INT_RPUE_MASK   0x20000000
 Receive underrun (empty) More...
 
#define XLLF_INT_TPOE_MASK   0x10000000
 Transmit overrun. More...
 
#define XLLF_INT_TC_MASK   0x08000000
 Transmit complete. More...
 
#define XLLF_INT_RC_MASK   0x04000000
 Receive complete. More...
 
#define XLLF_INT_TSE_MASK   0x02000000
 Transmit length mismatch. More...
 
#define XLLF_INT_TRC_MASK   0x01000000
 Transmit reset complete. More...
 
#define XLLF_INT_RRC_MASK   0x00800000
 Receive reset complete. More...
 
#define XLLF_INT_TFPF_MASK   0x00400000
 Tx FIFO Programmable Full, AXI FIFO MM2S Only. More...
 
#define XLLF_INT_TFPE_MASK   0x00200000
 Tx FIFO Programmable Empty AXI FIFO MM2S Only. More...
 
#define XLLF_INT_RFPF_MASK   0x00100000
 Rx FIFO Programmable Full AXI FIFO MM2S Only. More...
 
#define XLLF_INT_RFPE_MASK   0x00080000
 Rx FIFO Programmable Empty AXI FIFO MM2S Only. More...
 
#define XLLF_INT_ALL_MASK   0xfff80000
 All the ints. More...
 
#define XLLF_INT_ERROR_MASK   0xf2000000
 Error status ints. More...
 
#define XLLF_INT_RXERROR_MASK   0xe0000000
 Receive Error status ints. More...
 
#define XLLF_INT_TXERROR_MASK   0x12000000
 Transmit Error status ints. More...
 
Reset register values

These bits are associated with the XLLF_TDFR_OFFSET and XLLF_RDFR_OFFSET reset registers.

#define XLLF_RDFR_RESET_MASK   0x000000a5
 receive reset value More...
 
#define XLLF_TDFR_RESET_MASK   0x000000a5
 Transmit reset value. More...
 
#define XLLF_LLR_RESET_MASK   0x000000a5
 Local Link reset value. More...