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srio
Vitis Drivers API Documentation
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srio
Vitis Drivers API Documentation
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Data Structures | |
| struct | XSrio_Config |
| This typedef contains the configuration information for the device. More... | |
| struct | XSrio |
| The XSrio driver instance data. More... | |
Macros | |
| #define | XSRIO_IS_MEMORY 1 |
| Core has physically addressable storage space. More... | |
| #define | XSRIO_IS_PROCESSOR 2 |
| Core has a local processor that runs code. More... | |
| #define | XSRIO_IS_BRIDGE 3 |
| Core can be used as a bridge to another interface. More... | |
| #define | XSRIO_OP_MODE_NREAD 0 |
| Core supports read Operation. More... | |
| #define | XSRIO_OP_MODE_NWRITE 1 |
| Core supports write Operation. More... | |
| #define | XSRIO_OP_MODE_SWRITE 2 |
| Core supports streaming-write Operation. More... | |
| #define | XSRIO_OP_MODE_NWRITE_R 3 |
| Core supports write with Response operation. More... | |
| #define | XSRIO_OP_MODE_DATA_MESSAGE 4 |
| Core supports data message Operation. More... | |
| #define | XSRIO_OP_MODE_DOORBELL 5 |
| Core supports doorbell Operation. More... | |
| #define | XSRIO_OP_MODE_ATOMIC 6 |
| Core supports atomic Operation. More... | |
| #define | XSRIO_PORT_OK 0 |
| Port is initialized. More... | |
| #define | XSRIO_PORT_UNINITIALIZED 1 |
| Port is uninitialized. More... | |
| #define | XSRIO_PORT_HAS_ERRORS 2 |
| Port has errors. More... | |
| #define | XSRIO_DIR_TX 1 |
| Transmit Direction Flag. More... | |
| #define | XSRIO_DIR_RX 2 |
| Receive Direction Flag. More... | |
| #define | XSrio_ReadDeviceVendorID(InstancePtr) |
| XSrio_ReadDeviceVendorID returns the Device Vendor Id of the core. More... | |
| #define | XSrio_ReadDeviceID(InstancePtr) |
| XSrio_ReadDeviceID returns the Device Id of the core. More... | |
| #define | XSrio_ReadAsmVendorID(InstancePtr) |
| XSrio_ReadAsmVendorID returns the Assembly Vendor Id of the core. More... | |
| #define | XSrio_ReadAsmID(InstancePtr) |
| XSrio_ReadAsmID returns the Assembly Id of the SRIO Gen2 core. More... | |
| #define | XSrio_GetExFeaturesPointer(InstancePtr) |
| XSrio_GetExFeaturesPointer gives the pointer to the Phy Register space of the SRIO Gen2 core. More... | |
| #define | XSrio_ReadAsmRevision(InstancePtr) |
| XSrio_ReadAsmRevision returns the Assembly Revision value of the core. More... | |
| #define | XSrio_IsLargeSystem(InstancePtr) |
| XSrio_IsLargeSystem checks whether PE(Processing Element) supports a large system (16-bit Device ids) More... | |
| #define | XSrio_IsCRFSupported(InstancePtr) |
| XSrio_IsCRFSupported checks whether the PE(Processing Element) supports CRF(Critical Request Flow indicator). More... | |
| #define | XSrio_ReadSrcOps(InstancePtr) |
| XSrio_ReadSrcOps returns the Source Operations CAR Register contents. More... | |
| #define | XSrio_ReadDstOps(InstancePtr) |
| XSrio_ReadDstOps returns the Destination Operations CAR Register contents. More... | |
| #define | XSrio_GetLCSBA(InstancePtr) |
| XSrio_GetLCSBA returns the Local Configuration Space Base Address(LCSBA) of the SRIO Gen2 core. More... | |
| #define | XSrio_SetLCSBA(InstancePtr, Value) |
| XSrio_SetLCSBA Configures the Local Configuration Space Base Address of the SRIO Gen2 core. More... | |
| #define | XSrio_GetLargeBaseDeviceID(InstancePtr) |
| XSrio_GetLargeBaseDeviceID returns the 16-bit Device Id for an endpoint in a Large transport system. More... | |
| #define | XSrio_SetLargeBaseDeviceID(InstancePtr, DeviceId) |
| XSrio_SetLargeBaseDeviceID configures the 16-bit Device Id for an endpoint in a Large transport system. More... | |
| #define | XSrio_GetBaseDeviceID(InstancePtr) |
| XSrio_GetBaseDeviceID returns the 8-bit Device Id for an endpoint in a small Transport system. More... | |
| #define | XSrio_SetBaseDeviceID(InstancePtr, DeviceId) |
| XSrio_SetBaseDeviceID configures the 8-bit Device Id for an endpoint in a small transport system. More... | |
| #define | XSrio_GetHostBaseDevID_LockCSR(InstancePtr) |
| XSrio_GetHostBaseDevID_LockCSR returns the Device Id of the system host. More... | |
| #define | XSrio_SetHostBaseDevID_LockCSR(InstancePtr, DeviceId) |
| XSrio_SetHostBaseDevID_LockCSR configures the Host Base Device Id of the SRIO gen2 Core. More... | |
| #define | XSrio_GetComponentTagCSR(InstancePtr) |
| XSrio_GetComponentTagCSR returns the Component Tag Value set by the software during initialization. More... | |
| #define | XSrio_SetComponentTagCSR(InstancePtr, Value) |
| XSrio_SetComponentTagCSR sets the Component Tag Value for SRIO Gen2 core. More... | |
| #define | XSrio_GetExtFeaturesID(InstancePtr) |
| XSrio_GetExtFeaturesID returns the Extended Features Id value. More... | |
| #define | XSrio_GetSerialExtFeaturesPointer(InstancePtr) |
| XSrio_GetSerialExtFeaturesPointer returns the Extended Features Pointer which will point to the next extended features block if one exists. More... | |
| #define | XSrio_GetPortLinkTimeOutValue(InstancePtr) |
| XSrio_GetPortLinkTimeOutValue returns the Port Link Timeout value for the SRIO Gen2 core. More... | |
| #define | XSrio_SetPortLinkTimeOutValue(InstancePtr, Value) |
| XSrio_SetPortLinkTimeOutValue sets the Port Link Timeout value for the SRIO Gen2 core. More... | |
| #define | XSrio_GetPortRespTimeOutValue(InstancePtr) |
| XSrio_GetPortRespTimeOutValue returns the Port Response Timeout value for the the SRIO Gen2 core. More... | |
| #define | XSrio_SetPortRespTimeOutValue(InstancePtr, Value) |
| XSrio_SetPortRespTimeOutValue sets the Port Response Timeout value for the The SRIO Gen2 core. More... | |
| #define | XSrio_IsPEDiscovered(InstancePtr) |
| XSrio_IsPEDiscovered checks whether the PE(Processing Element) is discovered or not. More... | |
| #define | XSrio_SetDiscovered(InstancePtr) |
| XSrio_SetDiscovered configures the device as Discovered so that it is responsible for system exploration. More... | |
| #define | XSrio_IsMasterEnabled(InstancePtr) |
| XSrio_IsMasterEnabled checks whether PE(Processing Element) is allowed to issue request into the system. More... | |
| #define | XSrio_SetMasterEnabled(InstancePtr) |
| XSrio_SetMasterEnabled configures the device so that it is allowed to issue requests into the system. More... | |
| #define | XSrio_IsHost(InstancePtr) |
| XSrio_IsHost checks whether PE(Processing Element) is responsible for system exploration. More... | |
| #define | XSrio_SetHostEnabled(InstancePtr) |
| XSrio_SetHostEnabled configures the device to be responsible for system exploration. More... | |
| #define | XSrio_GetCommand(InstancePtr) |
| XSrio_GetCommand returns the command value that is sent on the Link-request Control symbol of the SRIO Gen2 core. More... | |
| #define | XSrio_SendCommand(InstancePtr, Value) |
| XSrio_SendCommand sends the given command in the link-request control symbol of the SRIO Gen2 core. More... | |
| #define | XSrio_IsResponseValid(InstancePtr) |
| XSrio_IsResponseValid checks whether the link response is valid or not in the SRIO Gen2 Core. More... | |
| #define | XSrio_GetOutboundAckID(InstancePtr) |
| XSrio_GetOutboundAckID returns the value of the next transmitted Ackid of the SRIO Gen2 Core. More... | |
| #define | XSrio_SetOutboundAckID(InstancePtr, Value) |
| XSrio_SetOutboundAckID sets value of the next transmitted Ackid of the SRIO Gen2 Core. More... | |
| #define | XSrio_GetInboundAckID(InstancePtr) |
| XSrio_GetInboundAckID returns the expected Ackid of the next received packet of the SRIO Gen2 core. More... | |
| #define | XSrio_SetInboundAckID(InstancePtr, Value) |
| XSrio_SetInboundAckID sets the value of the next transmitted Ackid of the SRIO Gen2 core. More... | |
| #define | XSrio_ClrOutStandingAckIDs(InstancePtr) |
| XSrio_ClrOutStandingAckIDs clears all outstanding unacknowledged received packets of the SRIO Gen2 core. More... | |
| #define | XSrio_IsEnumerationBoundary(InstancePtr) |
| XSrio_IsEnumerationBoundary checks whether the enumeration boundary is available or not for the SRIO Gen2 core. More... | |
| #define | XSrio_ClrEnumerationBoundary(InstancePtr) |
| XSrio_ClrEnumerationBoundary clears the enumeration boundary of the SRIO Gen2 core. More... | |
| #define | XSrio_GetPortwidthOverride(InstancePtr) |
| XSrio_GetPortwidthOverride returns the port width override value of the SRIO Gen2 core. More... | |
| #define | XSrio_SetPortwidthOverride(InstancePtr, Value) |
| XSrio_SetPortwidthOverride configures the port width override value of the SRIO Gen2 core. More... | |
| #define | XSrio_GetSerialLaneExtFeaturesPointer(InstancePtr) |
| XSrio_GetSerialLaneExtFeaturesPointer returns the extended features pointer For the serial lane which will point to the next extended features block If one exists. More... | |
| #define | XSrio_ClrDecodingErrors(InstancePtr, Lanenum) |
| XSrio_ClrDecodingErrors clears the 8B/10B decoding errors and return Result. More... | |
| #define | XSrio_GetRxSize(InstancePtr) |
| XSrio_GetRxSize returns the number of maximum-size packets the rx buffer holded. More... | |
| #define | XSrio_ForceRxFlowControl(InstancePtr) |
| XSrio_ForceRxFlowControl forces the Tx flow control enabled core to use Rx flow control. More... | |
| #define | XSrio_GetTxSize(InstancePtr) |
| XSrio_GetTxSize returns the number of maximum-size packets the tx buffer holds. More... | |
| #define | XSrio_CheckforTxReqreorder(InstancePtr) |
| XSrio_CheckforTxReqreorder checks whether the transmit buffer has been configured to allow reordering of requests. More... | |
| #define | XSrio_IsTxFlowControl(InstancePtr) |
| XSrio_IsTxFlowControl checks whether the BUF is currently operating in Tx flow control mode or not. More... | |
| #define | XSrio_GetDestinationID(InstancePtr) |
| XSrio_GetDestinationID gets the destination id value which will be used for outgoing maintenance requests. More... | |
| #define | XSrio_SetDestinationID(InstancePtr, Value) |
| XSrio_SetDestinationID sets Device Id which will be used for Outgoing maintenance requests. More... | |
| #define | XSrio_GetCRF(InstancePtr) |
| XSrio_GetCRF checks whether the CRF is enabled in the core or not which will be used for outgoing maintenance requests. More... | |
| #define | XSrio_SetCRF(InstancePtr) |
| XSrio_SetCRF sets CRF value that is used for outgoing maintenance requests. More... | |
| #define | XSrio_GetPriority(InstancePtr) |
| XSrio_GetPriority priority used for outgoing maintenance requests. More... | |
| #define | XSrio_SetPriority(InstancePtr, Value) |
| XSrio_SetPriority sets the Priority which will be used for outgoing maintenance requests. More... | |
| #define | XSrio_RequestTID(InstancePtr) |
| XSrio_RequestTID gives the transfer id value which will be used for the next outgoing maintenance request. More... | |
| #define | XSrio_SetTID(InstancePtr, Value) |
| XSrio_SetTID sets the transfer id which will be used for the next outgoing maintenance request. More... | |
| #define | XSrio_ClrPortError(InstancePtr, Mask) |
| XSrio_ClrPortError clears the Port Error specified by the Mask. More... | |
| #define | XSrio_GetPortErrorStatus(InstancePtr) |
| XSrio_GetPortErrorStatus returns the mask for the port errors currently enabled in the SRIO Gen2 core. More... | |
| #define | XSrio_SetPortControlStatus(InstancePtr, Mask) |
| XSrio_SetPortControlStatus Configures specific port specified by the Mask. More... | |
| #define | XSrio_GetPortControlStatus(InstancePtr) |
| XSrio_GetPortControlStatus returns the status of the port that is currently enabled in the SRIO Gen2 core. More... | |
| #define | XSrio_ReadReg(BaseAddress, RegOffset) Xil_In32((BaseAddress) + (RegOffset)) |
| Macro to read register. More... | |
| #define | XSrio_WriteReg(BaseAddress, RegOffset, Data) Xil_Out32((BaseAddress) + (RegOffset), (Data)) |
| Macro to write register. More... | |
Typedefs | |
| typedef struct XSrio_Config | XSrio_Config |
| This typedef contains the configuration information for the device. More... | |
| typedef struct XSrio | XSrio |
| The XSrio driver instance data. More... | |
Functions | |
| int | XSrio_CfgInitialize (XSrio *InstancePtr, XSrio_Config *Config, UINTPTR EffectiveAddress) |
| Initialize the XSrio instance provided by the caller based on the given Config structure. More... | |
| int | XSrio_GetPortStatus (XSrio *InstancePtr) |
| XSrio_GetPortStatus will check the status of the port and returns the status of the port to the user. More... | |
| int | XSrio_GetPEType (XSrio *InstancePtr) |
| XSrio_GetPEType API will check for the Processing Element type and return the type of type of Processing Element. More... | |
| int | XSrio_IsOperationSupported (XSrio *InstancePtr, u8 Operation, u8 Direction) |
| XSrio_IsOperationSupported tells whether the operation is supported by the SRIO Gen2 core or not. More... | |
| void | XSrio_SetWaterMark (XSrio *InstancePtr, u8 WaterMark0, u8 WaterMark1, u8 WaterMark2) |
| XSrio_SetWaterMark Configures the watermark to transfer a priority packet. More... | |
| void | XSrio_GetWaterMark (XSrio *InstancePtr, u8 *WaterMark0, u8 *WaterMark1, u8 *WaterMark2) |
| XSrio_GetWaterMark API reads the water mark values. More... | |
| XSrio_Config * | XSrio_LookupConfig (u32 DeviceId) |
| Looks up the device configuration based on the unique device ID. More... | |
Device registers | |
| #define | XSRIO_DEV_ID_CAR_OFFSET 0x00 |
| Capability Address Register Space 0x00-0x3C Registers. More... | |
| #define | XSRIO_DEV_INFO_CAR_OFFSET 0x04 |
| Device Information CAR. More... | |
| #define | XSRIO_ASM_ID_CAR_OFFSET 0x08 |
| Assembly Identity CAR. More... | |
| #define | XSRIO_ASM_INFO_CAR_OFFSET 0x0C |
| Assembly Information CAR. More... | |
| #define | XSRIO_PEF_CAR_OFFSET 0x10 |
| Processing Element Features CAR. More... | |
| #define | XSRIO_SWP_INFO_CAR_OFFSET 0x14 |
| Switch Port Information CAR. More... | |
| #define | XSRIO_SRC_OPS_CAR_OFFSET 0x18 |
| Source operations CAR. More... | |
| #define | XSRIO_DST_OPS_CAR_OFFSET 0x1c |
| Destination operations CAR. More... | |
| #define | XSRIO_PELL_CTRL_CSR_OFFSET 0x4c |
| Command and Status Register Space 0x040-0xFC Registers. More... | |
| #define | XSRIO_LCS0_BASEADDR_CSR_OFFSET 0x58 |
| Local Configuration Space 0 Base Address CSR. More... | |
| #define | XSRIO_LCS1_BASEADDR_CSR_OFFSET 0x5c |
| Local Configuration Space 1 Base Address CSR. More... | |
| #define | XSRIO_BASE_DID_CSR_OFFSET 0x60 |
| Base Device ID CSR. More... | |
| #define | XSRIO_HOST_DID_LOCK_CSR_OFFSET 0x68 |
| Host Base Device ID Lock CSR. More... | |
| #define | XSRIO_COMPONENT_TAG_CSR_OFFSET 0x6c |
| Component Tag CSR. More... | |
| #define | XSRIO_EFB_HEADER_OFFSET 0x100 |
| Extended Feature Register Space 0x0100-0xFFFC Registers. More... | |
| #define | XSRIO_PORT_LINK_TOUT_CSR_OFFSET 0x120 |
| Port Link Timeout CSR. More... | |
| #define | XSRIO_PORT_RESP_TOUT_CSR_OFFSET 0x124 |
| Port Response Timeout CSR. More... | |
| #define | XSRIO_PORT_GEN_CTL_CSR_OFFSET 0x13c |
| General Control CSR. More... | |
| #define | XSRIO_PORT_N_MNT_REQ_CSR_OFFSET 0x140 |
| Port n Link Maintenance Request CSR. More... | |
| #define | XSRIO_PORT_N_MNT_RES_CSR_OFFSET 0x144 |
| Port n Maintenance Response CSR. More... | |
| #define | XSRIO_PORT_N_ACKID_CSR_OFFSET 0x148 |
| Port n Local Ack ID CSR. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_OFFSET 0x158 |
| Port n Error and Status CSR. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_OFFSET 0x15c |
| Port n Control CSR. More... | |
| #define | XSRIO_EFB_LPSL_OFFSET 0x0400 |
| LP-Serial Lane Extended Features offset. More... | |
| #define | XSRIO_SL_HEADER_OFFSET 0x00 |
| Serial Lane Block Header. More... | |
| #define | XSRIO_SLS0_CSR_OFFSET(n) (0x10 + n*0x20) |
| Serial Lane N Status 0 CSR. More... | |
| #define | XSRIO_SLS1_CSR_OFFSET(n) (0x14 + n*0x20) |
| Serial Lane N Status 1 CSR. More... | |
| #define | XSRIO_IMP_WCSR_OFFSET 0x10000 |
| Implementation Defined Space 0x010000 - 0xFFFFFC Registers. More... | |
| #define | XSRIO_IMP_BCSR_OFFSET 0x10004 |
| Buffer Control CSR. More... | |
| #define | XSRIO_IMP_MRIR_OFFSET 0x10100 |
| Maintenance Request Information Register. More... | |
Device Identity CAR bit definitions. | |
These bits are associated with the XSRIO_DEV_ID_CAR_OFFSET register. | |
| #define | XSRIO_DEV_ID_DEVID_CAR_MASK 0xFFFF0000 |
| Device ID Mask. More... | |
| #define | XSRIO_DEV_ID_VDRID_CAR_MASK 0x0000FFFF |
| Device Vendor ID Mask. More... | |
| #define | XSRIO_DEV_ID_DEVID_CAR_SHIFT 16 |
| Device ID shift. More... | |
Device Information CAR bit definitions. | |
These bits are associated with the XSRIO_DEV_INFO_CAR_OFFSET register. | |
| #define | XSRIO_DEV_INFO_CAR_PATCH_MASK 0x0000000F |
| Patch Mask. More... | |
| #define | XSRIO_DEV_INFO_CAR_MINREV_MASK 0x000000F0 |
| Minor Revision Mask. More... | |
| #define | XSRIO_DEV_INFO_CAR_MAJREV_MASK 0x00000F00 |
| Major Revision Mask. More... | |
| #define | XSRIO_DEV_INFO_CAR_DEVREV_MASK 0x000F0000 |
| Device Revision Lable Mask. More... | |
Assembly Identity CAR bit definitions. | |
These bits are associated with the XSRIO_ASM_ID_CAR_OFFSET register. | |
| #define | XSRIO_ASM_ID_CAR_ASMID_MASK 0xFFFF0000 |
| Assembly ID Mask. More... | |
| #define | XSRIO_ASM_ID_CAR_ASMVID_MASK 0x0000FFFF |
| Assembly Vendor ID Mask. More... | |
| #define | XSRIO_ASM_ID_CAR_ASMID_SHIFT 16 |
| Assembly ID Shift. More... | |
Assembly Device Information CAR bit definitions. | |
These bits are associated with the XSRIO_ASM_INFO_CAR_OFFSET register. | |
| #define | XSRIO_ASM_INFO_CAR_ASMREV_MASK 0xFFFF0000 |
| Assembly Revision Mask. More... | |
| #define | XSRIO_ASM_INFO_CAR_EFP_MASK 0x0000FFFF |
| Extended Features Pointer Mask. More... | |
| #define | XSRIO_ASM_INFO_CAR_ASMREV_SHIFT 16 |
| Assembly Revision Shift. More... | |
Processing Element Features CAR bit definitions. | |
These bits are associated with the XSRIO_PEF_CAR_OFFSET register. | |
| #define | XSRIO_PEF_CAR_EAS_MASK 0x00000007 |
| Extended Addressing Support Mask. More... | |
| #define | XSRIO_PEF_CAR_EF_MASK 0x00000008 |
| Extended Features Mask. More... | |
| #define | XSRIO_PEF_CAR_CTS_MASK 0x00000010 |
| Common Transport Large System support Mask. More... | |
| #define | XSRIO_PEF_CAR_CRF_MASK 0x00000020 |
| CRF Support Mask. More... | |
| #define | XSRIO_PEF_CAR_MPORT_MASK 0x08000000 |
| Multi Port Mask. More... | |
| #define | XSRIO_PEF_CAR_SWITCH_MASK 0x10000000 |
| Switch Mask. More... | |
| #define | XSRIO_PEF_CAR_PROCESSOR_MASK 0x20000000 |
| Processor Mask. More... | |
| #define | XSRIO_PEF_CAR_MEMORY_MASK 0x40000000 |
| Memory Mask. More... | |
| #define | XSRIO_PEF_CAR_BRIDGE_MASK 0x80000000 |
| Bridge Mask. More... | |
Source Operations CAR bit definitions. | |
These bits are associated with the XSRIO_SRC_OPS_CAR_OFFSET register and XSRIO_DST_OPS_CAR register. | |
| #define | XSRIO_SRCDST_OPS_CAR_PORT_WRITE_MASK 0x00000004 |
| Port write operation Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_ATOMIC_SWP_MASK 0x00000008 |
| Atomic Swap Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_ATOMIC_CLR_MASK 0x00000010 |
| Atomic Clear Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_ATOMIC_SET_MASK 0x00000020 |
| Atomic Set Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_ATOMIC_DECR_MASK 0x00000040 |
| Atomic Decrement Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_ATOMIC_INCR_MASK 0x00000080 |
| Atomic Increment Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_ATOMIC_TSWP_MASK 0x00000100 |
| Atomic test and swap Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_ATOMIC_CSWP_MASK 0x00000200 |
| Atomic compare and Swap Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_DOORBELL_MASK 0x00000400 |
| Doorbell Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_DATA_MSG_MASK 0x00000800 |
| Data Message Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_WRITE_RESPONSE_MASK 0x00001000 |
| Write with Response Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_SWRITE_MASK 0x00002000 |
| Streaming Write Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_WRITE_MASK 0x00004000 |
| Write Mask. More... | |
| #define | XSRIO_SRCDST_OPS_CAR_READ_MASK 0x00008000 |
| Read Mask. More... | |
PE Logical layer Control CSR bit definitions. | |
These bits are associated with the XSRIO_PELL_CTRL_CSR_OFFSET register. | |
| #define | XSRIO_PELL_CTRL_CSR_EAC_MASK 0x00000007 |
| Extended Addressing Control Mask. More... | |
Local Configuration Space Base Address 1 CSR bit definitions. | |
These bits are associated with the XSRIO_LCS1_BASEADDR_CSR_OFFSET register. | |
| #define | XSRIO_LCS1_BASEADDR_LCSBA_CSR_MASK 0x7FE00000 |
| LCSBA Mask. More... | |
| #define | XSRIO_LCS1_BASEADDR_LCSBA_CSR_SHIFT 21 |
| LCSBA Shift. More... | |
Base Device ID CSR bit definitions. | |
These bits are associated with the XSRIO_BASE_DID_CSR_OFFSET register. | |
| #define | XSRIO_BASE_DID_CSR_LBDID_MASK 0x0000FFFF |
| Large Base Device ID Mask(16-bit device ID) More... | |
| #define | XSRIO_BASE_DID_CSR_BDID_MASK 0x00FF0000 |
| Base Device ID Mask(8-bit device ID) More... | |
| #define | XSRIO_BASE_DID_CSR_BDID_SHIFT 16 |
| Base Device ID Shift. More... | |
Host Base Device ID CSR bit definitions. | |
These bits are associated with the XSRIO_HOST_DID_LOCK_CSR_OFFSET register. | |
| #define | XSRIO_HOST_DID_LOCK_CSR_HBDID_MASK 0x0000FFFF |
| Host Base Device ID Mask. More... | |
LP - Serial Register Block header bit definitions. | |
These bits are associated with the XSRIO_EFB_HEADER_OFFSET register. | |
| #define | XSRIO_EFB_HEADER_EFID_MASK 0x0000FFFF |
| Extended Features ID Mask. More... | |
| #define | XSRIO_EFB_HEADER_EFP_MASK 0xFFFF0000 |
| Extended Features Pointer Mask. More... | |
| #define | XSRIO_EFB_HEADER_EFP_SHIFT 16 |
| Extended Features Pointer Shift. More... | |
Port Link timeout value CSR bit definitions. | |
These bits are associated with the XSRIO_PORT_LINK_TOUT_CSR_OFFSET register. | |
| #define | XSRIO_PORT_LINK_TOUT_CSR_TOUTVAL_MASK 0xFFFFFF00 |
| Timeout Value Mask. More... | |
| #define | XSRIO_PORT_LINK_TOUT_CSR_TOUTVAL_SHIFT 8 |
| Timeout Value Shift. More... | |
Port response timeout value CSR bit definitions. | |
These bits are associated with the XSRIO_PORT_RESP_TOUT_CSR_OFFSET register. | |
| #define | XSRIO_PORT_RESP_TOUT_CSR_TOUTVAL_MASK 0xFFFFFF00 |
| Response Timeout Value Mask. More... | |
| #define | XSRIO_PORT_RESP_TOUT_CSR_TOUTVAL_SHIFT 8 |
| Response Timeout Shift. More... | |
Port General Control CSR bit definitions. | |
These bits are associated with the XSRIO_PORT_GEN_CTL_CSR_OFFSET register. | |
| #define | XSRIO_PORT_GEN_CTL_CSR_DISCOVERED_MASK 0x20000000 |
| Discovered Mask. More... | |
| #define | XSRIO_PORT_GEN_CTL_CSR_MENABLE_MASK 0x40000000 |
| Master Enable Mask. More... | |
| #define | XSRIO_PORT_GEN_CTL_CSR_HOST_MASK 0x80000000 |
| Host Mask. More... | |
Port n maintenance request CSR bit definitions. | |
These bits are associated with the XSRIO_PORT_N_MNT_REQ_CSR_OFFSET register. | |
| #define | XSRIO_PORT_N_MNT_REQ_CSR_CMD_MASK 0x00000007 |
| Command Mask. More... | |
Port n maintenance response CSR bit definitions. | |
These bits are associated with the XSRIO_PORT_N_MNT_RES_CSR_OFFSET register. | |
| #define | XSRIO_PORT_N_MNT_RES_CSR_LS_MASK 0x0000001F |
| link status Mask More... | |
| #define | XSRIO_PORT_N_MNT_RES_CSR_ACKS_MASK 0x000007E0 |
| Ack ID status Mask. More... | |
| #define | XSRIO_PORT_N_MNT_RES_CSR_RVALID_MASK 0x80000000 |
| Response Valid Mask. More... | |
Port n local ack ID CSR bit definitions. | |
These bits are associated with the XSRIO_PORT_N_ACKID_CSR_OFFSET register. | |
| #define | XSRIO_PORT_N_ACKID_CSR_OBACKID_MASK 0x0000003F |
| Out bound ACK ID Mask. More... | |
| #define | XSRIO_PORT_N_ACKID_CSR_OSACKID_MASK 0x00003F00 |
| Out Standing ACK ID Mask. More... | |
| #define | XSRIO_PORT_N_ACKID_CSR_IBACKID_MASK 0x3F000000 |
| In bound ACK ID Mask. More... | |
| #define | XSRIO_PORT_N_ACKID_CSR_CLSACKID_MASK 0x80000000 |
| Clear Outstanding ACK ID Mask. More... | |
| #define | XSRIO_PORT_N_ACKID_CSR_RESET_OBACKID_MASK 0xFFFFFFC0 |
| Out bound ACK ID Reset Mask. More... | |
| #define | XSRIO_PORT_N_ACKID_CSR_RESET_IBACKID_MASK 0xC0FFFFFF |
| In bound ACK ID Reset Mask. More... | |
| #define | XSRIO_PORT_N_ACKID_CSR_IBACKID_SHIFT 24 |
| In bound ACK ID shift. More... | |
Port n Error and Status CSR bit definitions. | |
These bits are associated with the XSRIO_PORT_N_ERR_STS_CSR_OFFSET register. | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_PUINT_MASK 0x00000001 |
| Port un-initialized Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_POK_MASK 0x00000002 |
| Port Ok Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_PERR_MASK 0x00000004 |
| Port Error Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_IERRS_MASK 0x00000100 |
| Input Error stopped Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_IERRE_MASK 0x00000200 |
| Input Error encountered Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_IRTS_MASK 0x00000400 |
| Input Retry Stopped Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_OERRS_MASK 0x00010000 |
| Output error Stopped Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_OERRE_MASK 0x00020000 |
| Output error encountered Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_ORTS_MASK 0x00040000 |
| Output Retry Stopped Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_OR_MASK 0x00080000 |
| Output Retried Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_ORE_MASK 0x00100000 |
| Output Retry Encountered Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_FLOWCNTL_MASK 0x08000000 |
| Flow Control Mode Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_IDL_SEQ_MASK 0x20000000 |
| Idle sequence Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_IDL_SEQE_MASK 0x40000000 |
| Idle sequence 2 Enable Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_IDL_SEQS_MASK 0x80000000 |
| Idle sequence 2 support Mask. More... | |
| #define | XSRIO_PORT_N_ERR_STS_CSR_ERR_ALL_MASK 0x001FFF07 |
| Port Errors Mask. More... | |
Port n Control CSR bit definitions. | |
These bits are associated with the XSRIO_PORT_N_CTL_CSR_OFFSET register. | |
| #define | XSRIO_PORT_N_CTL_CSR_PTYPE_MASK 0x00000001 |
| Port Type Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_EPWDS_MASK 0x00003000 |
| Extended Port Width Support Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_EPWOR_MASK 0x0000C000 |
| Extended Port Width Override Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_ENUMB_MASK 0x00020000 |
| Enumeration Boundary Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_MCENT_MASK 0x00080000 |
| Multi-cast Event Participant Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_ERRD_MASK 0x00100000 |
| Error Checking Disable Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_IPE_MASK 0x00200000 |
| Input port enable Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_OPE_MASK 0x00400000 |
| Output port enable Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_PD_MASK 0x00800000 |
| Output port disable Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_PWO_MASK 0x07000000 |
| Port width Override Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_RESET_PWO_MASK 0xF8FFFFFF |
| Port width Override Reset Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_IPW_MASK 0x38000000 |
| Initialized Port width Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_PW_MASK 0xc0000000 |
| Port width Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_STATUS_ALL_MASK 0x00F00000 |
| Port Status All Mask. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_PWO_SHIFT 24 |
| Port width Override Shift. More... | |
| #define | XSRIO_PORT_N_CTL_CSR_PW_SHIFT 30 |
| Port width Shift. More... | |
LP -Serial Lane Register Block Header bit definitions. | |
These bits are associated with the XSRIO_SL_HEADER_OFFSET register. | |
| #define | XSRIO_SL_HEADER_EFID_MASK 0x0000FFFF |
| Extended Features ID Mask. More... | |
| #define | XSRIO_SL_HEADER_EFP_MASK 0xFFFF0000 |
| Extended Features Pointer Mask. More... | |
| #define | XSRIO_SL_HEADER_EFP_SHIFT 16 |
| Extended Features Pointer Shift. More... | |
LP -Seral Lane n Status 0 CSRS bit definitions. | |
These bits are associated with the XSRIO_SLS0_CSR(x) register. | |
| #define | XSRIO_SLS0_CSR_PORT_NUM_MASK 0xFF000000 |
| Port Number Mask. More... | |
| #define | XSRIO_SLS0_CSR_LANE_NUM_MASK 0x00F00000 |
| Lane Number Mask. More... | |
| #define | XSRIO_SLS0_CSR_TRANSMIT_TYPE_MASK 0x00080000 |
| Transmitter Type Mask. More... | |
| #define | XSRIO_SLS0_CSR_TRANSMIT_MODE_MASK 0x00040000 |
| Transmitter Mode Mask. More... | |
| #define | XSRIO_SLS0_CSR_RCV_INPUT_INV_MASK 0x00008000 |
| Receiver Input Inverted Mask. More... | |
| #define | XSRIO_SLS0_CSR_RCV_TRAINED_MASK 0x00004000 |
| Receiver Trained Mask. More... | |
| #define | XSRIO_SLS0_CSR_RCVLANE_SYNC_MASK 0x00002000 |
| Receive Lane Sync Mask. More... | |
| #define | XSRIO_SLS0_CSR_RCVLANE_RDY_MASK 0x00001000 |
| Receive Lane Ready Mask. More... | |
| #define | XSRIO_SLS0_CSR_DECODING_ERRORS_MASK 0x00000F00 |
| 8B/10B Decoding errors Mask More... | |
| #define | XSRIO_SLS0_CSR_LANESYNC_CHAN_MASK 0x00000080 |
| lane_sync state change Mask More... | |
| #define | XSRIO_SLS0_CSR_RCVTRAINED_CHAN_MASK 0x00000040 |
| rcvr_train state changed Mask More... | |
| #define | XSRIO_SLS0_CSR_STAT1_IMP_MASK 0x00000008 |
| Status 1 CSR Implemented Mask. More... | |
| #define | XSRIO_SLS0_CSR_DECODING_ERRORS_SHIFT 8 |
LP -Seral Lane n Status 1 CSRS bit definitions. | |
These bits are associated with the XSRIO_SLS1_CSR(x) register. | |
| #define | XSRIO_SLS1_CSR_SCRDSCR_EN_MASK 0x00008000 |
| Connected port Scrambling/Descrambling Enabled Mask. More... | |
| #define | XSRIO_SLS1_CSR_CPTEIS_MASK 0x00030000 |
| Connected port transmit Emphasis Tap(+1) Status Mask. More... | |
| #define | XSRIO_SLS1_CSR_CPTEDS_MASK 0x000C0000 |
| Connected port transmit Emphasis Tap(-1) Status Mask. More... | |
| #define | XSRIO_SLS1_CSR_LANENUM_MASK 0x00F00000 |
| Lane number within connected port. More... | |
| #define | XSRIO_SLS1_CSR_RXPORT_WIDTH_MASK 0x07000000 |
| Receive port width Mask. More... | |
| #define | XSRIO_SLS1_CSR_CPLR_TRAINED_MASK 0x08000000 |
| Connected port lane Receiver trained Mask. More... | |
| #define | XSRIO_SLS1_CSR_IMPDEFINED_MASK 0x10000000 |
| Implementation defined Mask. More... | |
| #define | XSRIO_SLS1_CSR_VALCHANGED_MASK 0x20000000 |
| Values Changed Mask. More... | |
| #define | XSRIO_SLS1_CSR_IDLE2_INFO_MASK 0x40000000 |
| IDLE2 Information Current Mask. More... | |
| #define | XSRIO_SLS1_CSR_IDLE2_REC_MASK 0x80000000 |
| IDLE2 Received Mask. More... | |
Water Mark CSRS bit definitions. | |
These bits are associated with the XSRIO_IMP_WCSR_OFFSET register. | |
| #define | XSRIO_IMP_WCSR_WM2_MASK 0x003F0000 |
| Water Mark 2 Mask. More... | |
| #define | XSRIO_IMP_WCSR_WM1_MASK 0x00003F00 |
| Water Mark 1 Mask. More... | |
| #define | XSRIO_IMP_WCSR_WM0_MASK 0x0000003F |
| Water Mark 0 Mask. More... | |
| #define | XSRIO_IMP_WCSR_WM1_SHIFT 8 |
| Water Mark 1 Shift. More... | |
| #define | XSRIO_IMP_WCSR_WM2_SHIFT 16 |
| Water Mark 2 Shift. More... | |
Buffer Control CSRS bit definitions. | |
These bits are associated with the XSRIO_IMP_BCSR_OFFSET register. | |
| #define | XSRIO_IMP_BCSR_RXFLOW_CNTLONLY_MASK 0x80000000 |
| Rx Flow Control Only Mask. More... | |
| #define | XSRIO_IMP_BCSR_UNIFIED_CLK_MASK 0x40000000 |
| Buffer Control Mask. More... | |
| #define | XSRIO_IMP_BCSR_TX_FLOW_CNTL_MASK 0x20000000 |
| Tx Flow Control Mask. More... | |
| #define | XSRIO_IMP_BCSR_TXREQ_REORDER_MASK 0x10000000 |
| Tx Request Reorder Mask. More... | |
| #define | XSRIO_IMP_BCSR_TXSIZE_MASK 0x07FF0000 |
| Tx size Mask. More... | |
| #define | XSRIO_IMP_BCSR_FRX_FLOW_CNTL_MASK 0x00008000 |
| Force Rx flow Control Mask. More... | |
| #define | XSRIO_IMP_BCSR_RXSIZE_MASK 0x000000FF |
| Rx size Mask. More... | |
| #define | XSRIO_IMP_BCSR_TXSIZE_SHIFT 16 |
| Tx size shift. More... | |
Maintenance Request Information Register bit definitions. | |
These bits are associated with the XSRIO_IMP_MRIR_OFFSET register. | |
| #define | XSRIO_IMP_MRIR_REQ_TID_MASK 0xFF000000 |
| Request TID Mask. More... | |
| #define | XSRIO_IMP_MRIR_REQ_PRIO_MASK 0x00060000 |
| Request Priority Mask. More... | |
| #define | XSRIO_IMP_MRIR_REQ_CRF_MASK 0x00010000 |
| Request CRF Mask. More... | |
| #define | XSRIO_IMP_MRIR_REQ_DESTID_MASK 0x0000FFFF |
| Request Destination ID Mask. More... | |
| #define | XSRIO_IMP_MRIR_REQ_PRIO_SHIFT 17 |
| #define | XSRIO_IMP_MRIR_REQ_CRF_SHIFT 16 |
| #define | XSRIO_IMP_MRIR_REQ_TID_SHIFT 24 |
| #define XSRIO_ASM_ID_CAR_ASMID_MASK 0xFFFF0000 |
Assembly ID Mask.
| #define XSRIO_ASM_ID_CAR_ASMID_SHIFT 16 |
Assembly ID Shift.
| #define XSRIO_ASM_ID_CAR_ASMVID_MASK 0x0000FFFF |
Assembly Vendor ID Mask.
| #define XSRIO_ASM_ID_CAR_OFFSET 0x08 |
Assembly Identity CAR.
| #define XSRIO_ASM_INFO_CAR_ASMREV_MASK 0xFFFF0000 |
Assembly Revision Mask.
| #define XSRIO_ASM_INFO_CAR_ASMREV_SHIFT 16 |
Assembly Revision Shift.
| #define XSRIO_ASM_INFO_CAR_EFP_MASK 0x0000FFFF |
Extended Features Pointer Mask.
| #define XSRIO_ASM_INFO_CAR_OFFSET 0x0C |
Assembly Information CAR.
| #define XSRIO_BASE_DID_CSR_BDID_MASK 0x00FF0000 |
Base Device ID Mask(8-bit device ID)
| #define XSRIO_BASE_DID_CSR_BDID_SHIFT 16 |
Base Device ID Shift.
| #define XSRIO_BASE_DID_CSR_LBDID_MASK 0x0000FFFF |
Large Base Device ID Mask(16-bit device ID)
| #define XSRIO_BASE_DID_CSR_OFFSET 0x60 |
Base Device ID CSR.
| #define XSrio_CheckforTxReqreorder | ( | InstancePtr | ) |
XSrio_CheckforTxReqreorder checks whether the transmit buffer has been configured to allow reordering of requests.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_ClrDecodingErrors | ( | InstancePtr, | |
| Lanenum | |||
| ) |
XSrio_ClrDecodingErrors clears the 8B/10B decoding errors and return Result.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Lanenum | is the Serial Lane-number(0,1,2,3). |
| #define XSrio_ClrEnumerationBoundary | ( | InstancePtr | ) |
XSrio_ClrEnumerationBoundary clears the enumeration boundary of the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_ClrOutStandingAckIDs | ( | InstancePtr | ) |
XSrio_ClrOutStandingAckIDs clears all outstanding unacknowledged received packets of the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_ClrPortError | ( | InstancePtr, | |
| Mask | |||
| ) |
XSrio_ClrPortError clears the Port Error specified by the Mask.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Mask | is the mask for the Port Error to be cleared. |
| #define XSRIO_COMPONENT_TAG_CSR_OFFSET 0x6c |
Component Tag CSR.
| #define XSRIO_DEV_ID_CAR_OFFSET 0x00 |
Capability Address Register Space 0x00-0x3C Registers.
Device Identity CAR
| #define XSRIO_DEV_ID_DEVID_CAR_MASK 0xFFFF0000 |
Device ID Mask.
| #define XSRIO_DEV_ID_DEVID_CAR_SHIFT 16 |
Device ID shift.
| #define XSRIO_DEV_ID_VDRID_CAR_MASK 0x0000FFFF |
Device Vendor ID Mask.
| #define XSRIO_DEV_INFO_CAR_DEVREV_MASK 0x000F0000 |
Device Revision Lable Mask.
| #define XSRIO_DEV_INFO_CAR_MAJREV_MASK 0x00000F00 |
Major Revision Mask.
| #define XSRIO_DEV_INFO_CAR_MINREV_MASK 0x000000F0 |
Minor Revision Mask.
| #define XSRIO_DEV_INFO_CAR_OFFSET 0x04 |
Device Information CAR.
| #define XSRIO_DEV_INFO_CAR_PATCH_MASK 0x0000000F |
Patch Mask.
| #define XSRIO_DIR_RX 2 |
Receive Direction Flag.
Referenced by XSrioDmaLoopbackExample().
| #define XSRIO_DIR_TX 1 |
Transmit Direction Flag.
Referenced by XSrio_IsOperationSupported(), and XSrioDmaLoopbackExample().
| #define XSRIO_DST_OPS_CAR_OFFSET 0x1c |
Destination operations CAR.
| #define XSRIO_EFB_HEADER_EFID_MASK 0x0000FFFF |
Extended Features ID Mask.
| #define XSRIO_EFB_HEADER_EFP_MASK 0xFFFF0000 |
Extended Features Pointer Mask.
| #define XSRIO_EFB_HEADER_EFP_SHIFT 16 |
Extended Features Pointer Shift.
| #define XSRIO_EFB_HEADER_OFFSET 0x100 |
Extended Feature Register Space 0x0100-0xFFFC Registers.
Extended features LP Serial Register Block Header
| #define XSRIO_EFB_LPSL_OFFSET 0x0400 |
LP-Serial Lane Extended Features offset.
| #define XSrio_ForceRxFlowControl | ( | InstancePtr | ) |
XSrio_ForceRxFlowControl forces the Tx flow control enabled core to use Rx flow control.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetBaseDeviceID | ( | InstancePtr | ) |
XSrio_GetBaseDeviceID returns the 8-bit Device Id for an endpoint in a small Transport system.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetCommand | ( | InstancePtr | ) |
XSrio_GetCommand returns the command value that is sent on the Link-request Control symbol of the SRIO Gen2 core.
This api is available only if the software assisted error recovery option is enabled in the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetComponentTagCSR | ( | InstancePtr | ) |
XSrio_GetComponentTagCSR returns the Component Tag Value set by the software during initialization.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetCRF | ( | InstancePtr | ) |
XSrio_GetCRF checks whether the CRF is enabled in the core or not which will be used for outgoing maintenance requests.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetDestinationID | ( | InstancePtr | ) |
XSrio_GetDestinationID gets the destination id value which will be used for outgoing maintenance requests.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetExFeaturesPointer | ( | InstancePtr | ) |
XSrio_GetExFeaturesPointer gives the pointer to the Phy Register space of the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetExtFeaturesID | ( | InstancePtr | ) |
XSrio_GetExtFeaturesID returns the Extended Features Id value.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetHostBaseDevID_LockCSR | ( | InstancePtr | ) |
XSrio_GetHostBaseDevID_LockCSR returns the Device Id of the system host.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetInboundAckID | ( | InstancePtr | ) |
XSrio_GetInboundAckID returns the expected Ackid of the next received packet of the SRIO Gen2 core.
This api is available only if the software assisted error recovery option is selected in the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetLargeBaseDeviceID | ( | InstancePtr | ) |
XSrio_GetLargeBaseDeviceID returns the 16-bit Device Id for an endpoint in a Large transport system.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetLCSBA | ( | InstancePtr | ) |
XSrio_GetLCSBA returns the Local Configuration Space Base Address(LCSBA) of the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetOutboundAckID | ( | InstancePtr | ) |
XSrio_GetOutboundAckID returns the value of the next transmitted Ackid of the SRIO Gen2 Core.
This api is available only if the software assisted error recovery option is selected core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetPortControlStatus | ( | InstancePtr | ) |
XSrio_GetPortControlStatus returns the status of the port that is currently enabled in the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetPortErrorStatus | ( | InstancePtr | ) |
XSrio_GetPortErrorStatus returns the mask for the port errors currently enabled in the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetPortLinkTimeOutValue | ( | InstancePtr | ) |
XSrio_GetPortLinkTimeOutValue returns the Port Link Timeout value for the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetPortRespTimeOutValue | ( | InstancePtr | ) |
XSrio_GetPortRespTimeOutValue returns the Port Response Timeout value for the the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetPortwidthOverride | ( | InstancePtr | ) |
XSrio_GetPortwidthOverride returns the port width override value of the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetPriority | ( | InstancePtr | ) |
XSrio_GetPriority priority used for outgoing maintenance requests.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetRxSize | ( | InstancePtr | ) |
XSrio_GetRxSize returns the number of maximum-size packets the rx buffer holded.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetSerialExtFeaturesPointer | ( | InstancePtr | ) |
XSrio_GetSerialExtFeaturesPointer returns the Extended Features Pointer which will point to the next extended features block if one exists.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetSerialLaneExtFeaturesPointer | ( | InstancePtr | ) |
XSrio_GetSerialLaneExtFeaturesPointer returns the extended features pointer For the serial lane which will point to the next extended features block If one exists.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_GetTxSize | ( | InstancePtr | ) |
XSrio_GetTxSize returns the number of maximum-size packets the tx buffer holds.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSRIO_HOST_DID_LOCK_CSR_HBDID_MASK 0x0000FFFF |
Host Base Device ID Mask.
| #define XSRIO_HOST_DID_LOCK_CSR_OFFSET 0x68 |
Host Base Device ID Lock CSR.
| #define XSRIO_IMP_BCSR_FRX_FLOW_CNTL_MASK 0x00008000 |
Force Rx flow Control Mask.
| #define XSRIO_IMP_BCSR_OFFSET 0x10004 |
Buffer Control CSR.
| #define XSRIO_IMP_BCSR_RXFLOW_CNTLONLY_MASK 0x80000000 |
Rx Flow Control Only Mask.
| #define XSRIO_IMP_BCSR_RXSIZE_MASK 0x000000FF |
Rx size Mask.
| #define XSRIO_IMP_BCSR_TX_FLOW_CNTL_MASK 0x20000000 |
Tx Flow Control Mask.
| #define XSRIO_IMP_BCSR_TXREQ_REORDER_MASK 0x10000000 |
Tx Request Reorder Mask.
| #define XSRIO_IMP_BCSR_TXSIZE_MASK 0x07FF0000 |
Tx size Mask.
| #define XSRIO_IMP_BCSR_TXSIZE_SHIFT 16 |
Tx size shift.
| #define XSRIO_IMP_BCSR_UNIFIED_CLK_MASK 0x40000000 |
Buffer Control Mask.
| #define XSRIO_IMP_MRIR_OFFSET 0x10100 |
Maintenance Request Information Register.
| #define XSRIO_IMP_MRIR_REQ_CRF_MASK 0x00010000 |
Request CRF Mask.
| #define XSRIO_IMP_MRIR_REQ_DESTID_MASK 0x0000FFFF |
Request Destination ID Mask.
| #define XSRIO_IMP_MRIR_REQ_PRIO_MASK 0x00060000 |
Request Priority Mask.
| #define XSRIO_IMP_MRIR_REQ_TID_MASK 0xFF000000 |
Request TID Mask.
| #define XSRIO_IMP_WCSR_OFFSET 0x10000 |
Implementation Defined Space 0x010000 - 0xFFFFFC Registers.
Water Mark CSR
Referenced by XSrio_GetWaterMark(), and XSrio_SetWaterMark().
| #define XSRIO_IMP_WCSR_WM0_MASK 0x0000003F |
Water Mark 0 Mask.
Referenced by XSrio_GetWaterMark(), and XSrio_SetWaterMark().
| #define XSRIO_IMP_WCSR_WM1_MASK 0x00003F00 |
Water Mark 1 Mask.
Referenced by XSrio_GetWaterMark(), and XSrio_SetWaterMark().
| #define XSRIO_IMP_WCSR_WM1_SHIFT 8 |
Water Mark 1 Shift.
Referenced by XSrio_GetWaterMark(), and XSrio_SetWaterMark().
| #define XSRIO_IMP_WCSR_WM2_MASK 0x003F0000 |
Water Mark 2 Mask.
Referenced by XSrio_GetWaterMark(), and XSrio_SetWaterMark().
| #define XSRIO_IMP_WCSR_WM2_SHIFT 16 |
Water Mark 2 Shift.
Referenced by XSrio_GetWaterMark(), and XSrio_SetWaterMark().
| #define XSRIO_IS_BRIDGE 3 |
Core can be used as a bridge to another interface.
Referenced by XSrio_GetPEType().
| #define XSRIO_IS_MEMORY 1 |
Core has physically addressable storage space.
Referenced by XSrio_GetPEType(), and XSrioDmaLoopbackExample().
| #define XSRIO_IS_PROCESSOR 2 |
Core has a local processor that runs code.
Referenced by XSrio_GetPEType().
| #define XSrio_IsCRFSupported | ( | InstancePtr | ) |
XSrio_IsCRFSupported checks whether the PE(Processing Element) supports CRF(Critical Request Flow indicator).
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_IsEnumerationBoundary | ( | InstancePtr | ) |
XSrio_IsEnumerationBoundary checks whether the enumeration boundary is available or not for the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_IsHost | ( | InstancePtr | ) |
XSrio_IsHost checks whether PE(Processing Element) is responsible for system exploration.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_IsLargeSystem | ( | InstancePtr | ) |
XSrio_IsLargeSystem checks whether PE(Processing Element) supports a large system (16-bit Device ids)
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_IsMasterEnabled | ( | InstancePtr | ) |
XSrio_IsMasterEnabled checks whether PE(Processing Element) is allowed to issue request into the system.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_IsPEDiscovered | ( | InstancePtr | ) |
XSrio_IsPEDiscovered checks whether the PE(Processing Element) is discovered or not.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_IsResponseValid | ( | InstancePtr | ) |
XSrio_IsResponseValid checks whether the link response is valid or not in the SRIO Gen2 Core.
This api is available only if the software assisted error recovery option is enabled in the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_IsTxFlowControl | ( | InstancePtr | ) |
XSrio_IsTxFlowControl checks whether the BUF is currently operating in Tx flow control mode or not.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSRIO_LCS0_BASEADDR_CSR_OFFSET 0x58 |
Local Configuration Space 0 Base Address CSR.
| #define XSRIO_LCS1_BASEADDR_CSR_OFFSET 0x5c |
Local Configuration Space 1 Base Address CSR.
| #define XSRIO_LCS1_BASEADDR_LCSBA_CSR_MASK 0x7FE00000 |
LCSBA Mask.
| #define XSRIO_LCS1_BASEADDR_LCSBA_CSR_SHIFT 21 |
LCSBA Shift.
| #define XSRIO_OP_MODE_ATOMIC 6 |
Core supports atomic Operation.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_OP_MODE_DATA_MESSAGE 4 |
Core supports data message Operation.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_OP_MODE_DOORBELL 5 |
Core supports doorbell Operation.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_OP_MODE_NREAD 0 |
Core supports read Operation.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_OP_MODE_NWRITE 1 |
Core supports write Operation.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_OP_MODE_NWRITE_R 3 |
Core supports write with Response operation.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_OP_MODE_SWRITE 2 |
Core supports streaming-write Operation.
Referenced by XSrio_IsOperationSupported(), and XSrioDmaLoopbackExample().
| #define XSRIO_PEF_CAR_BRIDGE_MASK 0x80000000 |
Bridge Mask.
Referenced by XSrio_GetPEType().
| #define XSRIO_PEF_CAR_CRF_MASK 0x00000020 |
CRF Support Mask.
| #define XSRIO_PEF_CAR_CTS_MASK 0x00000010 |
Common Transport Large System support Mask.
| #define XSRIO_PEF_CAR_EAS_MASK 0x00000007 |
Extended Addressing Support Mask.
| #define XSRIO_PEF_CAR_EF_MASK 0x00000008 |
Extended Features Mask.
| #define XSRIO_PEF_CAR_MEMORY_MASK 0x40000000 |
Memory Mask.
Referenced by XSrio_GetPEType().
| #define XSRIO_PEF_CAR_MPORT_MASK 0x08000000 |
Multi Port Mask.
| #define XSRIO_PEF_CAR_OFFSET 0x10 |
Processing Element Features CAR.
Referenced by XSrio_GetPEType().
| #define XSRIO_PEF_CAR_PROCESSOR_MASK 0x20000000 |
Processor Mask.
Referenced by XSrio_GetPEType().
| #define XSRIO_PEF_CAR_SWITCH_MASK 0x10000000 |
Switch Mask.
| #define XSRIO_PELL_CTRL_CSR_EAC_MASK 0x00000007 |
Extended Addressing Control Mask.
| #define XSRIO_PELL_CTRL_CSR_OFFSET 0x4c |
Command and Status Register Space 0x040-0xFC Registers.
PE Logical layer Control CSR
| #define XSRIO_PORT_GEN_CTL_CSR_DISCOVERED_MASK 0x20000000 |
Discovered Mask.
| #define XSRIO_PORT_GEN_CTL_CSR_HOST_MASK 0x80000000 |
Host Mask.
| #define XSRIO_PORT_GEN_CTL_CSR_MENABLE_MASK 0x40000000 |
Master Enable Mask.
| #define XSRIO_PORT_GEN_CTL_CSR_OFFSET 0x13c |
General Control CSR.
| #define XSRIO_PORT_HAS_ERRORS 2 |
Port has errors.
Referenced by XSrio_GetPortStatus().
| #define XSRIO_PORT_LINK_TOUT_CSR_OFFSET 0x120 |
Port Link Timeout CSR.
| #define XSRIO_PORT_LINK_TOUT_CSR_TOUTVAL_MASK 0xFFFFFF00 |
Timeout Value Mask.
| #define XSRIO_PORT_LINK_TOUT_CSR_TOUTVAL_SHIFT 8 |
Timeout Value Shift.
| #define XSRIO_PORT_N_ACKID_CSR_CLSACKID_MASK 0x80000000 |
Clear Outstanding ACK ID Mask.
| #define XSRIO_PORT_N_ACKID_CSR_IBACKID_MASK 0x3F000000 |
In bound ACK ID Mask.
| #define XSRIO_PORT_N_ACKID_CSR_IBACKID_SHIFT 24 |
In bound ACK ID shift.
| #define XSRIO_PORT_N_ACKID_CSR_OBACKID_MASK 0x0000003F |
Out bound ACK ID Mask.
| #define XSRIO_PORT_N_ACKID_CSR_OFFSET 0x148 |
Port n Local Ack ID CSR.
| #define XSRIO_PORT_N_ACKID_CSR_OSACKID_MASK 0x00003F00 |
Out Standing ACK ID Mask.
| #define XSRIO_PORT_N_ACKID_CSR_RESET_IBACKID_MASK 0xC0FFFFFF |
In bound ACK ID Reset Mask.
| #define XSRIO_PORT_N_ACKID_CSR_RESET_OBACKID_MASK 0xFFFFFFC0 |
Out bound ACK ID Reset Mask.
| #define XSRIO_PORT_N_CTL_CSR_ENUMB_MASK 0x00020000 |
Enumeration Boundary Mask.
| #define XSRIO_PORT_N_CTL_CSR_EPWDS_MASK 0x00003000 |
Extended Port Width Support Mask.
| #define XSRIO_PORT_N_CTL_CSR_EPWOR_MASK 0x0000C000 |
Extended Port Width Override Mask.
| #define XSRIO_PORT_N_CTL_CSR_ERRD_MASK 0x00100000 |
Error Checking Disable Mask.
| #define XSRIO_PORT_N_CTL_CSR_IPE_MASK 0x00200000 |
Input port enable Mask.
| #define XSRIO_PORT_N_CTL_CSR_IPW_MASK 0x38000000 |
Initialized Port width Mask.
| #define XSRIO_PORT_N_CTL_CSR_MCENT_MASK 0x00080000 |
Multi-cast Event Participant Mask.
| #define XSRIO_PORT_N_CTL_CSR_OFFSET 0x15c |
Port n Control CSR.
Referenced by XSrio_CfgInitialize().
| #define XSRIO_PORT_N_CTL_CSR_OPE_MASK 0x00400000 |
Output port enable Mask.
| #define XSRIO_PORT_N_CTL_CSR_PD_MASK 0x00800000 |
Output port disable Mask.
| #define XSRIO_PORT_N_CTL_CSR_PTYPE_MASK 0x00000001 |
Port Type Mask.
| #define XSRIO_PORT_N_CTL_CSR_PW_MASK 0xc0000000 |
Port width Mask.
Referenced by XSrio_CfgInitialize().
| #define XSRIO_PORT_N_CTL_CSR_PW_SHIFT 30 |
Port width Shift.
Referenced by XSrio_CfgInitialize().
| #define XSRIO_PORT_N_CTL_CSR_PWO_MASK 0x07000000 |
Port width Override Mask.
| #define XSRIO_PORT_N_CTL_CSR_PWO_SHIFT 24 |
Port width Override Shift.
| #define XSRIO_PORT_N_CTL_CSR_RESET_PWO_MASK 0xF8FFFFFF |
Port width Override Reset Mask.
| #define XSRIO_PORT_N_CTL_CSR_STATUS_ALL_MASK 0x00F00000 |
Port Status All Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_ERR_ALL_MASK 0x001FFF07 |
Port Errors Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_FLOWCNTL_MASK 0x08000000 |
Flow Control Mode Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_IDL_SEQ_MASK 0x20000000 |
Idle sequence Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_IDL_SEQE_MASK 0x40000000 |
Idle sequence 2 Enable Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_IDL_SEQS_MASK 0x80000000 |
Idle sequence 2 support Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_IERRE_MASK 0x00000200 |
Input Error encountered Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_IERRS_MASK 0x00000100 |
Input Error stopped Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_IRTS_MASK 0x00000400 |
Input Retry Stopped Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_OERRE_MASK 0x00020000 |
Output error encountered Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_OERRS_MASK 0x00010000 |
Output error Stopped Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_OFFSET 0x158 |
Port n Error and Status CSR.
Referenced by XSrio_GetPortStatus().
| #define XSRIO_PORT_N_ERR_STS_CSR_OR_MASK 0x00080000 |
Output Retried Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_ORE_MASK 0x00100000 |
Output Retry Encountered Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_ORTS_MASK 0x00040000 |
Output Retry Stopped Mask.
| #define XSRIO_PORT_N_ERR_STS_CSR_PERR_MASK 0x00000004 |
Port Error Mask.
Referenced by XSrio_GetPortStatus().
| #define XSRIO_PORT_N_ERR_STS_CSR_POK_MASK 0x00000002 |
Port Ok Mask.
Referenced by XSrio_GetPortStatus().
| #define XSRIO_PORT_N_ERR_STS_CSR_PUINT_MASK 0x00000001 |
Port un-initialized Mask.
Referenced by XSrio_GetPortStatus().
| #define XSRIO_PORT_N_MNT_REQ_CSR_CMD_MASK 0x00000007 |
Command Mask.
| #define XSRIO_PORT_N_MNT_REQ_CSR_OFFSET 0x140 |
Port n Link Maintenance Request CSR.
| #define XSRIO_PORT_N_MNT_RES_CSR_ACKS_MASK 0x000007E0 |
Ack ID status Mask.
| #define XSRIO_PORT_N_MNT_RES_CSR_LS_MASK 0x0000001F |
link status Mask
| #define XSRIO_PORT_N_MNT_RES_CSR_OFFSET 0x144 |
Port n Maintenance Response CSR.
| #define XSRIO_PORT_N_MNT_RES_CSR_RVALID_MASK 0x80000000 |
Response Valid Mask.
| #define XSRIO_PORT_OK 0 |
Port is initialized.
Referenced by XSrio_GetPortStatus().
| #define XSRIO_PORT_RESP_TOUT_CSR_OFFSET 0x124 |
Port Response Timeout CSR.
| #define XSRIO_PORT_RESP_TOUT_CSR_TOUTVAL_MASK 0xFFFFFF00 |
Response Timeout Value Mask.
| #define XSRIO_PORT_RESP_TOUT_CSR_TOUTVAL_SHIFT 8 |
Response Timeout Shift.
| #define XSRIO_PORT_UNINITIALIZED 1 |
Port is uninitialized.
Referenced by XSrio_GetPortStatus().
| #define XSrio_ReadAsmID | ( | InstancePtr | ) |
XSrio_ReadAsmID returns the Assembly Id of the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_ReadAsmRevision | ( | InstancePtr | ) |
XSrio_ReadAsmRevision returns the Assembly Revision value of the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_ReadAsmVendorID | ( | InstancePtr | ) |
XSrio_ReadAsmVendorID returns the Assembly Vendor Id of the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_ReadDeviceID | ( | InstancePtr | ) |
XSrio_ReadDeviceID returns the Device Id of the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_ReadDeviceVendorID | ( | InstancePtr | ) |
XSrio_ReadDeviceVendorID returns the Device Vendor Id of the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_ReadDstOps | ( | InstancePtr | ) |
XSrio_ReadDstOps returns the Destination Operations CAR Register contents.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
Referenced by XSrio_IsOperationSupported().
| #define XSrio_ReadReg | ( | BaseAddress, | |
| RegOffset | |||
| ) | Xil_In32((BaseAddress) + (RegOffset)) |
Macro to read register.
| BaseAddress | is the base address of the SRIO |
| RegOffset | is the register offset. |
Referenced by XSrio_CfgInitialize(), XSrio_GetPEType(), XSrio_GetPortStatus(), XSrio_GetWaterMark(), and XSrio_SetWaterMark().
| #define XSrio_ReadSrcOps | ( | InstancePtr | ) |
XSrio_ReadSrcOps returns the Source Operations CAR Register contents.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
Referenced by XSrio_IsOperationSupported().
| #define XSrio_RequestTID | ( | InstancePtr | ) |
XSrio_RequestTID gives the transfer id value which will be used for the next outgoing maintenance request.
This value will increment after each request is sent.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_SendCommand | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SendCommand sends the given command in the link-request control symbol of the SRIO Gen2 core.
This api is available only if the software assisted error recovery option is selected in the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the Command to be send. |
| #define XSrio_SetBaseDeviceID | ( | InstancePtr, | |
| DeviceId | |||
| ) |
XSrio_SetBaseDeviceID configures the 8-bit Device Id for an endpoint in a small transport system.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| DeviceId | is the Device ID that needs to be configured. |
| #define XSrio_SetComponentTagCSR | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetComponentTagCSR sets the Component Tag Value for SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the Component Tag Value to be set. |
| #define XSrio_SetCRF | ( | InstancePtr | ) |
XSrio_SetCRF sets CRF value that is used for outgoing maintenance requests.
This api will work only when the CRF support is enabled in the core
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_SetDestinationID | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetDestinationID sets Device Id which will be used for Outgoing maintenance requests.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the Device Id value. |
| #define XSrio_SetDiscovered | ( | InstancePtr | ) |
XSrio_SetDiscovered configures the device as Discovered so that it is responsible for system exploration.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_SetHostBaseDevID_LockCSR | ( | InstancePtr, | |
| DeviceId | |||
| ) |
XSrio_SetHostBaseDevID_LockCSR configures the Host Base Device Id of the SRIO gen2 Core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| DeviceId | is the Device ID that needs to be configured. |
| #define XSrio_SetHostEnabled | ( | InstancePtr | ) |
XSrio_SetHostEnabled configures the device to be responsible for system exploration.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_SetInboundAckID | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetInboundAckID sets the value of the next transmitted Ackid of the SRIO Gen2 core.
This api is available only if the software assisted error recovery option is selected in the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the InBound Ack Id to be set. |
| #define XSrio_SetLargeBaseDeviceID | ( | InstancePtr, | |
| DeviceId | |||
| ) |
XSrio_SetLargeBaseDeviceID configures the 16-bit Device Id for an endpoint in a Large transport system.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| DeviceId | is the Device ID that needs to be configured. |
| #define XSrio_SetLCSBA | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetLCSBA Configures the Local Configuration Space Base Address of the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the Local Configuration Space Base Address that needs to be configured. |
Referenced by XSrioDmaLoopbackExample().
| #define XSrio_SetMasterEnabled | ( | InstancePtr | ) |
XSrio_SetMasterEnabled configures the device so that it is allowed to issue requests into the system.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| #define XSrio_SetOutboundAckID | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetOutboundAckID sets value of the next transmitted Ackid of the SRIO Gen2 Core.
This api is available only if the software assisted error Recovery option is selected in the core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the Outbound Ack Id to be set. |
| #define XSrio_SetPortControlStatus | ( | InstancePtr, | |
| Mask | |||
| ) |
XSrio_SetPortControlStatus Configures specific port specified by the Mask.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Mask | is the mask for the port that needs to be enabled. |
| #define XSrio_SetPortLinkTimeOutValue | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetPortLinkTimeOutValue sets the Port Link Timeout value for the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the Port Link Timeout value to be set. |
| #define XSrio_SetPortRespTimeOutValue | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetPortRespTimeOutValue sets the Port Response Timeout value for the The SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the Port Response Timeout to be set. |
Referenced by XSrioDmaLoopbackExample().
| #define XSrio_SetPortwidthOverride | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetPortwidthOverride configures the port width override value of the SRIO Gen2 core.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the port width override value needs to be set. |
| #define XSrio_SetPriority | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetPriority sets the Priority which will be used for outgoing maintenance requests.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the Priority value which will used for outgoing maintenance requests. |
| #define XSrio_SetTID | ( | InstancePtr, | |
| Value | |||
| ) |
XSrio_SetTID sets the transfer id which will be used for the next outgoing maintenance request.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Value | is the transfer id value which of the next outgoing maintenance request. |
| #define XSRIO_SL_HEADER_EFID_MASK 0x0000FFFF |
Extended Features ID Mask.
| #define XSRIO_SL_HEADER_EFP_MASK 0xFFFF0000 |
Extended Features Pointer Mask.
| #define XSRIO_SL_HEADER_EFP_SHIFT 16 |
Extended Features Pointer Shift.
| #define XSRIO_SL_HEADER_OFFSET 0x00 |
Serial Lane Block Header.
| #define XSRIO_SLS0_CSR_DECODING_ERRORS_MASK 0x00000F00 |
8B/10B Decoding errors Mask
| #define XSRIO_SLS0_CSR_LANE_NUM_MASK 0x00F00000 |
Lane Number Mask.
| #define XSRIO_SLS0_CSR_LANESYNC_CHAN_MASK 0x00000080 |
lane_sync state change Mask
| #define XSRIO_SLS0_CSR_OFFSET | ( | n | ) | (0x10 + n*0x20) |
Serial Lane N Status 0 CSR.
| #define XSRIO_SLS0_CSR_PORT_NUM_MASK 0xFF000000 |
Port Number Mask.
| #define XSRIO_SLS0_CSR_RCV_INPUT_INV_MASK 0x00008000 |
Receiver Input Inverted Mask.
| #define XSRIO_SLS0_CSR_RCV_TRAINED_MASK 0x00004000 |
Receiver Trained Mask.
| #define XSRIO_SLS0_CSR_RCVLANE_RDY_MASK 0x00001000 |
Receive Lane Ready Mask.
| #define XSRIO_SLS0_CSR_RCVLANE_SYNC_MASK 0x00002000 |
Receive Lane Sync Mask.
| #define XSRIO_SLS0_CSR_RCVTRAINED_CHAN_MASK 0x00000040 |
rcvr_train state changed Mask
| #define XSRIO_SLS0_CSR_STAT1_IMP_MASK 0x00000008 |
Status 1 CSR Implemented Mask.
| #define XSRIO_SLS0_CSR_TRANSMIT_MODE_MASK 0x00040000 |
Transmitter Mode Mask.
| #define XSRIO_SLS0_CSR_TRANSMIT_TYPE_MASK 0x00080000 |
Transmitter Type Mask.
| #define XSRIO_SLS1_CSR_CPLR_TRAINED_MASK 0x08000000 |
Connected port lane Receiver trained Mask.
| #define XSRIO_SLS1_CSR_CPTEDS_MASK 0x000C0000 |
Connected port transmit Emphasis Tap(-1) Status Mask.
| #define XSRIO_SLS1_CSR_CPTEIS_MASK 0x00030000 |
Connected port transmit Emphasis Tap(+1) Status Mask.
| #define XSRIO_SLS1_CSR_IDLE2_INFO_MASK 0x40000000 |
IDLE2 Information Current Mask.
| #define XSRIO_SLS1_CSR_IDLE2_REC_MASK 0x80000000 |
IDLE2 Received Mask.
| #define XSRIO_SLS1_CSR_IMPDEFINED_MASK 0x10000000 |
Implementation defined Mask.
| #define XSRIO_SLS1_CSR_LANENUM_MASK 0x00F00000 |
Lane number within connected port.
| #define XSRIO_SLS1_CSR_OFFSET | ( | n | ) | (0x14 + n*0x20) |
Serial Lane N Status 1 CSR.
| #define XSRIO_SLS1_CSR_RXPORT_WIDTH_MASK 0x07000000 |
Receive port width Mask.
| #define XSRIO_SLS1_CSR_SCRDSCR_EN_MASK 0x00008000 |
Connected port Scrambling/Descrambling Enabled Mask.
| #define XSRIO_SLS1_CSR_VALCHANGED_MASK 0x20000000 |
Values Changed Mask.
| #define XSRIO_SRC_OPS_CAR_OFFSET 0x18 |
Source operations CAR.
| #define XSRIO_SRCDST_OPS_CAR_ATOMIC_CLR_MASK 0x00000010 |
Atomic Clear Mask.
| #define XSRIO_SRCDST_OPS_CAR_ATOMIC_CSWP_MASK 0x00000200 |
Atomic compare and Swap Mask.
| #define XSRIO_SRCDST_OPS_CAR_ATOMIC_DECR_MASK 0x00000040 |
Atomic Decrement Mask.
| #define XSRIO_SRCDST_OPS_CAR_ATOMIC_INCR_MASK 0x00000080 |
Atomic Increment Mask.
| #define XSRIO_SRCDST_OPS_CAR_ATOMIC_SET_MASK 0x00000020 |
Atomic Set Mask.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_SRCDST_OPS_CAR_ATOMIC_SWP_MASK 0x00000008 |
Atomic Swap Mask.
| #define XSRIO_SRCDST_OPS_CAR_ATOMIC_TSWP_MASK 0x00000100 |
Atomic test and swap Mask.
| #define XSRIO_SRCDST_OPS_CAR_DATA_MSG_MASK 0x00000800 |
Data Message Mask.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_SRCDST_OPS_CAR_DOORBELL_MASK 0x00000400 |
Doorbell Mask.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_SRCDST_OPS_CAR_PORT_WRITE_MASK 0x00000004 |
Port write operation Mask.
| #define XSRIO_SRCDST_OPS_CAR_READ_MASK 0x00008000 |
Read Mask.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_SRCDST_OPS_CAR_SWRITE_MASK 0x00002000 |
Streaming Write Mask.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_SRCDST_OPS_CAR_WRITE_MASK 0x00004000 |
Write Mask.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_SRCDST_OPS_CAR_WRITE_RESPONSE_MASK 0x00001000 |
Write with Response Mask.
Referenced by XSrio_IsOperationSupported().
| #define XSRIO_SWP_INFO_CAR_OFFSET 0x14 |
Switch Port Information CAR.
| #define XSrio_WriteReg | ( | BaseAddress, | |
| RegOffset, | |||
| Data | |||
| ) | Xil_Out32((BaseAddress) + (RegOffset), (Data)) |
Macro to write register.
| BaseAddress | is the base address of the SRIO. |
| RegOffset | is the register offset. |
| Data | is the data to write. |
Referenced by XSrio_SetWaterMark().
The XSrio driver instance data.
An instance must be allocated for each SRIO device in use.
| typedef struct XSrio_Config XSrio_Config |
This typedef contains the configuration information for the device.
| int XSrio_CfgInitialize | ( | XSrio * | InstancePtr, |
| XSrio_Config * | Config, | ||
| UINTPTR | EffectiveAddress | ||
| ) |
Initialize the XSrio instance provided by the caller based on the given Config structure.
Initialization and Control functions in xsrio.c.
| InstancePtr | is the XSrio instance to operate on. |
| Config | is the device configuration structure containing information about a specific SRIO Device. |
| EffectiveAddress | is the Physical address of the hardware in a Virtual Memory operating system environment.It is the Base Address in a stand alone environment. |
References XSrio_Config::BaseAddress, XSrio::Config, XSrio_Config::DeviceId, XSrio::IsReady, XSrio::PortWidth, XSRIO_PORT_N_CTL_CSR_OFFSET, XSRIO_PORT_N_CTL_CSR_PW_MASK, XSRIO_PORT_N_CTL_CSR_PW_SHIFT, and XSrio_ReadReg.
Referenced by XSrioDmaLoopbackExample().
| int XSrio_GetPEType | ( | XSrio * | InstancePtr | ) |
XSrio_GetPEType API will check for the Processing Element type and return the type of type of Processing Element.
| InstancePtr | is the XSrio instance to operate on. |
References XSrio_Config::BaseAddress, XSrio::Config, XSRIO_IS_BRIDGE, XSRIO_IS_MEMORY, XSRIO_IS_PROCESSOR, XSRIO_PEF_CAR_BRIDGE_MASK, XSRIO_PEF_CAR_MEMORY_MASK, XSRIO_PEF_CAR_OFFSET, XSRIO_PEF_CAR_PROCESSOR_MASK, and XSrio_ReadReg.
Referenced by XSrioDmaLoopbackExample().
| int XSrio_GetPortStatus | ( | XSrio * | InstancePtr | ) |
XSrio_GetPortStatus will check the status of the port and returns the status of the port to the user.
| InstancePtr | is the XSrio instance to operate on. |
References XSrio_Config::BaseAddress, XSrio::Config, XSRIO_PORT_HAS_ERRORS, XSRIO_PORT_N_ERR_STS_CSR_OFFSET, XSRIO_PORT_N_ERR_STS_CSR_PERR_MASK, XSRIO_PORT_N_ERR_STS_CSR_POK_MASK, XSRIO_PORT_N_ERR_STS_CSR_PUINT_MASK, XSRIO_PORT_OK, XSRIO_PORT_UNINITIALIZED, and XSrio_ReadReg.
| void XSrio_GetWaterMark | ( | XSrio * | InstancePtr, |
| u8 * | WaterMark0, | ||
| u8 * | WaterMark1, | ||
| u8 * | WaterMark2 | ||
| ) |
XSrio_GetWaterMark API reads the water mark values.
| InstancePtr | is the XSrio instance to operate on. |
| WaterMark0 | is a pointer to a variable where the driver will pass back the water mark 0 value. |
| WaterMark1 | is a pointer to a variable where the driver will pass back the water mark 1 value. |
| WaterMark2 | is a pointer to a variable where the driver will pass back the water mark 2 value. |
References XSrio_Config::BaseAddress, XSrio::Config, XSRIO_IMP_WCSR_OFFSET, XSRIO_IMP_WCSR_WM0_MASK, XSRIO_IMP_WCSR_WM1_MASK, XSRIO_IMP_WCSR_WM1_SHIFT, XSRIO_IMP_WCSR_WM2_MASK, XSRIO_IMP_WCSR_WM2_SHIFT, and XSrio_ReadReg.
| int XSrio_IsOperationSupported | ( | XSrio * | InstancePtr, |
| u8 | Operation, | ||
| u8 | Direction | ||
| ) |
XSrio_IsOperationSupported tells whether the operation is supported by the SRIO Gen2 core or not.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| Operation | type is the operation type of the SRIO Packet |
| Direction | type |
References XSRIO_DIR_TX, XSRIO_OP_MODE_ATOMIC, XSRIO_OP_MODE_DATA_MESSAGE, XSRIO_OP_MODE_DOORBELL, XSRIO_OP_MODE_NREAD, XSRIO_OP_MODE_NWRITE, XSRIO_OP_MODE_NWRITE_R, XSRIO_OP_MODE_SWRITE, XSrio_ReadDstOps, XSrio_ReadSrcOps, XSRIO_SRCDST_OPS_CAR_ATOMIC_SET_MASK, XSRIO_SRCDST_OPS_CAR_DATA_MSG_MASK, XSRIO_SRCDST_OPS_CAR_DOORBELL_MASK, XSRIO_SRCDST_OPS_CAR_READ_MASK, XSRIO_SRCDST_OPS_CAR_SWRITE_MASK, XSRIO_SRCDST_OPS_CAR_WRITE_MASK, and XSRIO_SRCDST_OPS_CAR_WRITE_RESPONSE_MASK.
Referenced by XSrioDmaLoopbackExample().
| XSrio_Config * XSrio_LookupConfig | ( | u32 | DeviceId | ) |
Looks up the device configuration based on the unique device ID.
The table XSrio_ConfigTable contains the configuration info for each device in the system.
| DeviceId | is the unique device ID of the device to lookup for |
Referenced by XSrioDmaLoopbackExample().
| void XSrio_SetWaterMark | ( | XSrio * | InstancePtr, |
| u8 | WaterMark0, | ||
| u8 | WaterMark1, | ||
| u8 | WaterMark2 | ||
| ) |
XSrio_SetWaterMark Configures the watermark to transfer a priority packet.
| InstancePtr | is a pointer to the SRIO Gen2 instance to be worked on. |
| WaterMark0 | is the water mark value to transfer a priority 0 packet. |
| WaterMark1 | is the water mark value to transfer a priority 1 packet. |
| WaterMark2 | is the water mark value to transfer a priority 2 packet. |
References XSrio_Config::BaseAddress, XSrio::Config, XSRIO_IMP_WCSR_OFFSET, XSRIO_IMP_WCSR_WM0_MASK, XSRIO_IMP_WCSR_WM1_MASK, XSRIO_IMP_WCSR_WM1_SHIFT, XSRIO_IMP_WCSR_WM2_MASK, XSRIO_IMP_WCSR_WM2_SHIFT, XSrio_ReadReg, and XSrio_WriteReg.
Referenced by XSrioDmaLoopbackExample().