xhdmiphy1.h File Reference

Data Structures
struct	XHdmiphy1_PllParam
	This typedef contains configuration information for CPLL/QPLL programming. More...
struct	XHdmiphy1_Channel
	This typedef contains configuration information for PLL type and its reference clock. More...
struct	XHdmiphy1_Mmcm
	This typedef contains configuration information for MMCM programming. More...
struct	XHdmiphy1_Quad
	This typedef represents a GT quad. More...
struct	XHdmiphy1_Log
	This typedef contains the logging mechanism for debug. More...
struct	XHdmiphy1_Hdmi21Cfg
	This typedef contains the HDMI 2.1 FRL configurations. More...
struct	XHdmiphy1_Config
	This typedef contains configuration information for the Video PHY core. More...
struct	XHdmiphy1
	The XHdmiphy1 driver instance data. More...

Macros
#define	XHDMIPHY1_CH2IDX(Id)   ((Id) - XHDMIPHY1_CHANNEL_ID_CH1)
	Convert channel ID to array index. More...
#define	XHDMIPHY1_ISCH(Id)
	Check if channel ID is a regular channel. More...
#define	XHDMIPHY1_ISCMN(Id)
	Check if channel ID is a common channel. More...
#define	XHDMIPHY1_ISTXMMCM(Id)   ((Id) == XHDMIPHY1_CHANNEL_ID_TXMMCM)
	Check if channel ID is the TX MMCM channel. More...
#define	XHDMIPHY1_ISRXMMCM(Id)   ((Id) == XHDMIPHY1_CHANNEL_ID_RXMMCM)
	Check if channel ID is the RX MMCM channel. More...
#define	XHdmiphy1_IsTxUsingQpll(InstancePtr, QuadId, ChId)
	Check if TX is using QPLL. More...
#define	XHdmiphy1_IsRxUsingQpll(InstancePtr, QuadId, ChId)
	Check if RX is using QPLL. More...
#define	XHdmiphy1_IsTxUsingCpll(InstancePtr, QuadId, ChId)
	Check if TX is using CPLL. More...
#define	XHdmiphy1_IsRxUsingCpll(InstancePtr, QuadId, ChId)
	Check if RX is using CPLL. More...

Typedefs
typedef void(*	XHdmiphy1_IntrHandler )(void *InstancePtr)
	Callback type which represents the handler for interrupts. More...
typedef void(*	XHdmiphy1_TimerHandler )(void *InstancePtr, u32 MicroSeconds)
	Callback type which represents a custom timer wait handler. More...
typedef void(*	XHdmiphy1_Callback )(void *CallbackRef)
	Generic callback type. More...
typedef u64(*	XHdmiphy1_LogCallback )(void *CallbackRef)
	Generic callback type. More...
typedef void(*	XHdmiphy1_ErrorCallback )(void *CallbackRef)
	Error callback type. More...

Enumerations
enum	XHdmiphy1_ProtocolType
	This typedef enumerates the various protocols handled by the Video PHY controller (HDMIPHY). More...
enum	XHdmiphy1_IntrHandlerType
	This typedef enumerates the list of available interrupt handler types. More...
enum	XHdmiphy1_HdmiHandlerType { XHDMIPHY1_HDMI_HANDLER_TXINIT = 1, XHDMIPHY1_HDMI_HANDLER_TXREADY, XHDMIPHY1_HDMI_HANDLER_RXINIT, XHDMIPHY1_HDMI_HANDLER_RXREADY }
	This typedef enumerates the list of available hdmi handler types. More...
enum	XHdmiphy1_PllType
	This typedef enumerates the different PLL types for a given GT channel. More...
enum	XHdmiphy1_ChannelId
	This typedef enumerates the available channels. More...
enum	XHdmiphy1_PllRefClkSelType
	This typedef enumerates the available reference clocks for the PLL clock selection multiplexer. More...
enum	XHdmiphy1_SysClkDataSelType
	This typedef enumerates the available reference clocks used to drive the RX/TX datapaths. More...
enum	XHdmiphy1_SysClkOutSelType
	This typedef enumerates the available reference clocks used to drive the RX/TX output clocks. More...
enum	XHdmiphy1_OutClkSelType
	This typedef enumerates the available clocks that are used as multiplexer input selections for the RX/TX output clock. More...
enum	XHdmiphy1_GtState {   XHDMIPHY1_GT_STATE_IDLE, XHDMIPHY1_GT_STATE_GPO_RE, XHDMIPHY1_GT_STATE_LOCK, XHDMIPHY1_GT_STATE_RESET,   XHDMIPHY1_GT_STATE_ALIGN, XHDMIPHY1_GT_STATE_READY }
	Enumeration of possible states a transceiver can be in. More...
enum	XHdmiphy1_LogEvent {   XHDMIPHY1_LOG_EVT_NONE = 1, XHDMIPHY1_LOG_EVT_QPLL_EN, XHDMIPHY1_LOG_EVT_QPLL_RST, XHDMIPHY1_LOG_EVT_QPLL_LOCK,   XHDMIPHY1_LOG_EVT_QPLL_RECONFIG, XHDMIPHY1_LOG_EVT_QPLL0_EN, XHDMIPHY1_LOG_EVT_QPLL0_RST, XHDMIPHY1_LOG_EVT_QPLL0_LOCK,   XHDMIPHY1_LOG_EVT_QPLL0_RECONFIG, XHDMIPHY1_LOG_EVT_QPLL1_EN, XHDMIPHY1_LOG_EVT_QPLL1_RST, XHDMIPHY1_LOG_EVT_QPLL1_LOCK,   XHDMIPHY1_LOG_EVT_QPLL1_RECONFIG, XHDMIPHY1_LOG_EVT_PLL0_EN, XHDMIPHY1_LOG_EVT_PLL0_RST, XHDMIPHY1_LOG_EVT_PLL1_EN,   XHDMIPHY1_LOG_EVT_PLL1_RST, XHDMIPHY1_LOG_EVT_CPLL_EN, XHDMIPHY1_LOG_EVT_CPLL_RST, XHDMIPHY1_LOG_EVT_CPLL_LOCK,   XHDMIPHY1_LOG_EVT_CPLL_RECONFIG, XHDMIPHY1_LOG_EVT_LCPLL_LOCK, XHDMIPHY1_LOG_EVT_RPLL_LOCK, XHDMIPHY1_LOG_EVT_TXPLL_EN,   XHDMIPHY1_LOG_EVT_TXPLL_RST, XHDMIPHY1_LOG_EVT_RXPLL_EN, XHDMIPHY1_LOG_EVT_RXPLL_RST, XHDMIPHY1_LOG_EVT_GTRX_RST,   XHDMIPHY1_LOG_EVT_GTTX_RST, XHDMIPHY1_LOG_EVT_VID_TX_RST, XHDMIPHY1_LOG_EVT_VID_RX_RST, XHDMIPHY1_LOG_EVT_TX_ALIGN,   XHDMIPHY1_LOG_EVT_TX_ALIGN_TMOUT, XHDMIPHY1_LOG_EVT_TX_TMR, XHDMIPHY1_LOG_EVT_RX_TMR, XHDMIPHY1_LOG_EVT_GT_RECONFIG,   XHDMIPHY1_LOG_EVT_GT_TX_RECONFIG, XHDMIPHY1_LOG_EVT_GT_RX_RECONFIG, XHDMIPHY1_LOG_EVT_INIT, XHDMIPHY1_LOG_EVT_TXPLL_RECONFIG,   XHDMIPHY1_LOG_EVT_RXPLL_RECONFIG, XHDMIPHY1_LOG_EVT_RXPLL_LOCK, XHDMIPHY1_LOG_EVT_TXPLL_LOCK, XHDMIPHY1_LOG_EVT_TX_RST_DONE,   XHDMIPHY1_LOG_EVT_RX_RST_DONE, XHDMIPHY1_LOG_EVT_TX_FREQ, XHDMIPHY1_LOG_EVT_RX_FREQ, XHDMIPHY1_LOG_EVT_DRU_EN,   XHDMIPHY1_LOG_EVT_TXGPO_RE, XHDMIPHY1_LOG_EVT_RXGPO_RE, XHDMIPHY1_LOG_EVT_FRL_RECONFIG, XHDMIPHY1_LOG_EVT_TMDS_RECONFIG,   XHDMIPHY1_LOG_EVT_1PPC_ERR, XHDMIPHY1_LOG_EVT_PPC_MSMTCH_ERR, XHDMIPHY1_LOG_EVT_VDCLK_HIGH_ERR, XHDMIPHY1_LOG_EVT_NO_DRU,   XHDMIPHY1_LOG_EVT_GT_QPLL_CFG_ERR, XHDMIPHY1_LOG_EVT_GT_CPLL_CFG_ERR, XHDMIPHY1_LOG_EVT_GT_LCPLL_CFG_ERR, XHDMIPHY1_LOG_EVT_GT_RPLL_CFG_ERR,   XHDMIPHY1_LOG_EVT_VD_NOT_SPRTD_ERR, XHDMIPHY1_LOG_EVT_MMCM_ERR, XHDMIPHY1_LOG_EVT_HDMI20_ERR, XHDMIPHY1_LOG_EVT_NO_QPLL_ERR,   XHDMIPHY1_LOG_EVT_DRU_CLK_ERR, XHDMIPHY1_LOG_EVT_USRCLK_ERR, XHDMIPHY1_LOG_EVT_SPDGRDE_ERR, XHDMIPHY1_LOG_EVT_DUMMY }
	Enumeration of log events for the HDMI PHY driver. More...
enum	XHdmiphy1_HdmiTx_Patgen {   XHDMIPHY1_Patgen_Ratio_10 = 0x1, XHDMIPHY1_Patgen_Ratio_20 = 0x2, XHDMIPHY1_Patgen_Ratio_30 = 0x3, XHDMIPHY1_Patgen_Ratio_40 = 0x4,   XHDMIPHY1_Patgen_Ratio_50 = 0x5 }
	Enumeration of linerate to TMDS clock ratio for HDMI TX pattern generator. More...
enum	XHdmiphy1_PrbsPattern {   XHDMIPHY1_PRBSSEL_STD_MODE = 0x0, XHDMIPHY1_PRBSSEL_PRBS7 = 0x1, XHDMIPHY1_PRBSSEL_PRBS9 = 0x2, XHDMIPHY1_PRBSSEL_PRBS15 = 0x3,   XHDMIPHY1_PRBSSEL_PRBS23 = 0x4, XHDMIPHY1_PRBSSEL_PRBS31 = 0x5, XHDMIPHY1_PRBSSEL_PCIE = 0x8, XHDMIPHY1_PRBSSEL_SQUARE_2UI = 0x9,   XHDMIPHY1_PRBSSEL_SQUARE_16UI = 0xA }
	This typedef enumerates the available PRBS patterns available from the. More...

Functions
void	XHdmiphy1_CfgInitialize (XHdmiphy1 *InstancePtr, XHdmiphy1_Config *ConfigPtr, UINTPTR EffectiveAddr)
	This function retrieves the configuration for this Video PHY instance and fills in the InstancePtr->Config structure. More...
u32	XHdmiphy1_PllInitialize (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, XHdmiphy1_PllRefClkSelType QpllRefClkSel, XHdmiphy1_PllRefClkSelType CpllxRefClkSel, XHdmiphy1_PllType TxPllSelect, XHdmiphy1_PllType RxPllSelect)
	This function will initialize the PLL selection for a given channel. More...
u32	XHdmiphy1_GetVersion (XHdmiphy1 *InstancePtr)
	This function will obtian the IP version. More...
void	XHdmiphy1_WaitUs (XHdmiphy1 *InstancePtr, u32 MicroSeconds)
	This function is the delay/sleep function for the XHdmiphy1 driver. More...
u32	XHdmiphy1_CfgLineRate (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, u64 LineRateHz)
	Configure the channel's line rate. More...
XHdmiphy1_PllType	XHdmiphy1_GetPllType (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, XHdmiphy1_ChannelId ChId)
	Obtain the channel's PLL reference clock selection. More...
u64	XHdmiphy1_GetLineRateHz (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId)
	This function will return the line rate in Hz for a given channel / quad. More...
u32	XHdmiphy1_ResetGtPll (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, XHdmiphy1_DirectionType Dir, u8 Hold)
	This function will reset the GT's PLL logic. More...
u32	XHdmiphy1_ResetGtTxRx (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, XHdmiphy1_DirectionType Dir, u8 Hold)
	This function will reset the GT's TX/RX logic. More...
u32	XHdmiphy1_SetPolarity (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, XHdmiphy1_DirectionType Dir, u8 Polarity)
	This function will set/clear the TX/RX polarity bit. More...
u32	XHdmiphy1_SetPrbsSel (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, XHdmiphy1_DirectionType Dir, XHdmiphy1_PrbsPattern Pattern)
	This function will set the TX/RXPRBSEL of the GT. More...
u32	XHdmiphy1_TxPrbsForceError (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, u8 ForceErr)
	This function will force an error in the TX PRBS pattern for the GT. More...
void	XHdmiphy1_SetTxVoltageSwing (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, u8 Vs)
	This function will set the TX voltage swing value for a given channel. More...
void	XHdmiphy1_SetTxPreEmphasis (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, u8 Pe)
	This function will set the TX pre-emphasis value for a given channel. More...
void	XHdmiphy1_SetTxPostCursor (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, u8 Pc)
	This function will set the TX post-cursor value for a given channel. More...
void	XHdmiphy1_SetRxLpm (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, XHdmiphy1_DirectionType Dir, u8 Enable)
	This function will enable or disable the LPM logic in the Video PHY core. More...
u32	XHdmiphy1_DrpWr (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, u16 Addr, u16 Val)
	This function will initiate a write DRP transaction. More...
u16	XHdmiphy1_DrpRd (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, u16 Addr, u16 *RetVal)
	This function will initiate a read DRP transaction. More...
void	XHdmiphy1_MmcmPowerDown (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u8 Hold)
	This function will power down the mixed-mode clock manager (MMCM) core. More...
void	XHdmiphy1_MmcmStart (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir)
	This function will start the mixed-mode clock manager (MMCM) core. More...
void	XHdmiphy1_IBufDsEnable (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u8 Enable)
	This function enables the TX or RX IBUFDS peripheral. More...
void	XHdmiphy1_Clkout1OBufTdsEnable (XHdmiphy1 *InstancePtr, XHdmiphy1_DirectionType Dir, u8 Enable)
	This function enables the TX or RX CLKOUT1 OBUFTDS peripheral. More...
void	XHdmiphy1_SetErrorCallback (XHdmiphy1 *InstancePtr, void *CallbackFunc, void *CallbackRef)
	This function installs a callback function for the HDMIPHY error conditions. More...
void	XHdmiphy1_SetLogCallback (XHdmiphy1 *InstancePtr, u64 *CallbackFunc, void *CallbackRef)
	This function installs an asynchronous callback function for the LogWrite API: More...
void	XHdmiphy1_LogDisplay (XHdmiphy1 *InstancePtr)
	This function will print the entire log. More...
void	XHdmiphy1_LogReset (XHdmiphy1 *InstancePtr)
	This function will reset the driver's logging mechanism. More...
u16	XHdmiphy1_LogRead (XHdmiphy1 *InstancePtr)
	This function will read the last event from the log. More...
void	XHdmiphy1_LogWrite (XHdmiphy1 *InstancePtr, XHdmiphy1_LogEvent Evt, u8 Data)
	This function will insert an event in the driver's logging mechanism. More...
void	XHdmiphy1_InterruptHandler (XHdmiphy1 *InstancePtr)
	This function is the interrupt handler for the XHdmiphy1 driver. More...
u32	XHdmiphy1_SelfTest (XHdmiphy1 *InstancePtr)
	This function runs a self-test on the XHdmiphy1 driver/device. More...
XHdmiphy1_Config *	XHdmiphy1_LookupConfig (u16 DeviceId)
	This function looks for the device configuration based on the unique device ID. More...
u32	XHdmiphy1_Hdmi_CfgInitialize (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_Config *CfgPtr)
	This function initializes the Video PHY for HDMI. More...
u32	XHdmiphy1_SetHdmiTxParam (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, XVidC_PixelsPerClock Ppc, XVidC_ColorDepth Bpc, XVidC_ColorFormat ColorFormat)
	This function update/set the HDMI TX parameter. More...
u32	XHdmiphy1_SetHdmiRxParam (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId)
	This function update/set the HDMI RX parameter. More...
u32	XHdmiphy1_HdmiCfgCalcMmcmParam (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId, XHdmiphy1_DirectionType Dir, XVidC_PixelsPerClock Ppc, XVidC_ColorDepth Bpc)
	This function calculates the HDMI MMCM parameters. More...
void	XHdmiphy1_HdmiUpdateClockSelection (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_SysClkDataSelType TxSysPllClkSel, XHdmiphy1_SysClkDataSelType RxSysPllClkSel)
	This function Updates the HDMIPHY clocking. More...
void	XHdmiphy1_ClkDetFreqReset (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir)
	This function resets clock detector TX/RX frequency. More...
u32	XHdmiphy1_ClkDetGetRefClkFreqHz (XHdmiphy1 *InstancePtr, XHdmiphy1_DirectionType Dir)
	This function returns the frequency of the RX/TX reference clock as measured by the clock detector peripheral. More...
u32	XHdmiphy1_DruGetRefClkFreqHz (XHdmiphy1 *InstancePtr)
	This function returns the frequency of the DRU reference clock as measured by the clock detector peripheral. More...
void	XHdmiphy1_HdmiDebugInfo (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_ChannelId ChId)
	This function prints Video PHY debug information related to HDMI. More...
void	XHdmiphy1_SetHdmiCallback (XHdmiphy1 *InstancePtr, XHdmiphy1_HdmiHandlerType HandlerType, void *CallbackFunc, void *CallbackRef)
	This function installs an HDMI callback function for the specified handler type. More...
u32	XHdmiphy1_Hdmi20Config (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir)
	This function will configure the HDMIPHY to HDMI 2.0 mode. More...
u32	XHdmiphy1_Hdmi21Config (XHdmiphy1 *InstancePtr, u8 QuadId, XHdmiphy1_DirectionType Dir, u64 LineRate, u8 NChannels)
	This function will configure the GT for HDMI 2.1 operation. More...
void	XHdmiphy1_RegisterDebug (XHdmiphy1 *InstancePtr)
	This function prints out Video PHY register and GT Channel and Common DRP register contents. More...