AIEXDialect.h

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//===- AIEDialect.h ---------------------------------------------*- C++ -*-===//
//
// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
// (c) Copyright 2019 Xilinx Inc.
//
//===----------------------------------------------------------------------===//
 
#ifndef MLIR_AIEX_DIALECT_H
#define MLIR_AIEX_DIALECT_H
 
#include "aie/Dialect/AIE/IR/AIEDialect.h"
 
// Include dialect declarations such as parseAttributes, parseType
#include "aie/Dialect/AIEX/IR/AIEXDialect.h.inc"
 
// include TableGen generated Op definitions
#define GET_OP_CLASSES
#include "aie/Dialect/AIEX/IR/AIEX.h.inc"
 
#define GET_TYPEDEF_CLASSES
#include "aie/Dialect/AIEX/IR/AIEXTypes.h.inc"
 
namespace xilinx {
namespace AIEX {
 
uint64_t getBufferDescriptorAddressRegisterAddress(
    const AIE::AIETargetModel &tm, unsigned bd_id, unsigned col, unsigned row);
void getHardwareStridesWraps(const AIE::AIETargetModel &targetModel,
                             mlir::BaseMemRefType referencedBufType,
                             llvm::SmallVector<int64_t, 4> inputSizes,
                             llvm::SmallVector<int64_t, 4> inputStrides,
                             llvm::SmallVector<int64_t, 4> &sizes,
                             llvm::SmallVector<int64_t, 4> &strides);
mlir::LogicalResult
verifyStridesWraps(mlir::Operation *forOp,
                   mlir::BaseMemRefType referencedBufType, int tileCol,
                   int tileRow, llvm::SmallVector<int64_t, 4> inputSizes,
                   llvm::SmallVector<int64_t, 4> inputStrides,
                   llvm::SmallVector<int64_t, 4> hardwareSizes,
                   llvm::SmallVector<int64_t, 4> hardwareStrides,
                   bool skipTransformationChecks = false);
 
} // namespace AIEX
} // namespace xilinx
 
#endif