MLIR-AIE 1.4.5.dev
AIEVecMatMul.h
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1//===- AIEVecMatMul.h - Matmul recipes and tile layouts ---------*- C++ -*-===//
2//
3// Copyright (C) 2026 Advanced Micro Devices, Inc.
4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
5//
6//===----------------------------------------------------------------------===//
7// The tile multiplies that `aievec.matmul` (AIE2) and `aievec.matmul_aie2p`
8// (AIE2P) lower to, and the operand layouts each of them reads. The verifier
9// of the matmul ops, the lowering of `vector.contract` and the lowering to
10// LLVM all choose from this one table.
11//===----------------------------------------------------------------------===//
12
13#ifndef AIE_DIALECT_AIEVEC_IR_AIEVECMATMUL_H
14#define AIE_DIALECT_AIEVEC_IR_AIEVECMATMUL_H
15
17
18#include "mlir/IR/BuiltinTypes.h"
19#include "mlir/IR/Diagnostics.h"
20#include "llvm/ADT/STLFunctionalExtras.h"
21#include "llvm/ADT/SmallVector.h"
22
23#include <optional>
24
25namespace xilinx::aievec {
26
27// One way to multiply an m x k lhs tile by a k x n rhs tile into an m x n
28// accumulator. Names give the operand types and m x k x n.
29enum class MatMulRecipeKind {
30 // AIE2: one `mac.conf` each.
41 // AIE2P integer matrix modes.
44 // AIE2P bf16 through bfp16 (block floating point, one exponent per 8 values
45 // along k), the `8x8_8x8T` matrix mode.
48 // AIE2P bf16 through elementwise multiplies of broadcast rows and columns.
52};
53
56 // The matmul ops take lhs as [m, k] and rhs as [k, n]. These say whether
57 // the recipe reads lhs as [k, m] and rhs as [n, k] instead, so that an
58 // operand stored that way needs no shuffle.
59 bool lhsKM;
60 bool rhsNK;
61};
62
63// The recipe for an m x k x n tile with these element types, if there is one.
64// Integer types are matched by width; their signedness is a separate MAC
65// setting.
66std::optional<MatMulRecipe> getMatMulRecipe(bool aie2p, mlir::Type lhsElemTy,
67 mlir::Type rhsElemTy,
68 mlir::Type accElemTy, int64_t m,
69 int64_t k, int64_t n);
70
71// The shuffle modes that transpose a rows x cols tile of `elemTy` held
72// row-major. Empty when a dim is 1, as the tile then needs no data movement.
73// One mode when the tile fills 512 bits, or 256 bits on AIE2P (the tile then
74// sits in the low half of a 512-bit register). Two modes, the low and high
75// halves of the result, for an 8x8 tile of 16-bit values on AIE2P. Nullopt
76// for any other tile.
77std::optional<llvm::SmallVector<ShuffleMode, 2>>
78getTileTransposeModes(bool aie2p, mlir::Type elemTy, int64_t rows,
79 int64_t cols);
80
81// Checks that lhs times rhs into acc is a tile some recipe multiplies. lhs is
82// stored [m, k], or [k, m] when `lhsTransposed`; rhs is stored [k, n], or
83// [n, k] when `rhsTransposed`; acc is [m, n]. Each stored layout must be the
84// one the recipe reads, or one that getTileTransposeModes turns into it.
85// Returns the recipe. On failure, reports why through `emitError` unless it
86// is null.
87std::optional<MatMulRecipe> checkMatMulTile(
88 bool aie2p, mlir::VectorType lhsTy, mlir::VectorType rhsTy,
89 mlir::VectorType accTy, bool lhsTransposed, bool rhsTransposed,
90 llvm::function_ref<mlir::InFlightDiagnostic()> emitError = nullptr);
91
92} // namespace xilinx::aievec
93
94#endif // AIE_DIALECT_AIEVEC_IR_AIEVECMATMUL_H
std::optional< MatMulRecipe > checkMatMulTile(bool aie2p, mlir::VectorType lhsTy, mlir::VectorType rhsTy, mlir::VectorType accTy, bool lhsTransposed, bool rhsTransposed, llvm::function_ref< mlir::InFlightDiagnostic()> emitError=nullptr)
std::optional< llvm::SmallVector< ShuffleMode, 2 > > getTileTransposeModes(bool aie2p, mlir::Type elemTy, int64_t rows, int64_t cols)
std::optional< MatMulRecipe > getMatMulRecipe(bool aie2p, mlir::Type lhsElemTy, mlir::Type rhsElemTy, mlir::Type accElemTy, int64_t m, int64_t k, int64_t n)