memory_allocator.h

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//===- memory_allocator.h ---------------------------------------*- C++ -*-===//
//
// Copyright (C) 2021-2022 Xilinx, Inc.
// Copyright (C) 2023 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
 
#ifndef AIE_MEMORY_ALLOCATOR_H
#define AIE_MEMORY_ALLOCATOR_H
 
#include "target.h"
 
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
 
// #if defined(__AIESIM__)
// #include "xioutils.h"
// #include <iostream>
// #endif
 
extern "C" {
 
/// Depending on the model of a particular device, this API supports several
/// different scenarios for device memory allocation and reference.
/// For instance, on the VCK190 with ARM host programmed through libXAIE,
/// `mlir_aie_mem_alloc()` might allocate data in device DDR and return a
/// cacheable mapping to it. `mlir_aie_sync_mem_cpu()` and
/// `mlir_aie_sync_mem_dev()` would flush and invalidate caches.
/// A device address would correspond to a DDR physical address.
/// Alternatively in the AIESIM environment, `mlir_aie_mem_alloc()` allocates
/// a duplicate buffer in the host memory and in the simulator memory for each
/// allocation. `mlir_aie_sync_mem_cpu()` and `mlir_aie_sync_mem_dev()` make
/// an explicit copy between these two buffers and device addresses are modeled
/// in a simulator-specific way. Other combinations are also possible, largely
/// representing different tradeoffs between efficiency of host data access vs.
/// efficiency of accelerator access.
 
// static variable for tracking current DDR physical addr during AIESIM
static uint16_t nextAlignedAddr;
 
/// @brief Allocate a buffer in device memory
/// @param ctx The AIE context
/// @param handle External memory model handle for tracking the allocation
/// @param size The number of 32-bit words to allocate
/// @return A host-side pointer that can write into the allocated buffer
/// @note This is a minimal allocator intended for test use.
int *mlir_aie_mem_alloc(aie_libxaie_ctx_t *ctx, ext_mem_model_t &handle,
                        int size);
 
/// @brief Synchronize the buffer from the device to the host CPU.
/// This is expected to be called after the device writes data into
/// device memory, so that the data can be read by the CPU.  In
/// a non-cache coherent system, this implies invalidating the
/// processor cache associated with the buffer.
/// @param handle External memory model handle identifying the buffer to
/// synchronize
void mlir_aie_sync_mem_cpu(ext_mem_model_t &handle);
 
/// @brief Synchronize the buffer from the host CPU to the device.
/// This is expected to be called after the host writes data into
/// device memory, so that the data can be read by the device.  In
/// a non-cache coherent system, this implies flushing the
/// processor cache associated with the buffer.
/// @param handle External memory model handle identifying the buffer to
/// synchronize
void mlir_aie_sync_mem_dev(ext_mem_model_t &handle);
 
/// @brief Return a device address corresponding to the given host address.
/// @param ctx The AIE context
/// @param host_address A host-side pointer returned from mlir_aie_mem_alloc
/// @return The device physical address corresponding to the host pointer
u64 mlir_aie_get_device_address(aie_libxaie_ctx_t *ctx, void *host_address);
 
} // extern "C"
 
#endif