MLIR-AIE 1.4.5.dev
test_library.h
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1//===- test_library.h -------------------------------------------*- C++ -*-===//
2//
3// Copyright (C) 2021-2022 Xilinx, Inc.
4// Copyright (C) 2022-2025 Advanced Micro Devices, Inc.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8#ifndef AIE_TEST_LIBRARY_H
9#define AIE_TEST_LIBRARY_H
10
11#include "target.h"
12#include <stdio.h>
13#include <stdlib.h>
14
15extern "C" {
16
17#define mlir_aie_check(s, r, v, errors) \
18 if (r != v) { \
19 printf("ERROR %s: %s expected %d, but was %d!\n", s, #r, v, r); \
20 errors++; \
21 }
22#define mlir_aie_check_float(s, r, v, errors) \
23 if (r != v) { \
24 printf("ERROR %s: %s expected %f, but was %f!\n", s, #r, v, r); \
25 errors++; \
26 }
27
28// class for using events and PF cpounters
30public:
31 EventMonitor(aie_libxaie_ctx_t *_xaie, u32 _col, u32 _row, u32 _pfc,
32 XAie_Events _startE, XAie_Events _endE, XAie_Events _resetE,
33 XAie_ModuleType _module) {
34 // EventMonitor(struct XAieGbl_Tile *_tilePtr, u32 _pfc, u32 _startE, u32
35 // _endE,
36 // u32 _resetE, XAie_ModuleType _module) {
37 // tilePtr = _tilePtr;
38 devInst = _xaie->XAieDevInst;
39 row = _row;
40 col = _col;
41 pfc = _pfc;
42 mode = _module;
43 XAie_PerfCounterControlSet(devInst, XAie_TileLoc(col, row), mode, pfc,
44 _startE, _endE);
45
46 // mode = _mode; // 0: Core, 1: PL, 2, Mem
47 // if (mode == MODE_CORE) {
48 // XAieTileCore_PerfCounterControl(tilePtr, pfc, _startE, _endE, _resetE);
49 // } else if (mode == MODE_PL) {
50 // XAieTilePl_PerfCounterControl(tilePtr, pfc, _startE, _endE, _resetE);
51 // } else {
52 // XAieTileMem_PerfCounterControl(tilePtr, pfc, _startE, _endE, _resetE);
53 // }
54 }
55 void set() {
56 // XAie_PerfCounterSet(devInst, XAie_TileLoc(col,row), mode, pfc, val);
57 XAie_PerfCounterGet(devInst, XAie_TileLoc(col, row), mode, pfc, &start);
58 // if (mode == MODE_CORE) {
59 // start = XAieTileCore_PerfCounterGet(tilePtr, pfc);
60 // } else if (mode == MODE_PL) {
61 // start = XAieTilePl_PerfCounterGet(tilePtr, pfc);
62 // } else {
63 // start = XAieTileMem_PerfCounterGet(tilePtr, pfc);
64 // }
65 }
66 u32 read() {
67 u32 val;
68 XAie_PerfCounterGet(devInst, XAie_TileLoc(col, row), mode, pfc, &val);
69 return val;
70 // if (mode == MODE_CORE) {
71 // return XAieTileCore_PerfCounterGet(tilePtr, pfc);
72 // } else if (mode == MODE_PL) {
73 // return XAieTilePl_PerfCounterGet(tilePtr, pfc);
74 // } else {
75 // return XAieTileMem_PerfCounterGet(tilePtr, pfc);
76 // }
77 }
78 u32 diff() {
79 u32 end;
80 XAie_PerfCounterGet(devInst, XAie_TileLoc(col, row), mode, pfc, &end);
81 // if (mode == MODE_CORE) {
82 // end = XAieTileCore_PerfCounterGet(tilePtr, pfc);
83 // } else if (mode == MODE_PL) {
84 // end = XAieTilePl_PerfCounterGet(tilePtr, pfc);
85 // } else {
86 // end = XAieTileMem_PerfCounterGet(tilePtr, pfc);
87 // }
88 if (end < start) {
89 printf("WARNING: EventMonitor: performance counter wrapped!\n");
90 return 0; // TODO: fix this
91 } else {
92 return end - start;
93 }
94 }
95
96private:
97 u32 start;
98 u32 pfc;
99 XAie_ModuleType mode;
100 u8 col, row;
101 XAie_DevInst *devInst;
102};
103
104/*
105 ******************************************************************************
106 * Common functions
107 ******************************************************************************
108 */
109
110/// @brief Initialize libXAIE and allocate a new context object.
111/// @return A pointer to the context
114
115int mlir_aie_init_device(aie_libxaie_ctx_t *ctx, uint32_t device_id = 0);
116
117int mlir_aie_acquire_lock(aie_libxaie_ctx_t *ctx, int col, int row, int lockid,
118 int lockval, int timeout);
119int mlir_aie_release_lock(aie_libxaie_ctx_t *ctx, int col, int row, int lockid,
120 int lockval, int timeout);
121u32 mlir_aie_read32(aie_libxaie_ctx_t *ctx, u64 addr);
122void mlir_aie_write32(aie_libxaie_ctx_t *ctx, u64 addr, u32 val);
123u32 mlir_aie_data_mem_rd_word(aie_libxaie_ctx_t *ctx, int col, int row,
124 u64 addr);
125void mlir_aie_data_mem_wr_word(aie_libxaie_ctx_t *ctx, int col, int row,
126 u64 addr, u32 data);
127
128u64 mlir_aie_get_tile_addr(aie_libxaie_ctx_t *ctx, int col, int row);
129
130/// Dump the contents of the memory associated with the given tile.
131void mlir_aie_dump_tile_memory(aie_libxaie_ctx_t *ctx, int col, int row);
132
133/// Clear the contents of the memory associated with the given tile.
134void mlir_aie_clear_tile_memory(aie_libxaie_ctx_t *ctx, int col, int row);
135
136/// Print the status of a dma represented by the given tile.
137void mlir_aie_print_dma_status(aie_libxaie_ctx_t *ctx, int col, int row);
138
139/// Print the status of a memtiledma represented by the given location.
140void mlir_aie_print_memtiledma_status(aie_libxaie_ctx_t *ctx, int col, int row);
141
142/// Print the status of a shimdma represented by the given location (row = 0).
143void mlir_aie_print_shimdma_status(aie_libxaie_ctx_t *ctx, int col, int row);
144
145/// Print the status of a core represented by the given tile.
146void mlir_aie_print_tile_status(aie_libxaie_ctx_t *ctx, int col, int row);
147
148/// Zero out the program and configuration memory of the tile.
149void mlir_aie_clear_config(aie_libxaie_ctx_t *ctx, int col, int row);
150
151/// Zero out the configuration memory of the shim tile.
152void mlir_aie_clear_shim_config(aie_libxaie_ctx_t *ctx, int col, int row);
153
154void computeStats(u32 performance_counter[], int n);
155
156} // extern "C"
157
158#endif
EventMonitor(aie_libxaie_ctx_t *_xaie, u32 _col, u32 _row, u32 _pfc, XAie_Events _startE, XAie_Events _endE, XAie_Events _resetE, XAie_ModuleType _module)
XAie_DevInst * XAieDevInst
Definition target.h:24
void mlir_aie_print_memtiledma_status(aie_libxaie_ctx_t *ctx, int col, int row)
Print the status of a memtiledma represented by the given location.
int mlir_aie_acquire_lock(aie_libxaie_ctx_t *ctx, int col, int row, int lockid, int lockval, int timeout)
Acquire a physical lock.
u32 mlir_aie_data_mem_rd_word(aie_libxaie_ctx_t *ctx, int col, int row, u64 addr)
Read a value from the data memory of a particular tile memory.
void mlir_aie_clear_tile_memory(aie_libxaie_ctx_t *ctx, int col, int row)
Clear the contents of the memory associated with the given tile.
u64 mlir_aie_get_tile_addr(aie_libxaie_ctx_t *ctx, int col, int row)
Return the base address of the given tile.
void mlir_aie_clear_shim_config(aie_libxaie_ctx_t *ctx, int col, int row)
Zero out the configuration memory of the shim tile.
void mlir_aie_clear_config(aie_libxaie_ctx_t *ctx, int col, int row)
Zero out the program and configuration memory of the tile.
void mlir_aie_print_dma_status(aie_libxaie_ctx_t *ctx, int col, int row)
Print the status of a dma represented by the given tile.
void mlir_aie_deinit_libxaie(aie_libxaie_ctx_t *)
Release access to the libXAIE context.
int mlir_aie_release_lock(aie_libxaie_ctx_t *ctx, int col, int row, int lockid, int lockval, int timeout)
Release a physical lock.
int mlir_aie_init_device(aie_libxaie_ctx_t *ctx, uint32_t device_id=0)
Initialize the device represented by the context.
void mlir_aie_print_shimdma_status(aie_libxaie_ctx_t *ctx, int col, int row)
Print the status of a shimdma represented by the given location (row = 0).
u32 mlir_aie_read32(aie_libxaie_ctx_t *ctx, u64 addr)
Read the AIE configuration memory at the given physical address.
void mlir_aie_dump_tile_memory(aie_libxaie_ctx_t *ctx, int col, int row)
Dump the contents of the memory associated with the given tile.
void computeStats(u32 performance_counter[], int n)
Given an array of values, compute and print statistics about those values.
void mlir_aie_write32(aie_libxaie_ctx_t *ctx, u64 addr, u32 val)
Write the AIE configuration memory at the given physical address.
aie_libxaie_ctx_t * mlir_aie_init_libxaie()
Initialize libXAIE and allocate a new context object.
void mlir_aie_data_mem_wr_word(aie_libxaie_ctx_t *ctx, int col, int row, u64 addr, u32 data)
Write a value to the data memory of a particular tile memory.
void mlir_aie_print_tile_status(aie_libxaie_ctx_t *ctx, int col, int row)
Print the status of a core represented by the given tile.