.. _Check PIDX Update: Check PIDX Update ================= +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Name | How to check? | Programmed by | Maintained by | Key information | PIDX/CIDX | +===============================================================+=================================+=============================================+========================================================================+=========================================================================================================================================================================================================================+======================================================+ | Completion Queue Descriptor Status | dma-ctl (dump queue completion) | Completion Engine | Completion Engine | Last location of Completion Ring | Contains PIDX/CIDX/Interrupt Status/Color status bit | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | H2C Stream Writeback Status Descriptor | dma-ctl (dump queue descriptor) | Descriptor Engine | Descriptor Engine | Last location of H2C Queue | Containx PIDX and CIDX | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | MM C2H/H2C - Writeback Status Structure | dma-ctl (dump queue descriptor) | Descriptor Engine | Descriptor Engine | Last Location of H2C/C2H Queue | Containx PIDX and CIDX | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Software maintains CIDX and copy of PIDX for completion queue | | | | | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Software maintains PIDX and copy of CIDX for H2C/C2H queues | | | | | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Descriptor Engine also maintains CIDX and a copy of SW PIDX | dma-ctl (dump queue) | Available in Hardware Context and Software Context | | +---------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | | +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Descriptor Context | Indexed by H2C and C2H QID | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Hardware Context | dma-ctl (dump queue) | Descriptor Engine | Once the queue is enabled, context is dynamically updated by Hardware. | Contains Status Only | Contains CIDX Information | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Credit Context | dma-ctl (dump queue) | Descriptor Engine | | Contains Status Only | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Software Context | dma-ctl (dump queue) | Driver | | Software context should only be updated through the direct mapped address space to update the PIDX and Interrupt Arm bit. See QDMA_DMAP_SEL_H2C_DSC_PIDX[2048] (0x18004) and QDMA_DMAP_SEL_C2H_DSC_PIDX[2048] (0x18008) | Contains PIDX information | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Completion Context | dmactl | Driver (PIDX is initialized to 0 by driver) | Completion Engine | Maintained on Per Queue basis. Stores the base address of the Completion Ring, PIDX, CIDX etc. | Contains completion PIDX & CIDX information | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Prefetch Context | dma-ctl (dump queue) | Driver | | | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Interrupt Context | dma-ctl (dump queue) | Driver | | | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Host Profile Context | dma-ctl (dump queue) | Driver | | | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | Interrupt Aggregation Ring | dma-ctl | | Hardware | If the interrupts for multipe queues are aggregated into the interrupt aggregatoin ring, the status descriptor information is available in the interrupt aggretatoin ring as well | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+ | CMPT Entry | dma-ctl (dump queue completion) | Completion Engine | Completion Engine | Contains Color Bit informaton | | +---------------------------------------------------------------+---------------------------------+---------------------------------------------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+