Introduction

This article describes the steps for running the PL XDMA RP Bridge example design using the Bare Metal driver in 2023.2 Vitis SDK on a ZCU106 board.

The file xdmapcie_rc_enumerate_example contains a design example for using XDMA PCIe IP in AXI Bridge Root Port Mode and its driver.

Vivado Version Compatibility

The details provided in this blog are based on Vivado 2023.2. However, the principles apply to later Vivado versions as well.