Presentations

Vitis

Title YouTube Link PDF Link
Xilinx Platforms Introduction alt text Xilinx Platforms Introduction alt text
Intro to Vitis for Acceleration Platforms alt text Intro to Vitis for Acceleration Platforms alt text
Vitis Tool Flow alt text Vitis Tool Flow alt text
Open CL Execution Model alt text Open CL Execution Model alt text
Vitis Design Analysis alt text Vitis Design Analysis alt text
Vitis Design Methodology alt text Vitis Design Methodology alt text
Host Code Optimization alt text Host Code Optimization alt text
Kernel Optimization alt text Kernel Optimization alt text
Vitis Accelerated Libraries alt text Vitis Accelerated Libraries alt text
Vitis hardware debug   alt text
Vitis RTL kernels Accelerated Libraries   alt text

PYNQ

PYNQ introduction, and short lab companion videos that cover topics that are not addressed in the main presentation. We recommend watching the lab while doing the PYNQ labs.

Title YouTube Link
PYNQ for Compute Acceleration alt text PYNQ for Compute Acceleration
Lab: Using Multiple Devices alt text Lab: Using Multiple Devices
Lab: Hardware Emulation alt text Lab: Hardware Emulation
Lab: Packaging Your Designs alt text Lab: Packaging Your Designs

Overview of the Vitis flow

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  1. Vitis is the development environment used to create host applications and hardware accelerators. It includes host CPU and FPGA compilers as well as profiling and debugging tools
  2. In Vitis, the host application can be written in C or C++ and uses the OpenCL API or the XRT (Xilinx Runtime Library) to interact with the accelerated hardware functions running on the FPGA. The accelerated hardware functions (also referred to as ‘hardware kernels’, or just ‘kernels’) can be written in C, C++, OpenCL or RTL

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