Vitis Accel Examples Documentation

Welcome to the Vitis Accel Examples documentation. The repository contains the latest examples to get you started with application optimization targeting Xilinx PCIe FPGA acceleration boards and Xilinx SoC FPGA acceleration boards. All examples are ready to be compiled and executed on Vitis supported boards and accelerated cloud service partners.

Table of Contents

• Prerequisites
• Supported Shells
• Compilation and Execution

Category of Examples

• Hello World
• AIE Examples
• Host OpenCL
• Host Native XRT
• Host Python
• C++ Kernels
• Demos
• Emulation Examples
• Performance Examples
• System Optimization Kernels
• RTL Kernels
• OpenCL Kernels
• Validate

Common Utilities

• Common Files