There are two tables, named Lineitem and Orders, which are filled with random data.


For representing the resource utilization in each benchmark, we separate the overall utilization into 2 parts, where P stands for the resource usage in platform, that is those instantiated in static region of the FPGA card, as well as K represents those used in kernels (dynamic region). The target device is set to Alveo U280.

Table 1 Performance on FPGA
Architecture Dataset Latency(ms) Timing LUT(P/K) BRAM(P/K) URAM(P/K) DSP(P/K)
Compound Sort (U280) Orders 131072 rows 1.130 287MHz 142.0K/62.7K 285/18 0/16 7/0
Hash Anti-Join (U280) Lineitem 6001215 rows Orders 227597 rows 342.568 250MHz 130.4K/134.6K 204/291 0/192 4/99
Hash Group Aggregate (U280) Lineitem 6000000 rows 34.702 200MHz 203.0K/184.1K 427/207 0/256 10/0
Hash Join V2 (U280) Lineitem 6001215 rows Orders 227597 rows 55.95 282MHz 122.1K/63.7K 202/98 0/64 4/3
Hash Join V3 (U280) Lineitem 6001215 rows Orders 227597 rows 65.26 240MHz 197.0K/128.2K 359/239 0/192 10/99
Hash Join V4 (U280) Lineitem 6001215 rows Orders 227597 rows 1354.795 240MHz 201.5/110.1K 359/187 0/256 10/19
Hash Multi-Join (U280) Lineitem 6001215 rows Orders 1500000 rows 76.899 200MHz 130.6K/133.4K 204/271 0/192 4/99
Hash Semi-Join (U280) Lineitem 6001215 rows Orders 1500000 rows 18.914 274MHz 124.0K/67.6K 202/120 0/64 4/3

These are details for benchmark result and usage steps.

Test Overview

Here are benchmarks of the Vitis Database Library using the Vitis environment.

Vitis Database Library

  • Download code

These database benchmarks can be downloaded from vitis libraries master branch.

git clone
cd Vitis_Libraries
git checkout master
cd database
  • Setup environment

Specifying the corresponding Vitis, XRT, and path to the platform repository by running following commands.

source <intstall_path>/installs/lin64/Vitis/2021.1_released/
source /opt/xilinx/xrt/
export PLATFORM_REPO_PATHS=/opt/xilinx/platforms