Xilinx is now a part of AMD | Learn More
Vitis Sparse Library
2022.1

Library Overview

  • Requirements
  • License
  • Trademark Notice
  • Release Note

User Guide

  • L1 Primitives User Guide
    • Primitive Overview
    • Primitive Implementation Details
    • API Functions of xf::sparse
  • L2 Kernel User Guide

Benchmark Result

  • Benchmark

This Page

  • Show Source
Vitis Sparse Library
  • »
  • L1 Primitives User Guide
  • View page source

L1 Primitives User Guide¶

  • Primitive Overview
    • 1. Scatter-gather logic
    • 2. Row-wise accumulator
    • 3. Buffer and distribute input column vector entries and the column pointers of NNZs
  • Primitive Implementation Details
    • Scatter-Gather Logic Implementation
    • Row-wise Accumulator Implementation
    • Column Vector Buffering and Distribution Implementation
  • API Functions of xf::sparse
    • xBarCol
    • xBarRow
    • rowAgg
    • cscRow
    • dispColVec
    • dispCol
    • dispNnzCol
Next Previous

Last updated on April 20, 2022.


  • 日本語
  • 简体中文
  • Connect on LinkedIn
  • Follow us on Twitter
  • Connect on Facebook
  • Watch us on YouTube
  • Subscribe to Newsletter
  • 日本語
  • 简体中文
©2022 Advanced Micro Devices, Inc
  • Terms and Conditions
  • Privacy
  • Cookie Policy
  • Trademarks
  • Statement on Forced Labor
  • Fair and Open Competition
  • UK Tax Strategy
  • Inclusive Terminology
  • Cookies Settings