XRT Logo
Master

Introduction

  • XRT and Vitis™ Platform Overview
  • System Requirements
  • Building the XRT Software Stack
  • XRT Installation
  • Developer Build and Test Instructions

Use Model and Features

  • Execution Model Overview
  • XRT Controlled Kernel Execution Models
  • Multi-Process Support
  • PCIe Peer-to-Peer (P2P)
  • Memory-to-Memory (M2M)
  • Host Memory Access
  • Configuration File xrt.ini

User API Library

  • Xilinx OpenCL extension
  • XRT Native APIs
  • XRT Native Library C++ API
  • XRT Native Library C API

XRT Developer's Space

  • Alveo™ Platform Loading Overview
  • Linux Sys FileSystem Nodes
  • Binary Formats
  • Embedded Runtime Library
  • XCLMGMT (PCIe Management Physical Function) Driver Interfaces
  • XOCL (PCIe User Physical Function) Driver Interfaces
  • ZOCL Driver Interfaces

Tools and Utilities

  • xclbinutil
  • xrt-smi
  • xbmgmt
  • xbflash2
  • xball
  • xbtop
  • Utility Migration Guide
  • xrt nagios plugin

Building Platforms

  • XRT Setup for Embedded Flow
  • Developer Build and Test Instructions

Cloud Support

  • Mailbox Subdevice Driver
  • Mailbox Inter-domain Communication Protocol
  • MSD/MPD and Plugins
  • FPGA device readiness within user VM
  • Accessing vsec within VM

Security

  • Security of Alveo Platform

Python binding

  • XRT Python Bindings

Debug and Faqs

  • XRT/Board Debug FAQ
XRT
  • »
  • Search

© Copyright 2017-2023, Advanced Micro Devices, Inc. Last updated on October 7, 2022.

Terms and Conditions | Privacy | Cookie Policy | Trademarks | Statement on Forced Labor | Fair and Open Competition | UK Tax Strategy | Inclusive Terminology | Cookies Settings


Built with Sphinx using a theme provided by Read the Docs.