Vitis Drivers API Documentation
xaxicdma_example_hybrid_poll.c File Reference


This file demonstrates how to use xaxicdma driver on the Xilinx AXI CDMA core (AXICDMA) to transfer packets in hybrid transfer mode without interrupt.

There are three transfers: a simple transfer, a sg transfer, and another simple transfer.

The completion of the transfer is checked through polling. Using polling mode can give better performance on an idle system, where the DMA engine is lowly loaded, and the application has nothing else to do. The polling mode can yield better turn-around time for DMA transfers.

Modify NUMBER_OF_BDS_TO_TRANSFER for a different number of BDs to be transferred in the SG transfer.

To see the debug print, you need a uart16550 or uartlite in your system, and please set "-DDEBUG" in your compiler options for the example, also comment out the "#undef DEBUG" in xdebug.h. You need to rebuild your software executable.

Make sure that MEMORY_BASE is defined properly as per the HW system and the transfer length should be cache-line size aligned.

Ver   Who  Date     Changes

1.00a jz 07/30/10 First release 2.01a rkv 02/01/11 Modified function prototype of XAxiCdma_HybridPollExample to a function taking only one arguments i.e. device id. 2.01a srt 03/06/12 Added V7 DDR Base Address to fix CR 649405. Modified Flushing and Invalidation of Caches to fix CRs 648103, 648701. 2.02a srt 03/01/13 Updated DDR base address for IPI designs (CR 703656). 4.1 adk 01/07/16 Updated DDR base address for Ultrascale (CR 799532) and removed the defines for S6/V6. 4.3 ms 01/22/17 Modified xil_printf statement in main function to ensure that "Successfully ran" and "Failed" strings are available in all examples. This is a fix for CR-965028. ms 04/05/17 Modified Comment lines in functions to recognize it as documentation block for doxygen generation of examples. 4.4 rsp 02/22/18 Support data buffers above 4GB.Use UINTPTR for storing and typecasting buffer address(CR-995116). 4.8 sk 07/10/20 Fix CheckData failure by adding the Cache operations for receive and destination buffers. 4.8 sk 09/30/20 Modify the buffer length to make it cache-line aligned. 4.10 sa 08/12/22 Updated the example to use latest MIG cannoical define i.e XPAR_MIG_0_C0_DDR4_MEMORY_MAP_BASEADDR. 4.11 sa 09/29/22 Fix infinite loops in the examples.


int XAxiCdma_HybridPollExample (u16 DeviceId)
 The example to do hybrid transfers through polling. More...
int main ()
 The entry point for this example. More...

Function Documentation

int main ( void  )

The entry point for this example.

It sets up uart16550 if one is available, invokes the example function, and reports the execution status.

  • XST_SUCCESS if example finishes successfully
  • XST_FAILURE if example fails.

References XAxiCdma_HybridPollExample().

int XAxiCdma_HybridPollExample ( u16  DeviceId)

The example to do hybrid transfers through polling.

The transfer sequence is: a simple polled transfer a scatter gather polled transfer with multiple BDs a simple polled transfer

DeviceIdis the Device Id of the XAxiCdma instance
  • XST_SUCCESS if example finishes successfully
  • XST_FAILURE if error occurs
If the hardware build has problems with interrupt, then this function hangs

References XAxiCdma_CfgInitialize(), XAxiCdma_IntrDisable(), XAxiCdma_LookupConfig(), and XAXICDMA_XR_IRQ_ALL_MASK.

Referenced by main().