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axidma
Vitis Drivers API Documentation
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axidma
Vitis Drivers API Documentation
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This file demonstrates how to use the xaxidma driver on the Xilinx AXI DMA core (AXIDMA) to transfer multiple packets in polling mode when the AXI DMA core is configured in Scatter Gather Mode.
This code assumes a loopback hardware widget is connected to the AXI DMA core for data packet loopback.
To see the debug print, you need a Uart16550 or uartlite in your system, and please set "-DDEBUG" in your compiler options. You need to rebuild your software executable.
MODIFICATION HISTORY:
Ver Who Date Changes ----- ---- -------- ------------------------------------------------------- 1.00a jz 05/17/10 First release 2.00a jz 08/10/10 Second release, added in xaxidma_g.c, xaxidma_sinit.c, updated tcl file, added xaxidma_porting_guide.h, removed workaround for endianness 4.00a rkv 02/22/11 Name of the file has been changed for naming consistency 5.00a srt 03/06/12 Added Flushing and Invalidation of Caches to fix CRs 648103, 648701. Added V7 DDR Base Address to fix CR 649405. 6.00a srt 03/27/12 Changed API calls to support MCDMA driver. 7.00a srt 06/18/12 API calls are reverted back for backward compatibility. 7.02a srt 03/01/13 Updated DDR base address for IPI designs (CR 703656). 9.1 adk 01/07/16 Updated DDR base address for Ultrascale (CR 799532) and removed the defines for S6/V6. 9.3 ms 01/23/17 Modified xil_printf statement in main function to ensure that "Successfully ran" and "Failed" strings are available in all examples. This is a fix for CR-965028. ms 04/05/17 Added tabspace for return statements in functions for proper documentation while generating doxygen. 9.5 adk 17/10/17 Marked the BD region as Normal Non-Cacheable for A53 (CR#987026). 9.6 rsp 02/14/18 Support data buffers above 4GB.Use UINTPTR for storing and typecasting buffer address(CR-992638). 9.9 rsp 01/21/19 Fix use of #elif check in deriving DDR_BASE_ADDR. 9.10 rsp 09/17/19 Fix cache maintenance ops for source and dest buffer. 9.14 sk 03/08/22 Delete DDR memory limits comments as they are not relevant to this driver version. 9.15 sa 08/12/22 Updated the example to use latest MIG cannoical define i.e XPAR_MIG_0_C0_DDR4_MEMORY_MAP_BASEADDR.
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| int | main (void) |
| Main function. More... | |
| int main | ( | void | ) |
Main function.
This function is the main entry of the tests on DMA core. It sets up DMA engine to be ready to receive and send packets, then a packet is transmitted and will be verified after it is received via the DMA loopback widget.
| None |
References XAxiDma_CfgInitialize(), XAxiDma_HasSg, and XAxiDma_LookupConfig().