xaxidma_example_sgcyclic_intr.c File Reference

Overview

This file demonstrates how to use the xaxidma driver on the Xilinx AXI DMA core (AXIDMA) to transfer packets in interrupt mode when the AXIDMA core is configured in Scatter Gather Mode.

This example demonstrates how to use cyclic DMA mode feature. This program will recycle the NUMBER_OF_BDS_TO_TRANSFER buffer descriptors to specified number of cyclic transfers defined in "NUMBER_OF_CYCLIC_TRANSFERS".

This code assumes a loopback hardware widget is connected to the AXI DMA core for data packet loopback.

To see the debug print, you need a Uart16550 or uartlite in your system, and please set "-DDEBUG" in your compiler options. You need to rebuild your software executable.

MODIFICATION HISTORY:

Ver   Who  Date     Changes
----- ---- -------- -------------------------------------------------------
9.4   adk  25/07/17 Initial version.
9.6   rsp  02/14/18 Support data buffers above 4GB.Use UINTPTR for storing
                    and typecasting buffer address(CR-992638).
9.8   rsp  07/24/18 Set TX DMACR[Cyclic BD enable] before starting DMA
                    operation i.e. in TxSetup.
9.9   rsp  01/21/19 Fix use of #elif check in deriving DDR_BASE_ADDR.
      rsp  02/05/19 For test completion wait for both TX and RX done counters.
9.10  rsp  09/17/19 Fix cache maintenance ops for source and dest buffer.
9.14  sk   03/08/22 Delete DDR memory limits comments as they are not
                       relevant to this driver version.
9.15  sa   08/12/22 Updated the example to use latest MIG cannoical define
                       i.e XPAR_MIG_0_C0_DDR4_MEMORY_MAP_BASEADDR.
9.16  sa   09/29/22 Fix infinite loops in the example.

---

Functions
int	main (void)
	Main function. More...

Function Documentation

int main

(

void

)

Main function.

This function is the main entry of the interrupt test. It does the following:

• Set up the output terminal if UART16550 is in the hardware build
• Initialize the DMA engine
• Set up Tx and Rx channels
• Set up the interrupt system for the Tx and Rx interrupts
• Submit a transfer
• Wait for the transfer to finish
• Check transfer status
• Disable Tx and Rx interrupts
• Print test status and exit

Parameters

None

Returns

• XST_SUCCESS if tests pass
• XST_FAILURE if fails.

Note

None.

References XAxiDma_CfgInitialize(), XAxiDma_GetRxRing, XAxiDma_GetTxRing, XAxiDma_HasSg, XAxiDma_LookupConfig(), and XAxiDma_Reset().