|  | axidma
    Vitis Drivers API Documentation | 
This file demonstrates how to use the xaxidma driver on the Xilinx AXI DMA core (AXIDMA) to transfer packets in polling mode when the AXI DMA core is configured in simple mode.
This code assumes a loopback hardware widget is connected to the AXI DMA core for data packet loopback.
To see the debug print, you need a Uart16550 or uartlite in your system, and please set "-DDEBUG" in your compiler options. You need to rebuild your software executable.
MODIFICATION HISTORY:
Ver   Who  Date     Changes
----- ---- -------- -------------------------------------------------------
4.00a rkv  02/22/11 New example created for simple DMA, this example is for
               simple DMA
5.00a srt  03/06/12 Added Flushing and Invalidation of Caches to fix CRs
               648103, 648701.
               Added V7 DDR Base Address to fix CR 649405.
6.00a srt  03/27/12 Changed API calls to support MCDMA driver.
7.00a srt  06/18/12 API calls are reverted back for backward compatibility.
7.01a srt  11/02/12 Buffer sizes (Tx and Rx) are modified to meet maximum
               DDR memory limit of the h/w system built with Area mode
7.02a srt  03/01/13 Updated DDR base address for IPI designs (CR 703656).
9.1   adk  01/07/16 Updated DDR base address for Ultrascale (CR 799532) and
               removed the defines for S6/V6.
9.3   ms   01/23/17 Modified xil_printf statement in main function to
                    ensure that "Successfully ran" and "Failed" strings are
                    available in all examples. This is a fix for CR-965028.
      ms   04/05/17 Modified Comment lines in functions to
                    recognize it as documentation block for doxygen
                    generation of examples.
9.9   rsp  01/21/19 Fix use of #elif check in deriving DDR_BASE_ADDR.
9.10  rsp  09/17/19 Fix cache maintenance ops for source and dest buffer.
9.14  sk   03/08/22 Delete DDR memory limits comments as they are not
                       relevant to this driver version.
9.15  sa   08/12/22 Updated the example to use latest MIG cannoical define
                       i.e XPAR_MIG_0_C0_DDR4_MEMORY_MAP_BASEADDR.
9.16  sa   09/29/22 Fix infinite loops in the example.
| Functions | |
| int | XAxiDma_SimplePollExample (u16 DeviceId) | 
| The example to do the simple transfer through polling.  More... | |
| int | main () | 
| The entry point for this example.  More... | |
| int main | ( | void | ) | 
The entry point for this example.
It invokes the example function, and reports the execution status.
| None. | 
References XAxiDma_SimplePollExample().
| int XAxiDma_SimplePollExample | ( | u16 | DeviceId | ) | 
The example to do the simple transfer through polling.
The constant NUMBER_OF_TRANSFERS defines how many times a simple transfer is repeated.
| DeviceId | is the Device Id of the XAxiDma instance | 
References XAxiDma_Busy(), XAxiDma_CfgInitialize(), XAxiDma_HasSg, XAxiDma_IntrDisable, XAXIDMA_IRQ_ALL_MASK, XAxiDma_LookupConfig(), and XAxiDma_SimpleTransfer().
Referenced by main().