Data Structures
struct	XCsi_SPktData
	This typedef contains the Short Packet information from the Generic Short Packet Register. More...

struct	XCsi_VCInfo
	This typdef contains the structure for getting the information about a Virtual Channel. More...

struct	XCsi_ClkLaneInfo
	This typdef contains the structure for getting the information about the Clock Lane. More...

struct	XCsi_DataLaneInfo
	This typdef contains the structure for getting the information about the Data Lane. More...

struct	XCsi_Config
	The configuration structure for CSI Controller. More...

struct	XCsi
	The XCsi driver instance data. More...

Macros
#define	XCSI_H_
	Prevent circular inclusions by using protection macros. More...

#define	XCSI_ENABLE 1
	Flag denoting enabling of CSI. More...

#define	XCSI_DISABLE 0
	Flag denoting disabling of CSI. More...

#define	XCSI_MAX_LANES 4
	Max Lanes supported by CSI. More...

#define	XCSI_V10_MAX_VC 4
	Max Virtual Channels supported for v1.0. More...

#define	XCSI_V20_MAX_VC 16
	Max Virtual Channels supported for v2.0. More...

#define	XCSI_MAX_VC 16
	Max Virtual Channels supported for CSI. More...

#define	XCSI_HW_H_
	Prevent circular inclusions by using protection macros. More...

Typedefs
typedef void(*	XCsi_CallBack )(void *CallBackRef, u32 Mask)
	Callback type for all interrupts defined. More...

Functions
u32	XCsi_CfgInitialize (XCsi InstancePtr, XCsi_Config CfgPtr, UINTPTR EffectiveAddr)
	Initialize the XCsi instance provided by the caller based on the given Config structure. More...

u32	XCsi_Reset (XCsi *InstancePtr)
	This function will do a reset of the IP. More...

u32	XCsi_Activate (XCsi *InstancePtr, u8 Flag)
	Thsi function will enable/disable the IP Core to start processing. More...

u32	XCsi_Configure (XCsi *InstancePtr)
	This function will configure the core with proper number of Active Lanes. More...

void	XCsi_SetVCSelection (XCsi *InstancePtr, u16 Value)
	This function will control the virtual channels selection dynamically. More...

u32	XCsi_GetVCSelection (XCsi *InstancePtr)
	This function will return the virtual channels selected. More...

void	XCsi_GetShortPacket (XCsi InstancePtr, XCsi_SPktData ShortPacketStruct)
	This function will get the short packet received in the FIFO from the Generic Short Packet Register and fill up the structure passed from caller. More...

void	XCsi_GetClkLaneInfo (XCsi InstancePtr, XCsi_ClkLaneInfo ClkLane)
	This function will get the information about the state of the Clock Lane. More...

void	XCsi_GetDataLaneInfo (XCsi InstancePtr, u8 Lane, XCsi_DataLaneInfo DataLane)
	This function will get the information about the state of a Data Lane. More...

void	XCsi_GetVCInfo (XCsi InstancePtr, u8 Vc, XCsi_VCInfo VCInfo)
	This function will get the line count, byte count and data type information about a Virtual Channel. More...

u8	XCsi_IsActiveLaneCountValid (XCsi *InstancePtr, u8 ActiveLanesCount)
	This function checks the validity of the active lanes parameter. More...

XCsi_Config *	XCsi_LookupConfig (u32 DeviceId)
	Look up the hardware configuration for a device instance. More...

u32	XCsi_SelfTest (XCsi *InstancePtr)
	Runs a self-test on the driver/device. More...

void	XCsi_IntrHandler (void *InstancePtr)
	This function is the interrupt handler for the CSI2 Rx core. More...

int	XCsi_SetCallBack (XCsi InstancePtr, u32 HandleType, void Callbackfunc, void *Callbackref)
	This routine installs an asynchronous callback function for the given HandlerType: More...

u32	XCsi_GetIntrEnable (XCsi *InstancePtr)
	This function will get the interrupt mask set (enabled) in the CSI2 Rx core. More...

void	XCsi_IntrEnable (XCsi *InstancePtr, u32 Mask)
	This function will enable the interrupts present in the interrupt mask passed onto the function. More...

void	XCsi_IntrDisable (XCsi *InstancePtr, u32 Mask)
	This function will disable the interrupts present in the interrupt mask passed onto the function. More...

u32	XCsi_GetIntrStatus (XCsi *InstancePtr)
	This function will get the list of interrupts pending in the Interrupt Status Register of the CSI2 Rx core. More...

void	XCsi_InterruptClear (XCsi *InstancePtr, u32 Mask)
	This function will clear the interrupts set in the Interrupt Status Register of the CSI2 Rx core. More...

Interrupt Types for setting Callbacks
#define	XCSI_HANDLER_DPHY 1

#define	XCSI_HANDLER_PKTLVL 2

#define	XCSI_HANDLER_PROTLVL 3

#define	XCSI_HANDLER_SHORTPACKET 4

#define	XCSI_HANDLER_FRAMERECVD 5

#define	XCSI_HANDLER_VCXERR 6

#define	XCSI_HANDLER_OTHERERROR 7

Device registers
Register sets of MIPI CSI2 Rx Core
#define	XCSI_CCR_OFFSET 0x00000000
	Core Configuration Register. More...

#define	XCSI_PCR_OFFSET 0x00000004
	Protocol Configuration Register. More...

#define	XCSI_CSR_OFFSET 0x00000010
	Core Status Register. More...

#define	XCSI_GIER_OFFSET 0x00000020
	Global Interrupt Register. More...

#define	XCSI_ISR_OFFSET 0x00000024
	Interrupt Status Register. More...

#define	XCSI_IER_OFFSET 0x00000028
	Interrupt Enable Register. More...

#define	XCSI_VC_SEL_OFFSET 0x0000002C
	VC Selection Register. More...

#define	XCSI_SPKTR_OFFSET 0x00000030
	Generic Short Packet Register. More...

#define	XCSI_VCX_FE_OFFSET 0x00000034
	VCx Frame Error Register. More...

#define	XCSI_CLKINFR_OFFSET 0x0000003C
	Clock Lane Info Register. More...

#define	XCSI_L0INFR_OFFSET 0x00000040
	Lane Information Registers. More...

#define	XCSI_L1INFR_OFFSET 0x00000044
	Lane 1 Info Register. More...

#define	XCSI_L2INFR_OFFSET 0x00000048
	Lane 2 Info Register. More...

#define	XCSI_L3INFR_OFFSET 0x0000004C
	Lane 3 Info Register. More...

#define	XCSI_VC0INF1R_OFFSET 0x00000060
	Image Information Register for each Virtual Channel. More...

#define	XCSI_VC0INF2R_OFFSET 0x00000064
	Virtual Channel 0 Image Information 2 Register. More...

#define	XCSI_VC1INF1R_OFFSET 0x00000068
	Virtual Channel 1 Image Information 1 Register. More...

#define	XCSI_VC1INF2R_OFFSET 0x0000006C
	Virtual Channel 1 Image Information 2 Register. More...

#define	XCSI_VC2INF1R_OFFSET 0x00000070
	Virtual Channel 2 Image Information 1 Register. More...

#define	XCSI_VC2INF2R_OFFSET 0x00000074
	Virtual Channel 2 Image Information 2 Register. More...

#define	XCSI_VC3INF1R_OFFSET 0x00000078
	Virtual Channel 3 Image Information 1 Register. More...

#define	XCSI_VC3INF2R_OFFSET 0x0000007C
	Virtual Channel 3 Image Information 2 Register. More...

#define	XCSI_VC4INF1R_OFFSET 0x00000080
	Virtual Channel 4 Image Information 1 Register. More...

#define	XCSI_VC4INF2R_OFFSET 0x00000084
	Virtual Channel 4 Image Information 2 Register. More...

#define	XCSI_VC5INF1R_OFFSET 0x00000088
	Virtual Channel 5 Image Information 1 Register. More...

#define	XCSI_VC5INF2R_OFFSET 0x0000008C
	Virtual Channel 5 Image Information 2 Register. More...

#define	XCSI_VC6INF1R_OFFSET 0x00000090
	Virtual Channel 6 Image Information 1 Register. More...

#define	XCSI_VC6INF2R_OFFSET 0x00000094
	Virtual Channel 6 Image Information 2 Register. More...

#define	XCSI_VC7INF1R_OFFSET 0x00000098
	Virtual Channel 7 Image Information 1 Register. More...

#define	XCSI_VC7INF2R_OFFSET 0x0000009C
	Virtual Channel 7 Image Information 2 Register. More...

#define	XCSI_VC8INF1R_OFFSET 0x000000A0
	Virtual Channel 8 Image Information 1 Register. More...

#define	XCSI_VC8INF2R_OFFSET 0x000000A4
	Virtual Channel 8 Image Information 2 Register. More...

#define	XCSI_VC9INF1R_OFFSET 0x000000A8
	Virtual Channel 9 Image Information 1 Register. More...

#define	XCSI_VC9INF2R_OFFSET 0x000000AC
	Virtual Channel 9 Image Information 2 Register. More...

#define	XCSI_VC10INF1R_OFFSET 0x000000B0
	Virtual Channel 10 Image Information 1 Register. More...

#define	XCSI_VC10INF2R_OFFSET 0x000000B4
	Virtual Channel 10 Image Information 2 Register. More...

#define	XCSI_VC11INF1R_OFFSET 0x000000B8
	Virtual Channel 11 Image Information 1 Register. More...

#define	XCSI_VC11INF2R_OFFSET 0x000000BC
	Virtual Channel 11 Image Information 2 Register. More...

#define	XCSI_VC12INF1R_OFFSET 0x000000C0
	Virtual Channel 12 Image Information 1 Register. More...

#define	XCSI_VC12INF2R_OFFSET 0x000000C4
	Virtual Channel 12 Image Information 2 Register. More...

#define	XCSI_VC13INF1R_OFFSET 0x000000C8
	Virtual Channel 13 Image Information 1 Register. More...

#define	XCSI_VC13INF2R_OFFSET 0x000000CC
	Virtual Channel 13 Image Information 2 Register. More...

#define	XCSI_VC14INF1R_OFFSET 0x000000D0
	Virtual Channel 14 Image Information 1 Register. More...

#define	XCSI_VC14INF2R_OFFSET 0x000000D4
	Virtual Channel 14 Image Information 2 Register. More...

#define	XCSI_VC15INF1R_OFFSET 0x000000D8
	Virtual Channel 15 Image Information 1 Register. More...

#define	XCSI_VC15INF2R_OFFSET 0x000000DC
	Virtual Channel 15 Image Information 2 Register. More...

Bitmasks and offsets of XCSI_CCR_OFFSET register
This register is used for the enabling/disabling and resetting the core of CSI2 Rx Controller
#define	XCSI_CCR_SOFTRESET_MASK 0x00000002
	Soft Reset the core. More...

#define	XCSI_CCR_COREENB_MASK 0x00000001
	Enable/Disable core. More...

#define	XCSI_CCR_SOFTRESET_SHIFT 1
	Shift bits for Soft reset. More...

#define	XCSI_CCR_COREENB_SHIFT 0
	Shift bits for Core Enable. More...

Bitmasks and offset of XCSI_PCR_OFFSET register
This register reports the number of lanes configured during core generation and number of lanes actively used.
#define	XCSI_PCR_MAXLANES_MASK 0x00000018
	Maximum lanes in core. More...

#define	XCSI_PCR_ACTLANES_MASK 0x00000003
	Active lanes in core. More...

#define	XCSI_PCR_MAXLANES_SHIFT 3
	Shift bits for Max Lanes. More...

#define	XCSI_PCR_ACTLANES_SHIFT 0
	Shift bits for Active Lanes. More...

Bitmasks and offsets of XCSI_CSR_OFFSET register
This register captures the core's status.
#define	XCSI_CSR_PKTCOUNT_MASK 0xFFFF0000
	16-bit Packet Counter More...

#define	XCSI_CSR_SPFIFOFULL_MASK 0x00000008
	Short Packet FIFO Full. More...

#define	XCSI_CSR_SPFIFONE_MASK 0x00000004
	Short Packet FIFO Not Empty. More...

#define	XCSI_CSR_SLBF_MASK 0x00000002
	Stream Line Buffer Full. More...

#define	XCSI_CSR_RIPCD_MASK 0x00000001
	Reset in Progress OR Core Disabled. More...

#define	XCSI_CSR_PKTCOUNT_SHIFT 16
	Shift bits for Packet Counter. More...

#define	XCSI_CSR_SPFIFOFULL_SHIFT 3
	Shift bits for Short Packet FIFO Full. More...

#define	XCSI_CSR_SPFIFONE_SHIFT 2
	Shift bits for Short Packet Not Empty. More...

#define	XCSI_CSR_SLBF_SHIFT 1
	Shift bits for Stream Line Buffer Full. More...

#define	XCSI_CSR_RIPCD_SHIFT 0
	Bit Shift for Reset in Progress. More...

Bitmasks and offsets of XCSI_GIER_OFFSET register
This register contains the global interrupt enable bit.
#define	XCSI_GIER_GIE_MASK 0x00000001
	Global Interrupt Enable bit. More...

#define	XCSI_GIER_GIE_SHIFT 0
	Shift bits for Global Interrupt Enable. More...

#define	XCSI_GIER_SET 1
	Enable the Global Interrupts. More...

#define	XCSI_GIER_RESET 0
	Disable the Global Interrupts. More...

Bitmasks and offsets of XCSI_ISR_OFFSET register
This register contains the interrupt status.
#define	XCSI_ISR_FR_MASK 0x80000000
	Frame Received. More...

#define	XCSI_ISR_VCXFE_MASK 0x40000000
	VCX Frame Error. More...

#define	XCSI_ISR_SKEWCALCHS_MASK 0x20000000
	Skewcalhs Error. More...

#define	XCSI_ISR_YUV420_MASK 0x10000000
	YUV420 Word count Error. More...

#define	XCSI_ISR_WC_MASK 0x00400000
	Word count corruption. More...

#define	XCSI_ISR_ILC_MASK 0x00200000
	Incorrect Lanes Configured. More...

#define	XCSI_ISR_SPFIFOF_MASK 0x00100000
	Short Packet FIFO FULL. More...

#define	XCSI_ISR_SPFIFONE_MASK 0x00080000
	Short Packet FIFO Not Empty. More...

#define	XCSI_ISR_SLBF_MASK 0x00040000
	Stream Line Buffer Full. More...

#define	XCSI_ISR_STOP_MASK 0x00020000
	Detect Stop State. More...

#define	XCSI_ISR_SOTERR_MASK 0x00002000
	SoT Error. More...

#define	XCSI_ISR_SOTSYNCERR_MASK 0x00001000
	SoT Sync Error. More...

#define	XCSI_ISR_ECC2BERR_MASK 0x00000800
	ECC 2 bit Error. More...

#define	XCSI_ISR_ECC1BERR_MASK 0x00000400
	ECC 1 bit Error. More...

#define	XCSI_ISR_CRCERR_MASK 0x00000200
	CRC Error. More...

#define	XCSI_ISR_DATAIDERR_MASK 0x00000100
	Unknown data ID packet Error. More...

#define	XCSI_ISR_VC3FSYNCERR_MASK 0x00000080
	Frame Sync Error on Virtual Channel 3. More...

#define	XCSI_ISR_VC3FLVLERR_MASK 0x00000040
	Frame Level Error on Virtual Channel 3. More...

#define	XCSI_ISR_VC2FSYNCERR_MASK 0x00000020
	Frame Sync Error on Virtual Channel 2. More...

#define	XCSI_ISR_VC2FLVLERR_MASK 0x00000010
	Frame Level Error on Virtual Channel 2. More...

#define	XCSI_ISR_VC1FSYNCERR_MASK 0x00000008
	Frame Sync Error on Virtual Channel 1. More...

#define	XCSI_ISR_VC1FLVLERR_MASK 0x00000004
	Frame Level Error on Virtual Channel 1. More...

#define	XCSI_ISR_VC0FSYNCERR_MASK 0x00000002
	Frame Sync Error on Virtual Channel 0. More...

#define	XCSI_ISR_VC0FLVLERR_MASK 0x00000001
	Frame Level Error on Virtual Channel 0. More...

#define	XCSI_ISR_ALLINTR_MASK 0xF07FFFFF
	All interrupts mask. More...

#define	XCSI_ISR_FR_SHIFT 31
	Shift bits for Frame received interrupt. More...

#define	XCSI_ISR_VCXFE_SHIFT 30
	Shift bits for VCx Frame Error interrupt. More...

#define	XCSI_ISR_SKEWCALCHS_SHIFT 29
	Shift bits for skeecalchs Error interrupt. More...

#define	XCSI_ISR_YUV420_SHIFT 28
	Shift bits for YUV420 word count interrupt. More...

#define	XCSI_ISR_WC_SHIFT 22
	Shift bits for Word Count corruption. More...

#define	XCSI_ISR_ILC_SHIFT 21
	Shift bits for Incorrect Lanes configured. More...

#define	XCSI_ISR_SPFIFOF_SHIFT 20
	Shift bits for Short Packet FIFO Full. More...

#define	XCSI_ISR_SPFIFONE_SHIFT 19
	Shift bits for Short Packet FIFO Not Empty. More...

#define	XCSI_ISR_SLBF_SHIFT 18
	Shift bits for Stream Line Buffer Full. More...

#define	XCSI_ISR_STOP_SHIFT 17
	Shift bits for Stop State. More...

#define	XCSI_ISR_SOTERR_SHIFT 13
	Shift bits for Start of Transmission Error. More...

#define	XCSI_ISR_SOTSYNCERR_SHIFT 12
	Shift bits for Start of Transmission Sync Error. More...

#define	XCSI_ISR_ECC2BERR_SHIFT 11
	Shift bits for 2 bit ECC error. More...

#define	XCSI_ISR_ECC1BERR_SHIFT 10
	Shift bits for 1 bit ECC error. More...

#define	XCSI_ISR_CRCERR_SHIFT 9
	Shift bits for Packet CRC error. More...

#define	XCSI_ISR_DATAIDERR_SHIFT 8
	Shift bits for Unsupported Data ID error. More...

#define	XCSI_ISR_VC3FSYNCERR_SHIFT 7
	Shift bits for Virtual Channel 3 Frame Synchronisation Error. More...

#define	XCSI_ISR_VC3FLVLERR_SHIFT 6
	Shift bits for Virtual Channel 3 Frame Level Error. More...

#define	XCSI_ISR_VC2FSYNCERR_SHIFT 5
	Shift bits for Virtual Channel 2 Frame Synchronisation Error. More...

#define	XCSI_ISR_VC2FLVLERR_SHIFT 4
	Shift bits for Virtual Channel 2 Frame Level Error. More...

#define	XCSI_ISR_VC1FSYNCERR_SHIFT 3
	Shift bits for Virtual Channel 1 Frame Synchronisation Error. More...

#define	XCSI_ISR_VC1FLVLERR_SHIFT 2
	Shift bits for Virtual Channel 1 Frame Level Error. More...

#define	XCSI_ISR_VC0FSYNCERR_SHIFT 1
	Shift bits for Virtual Channel 0 Frame Synchronisation Error. More...

#define	XCSI_ISR_VC0FLVLERR_SHIFT 0
	Shift bits for Virtual Channel 0 Frame Level Error. More...

BitMasks for grouped interrupts
The interrupts are grouped into DPHY Level Errors, Protocol Decoding Errors, Packet Level Errors, Normal Errors, Frame Received interrupt and Short Packet related. These are used in XCsi_InterruptHandler() to determine the particular callback
#define	XCSI_INTR_PROT_MASK

#define	XCSI_ISR_VC15FSYNCERR_MASK 0x00800000
	Frame Sync Error on Virtual Channel 15. More...

#define	XCSI_ISR_VC15FLVLERR_MASK 0x00400000
	Frame Level Error on Virtual Channel 15. More...

#define	XCSI_ISR_VC14FSYNCERR_MASK 0x00200000
	Frame Sync Error on Virtual Channel 14. More...

#define	XCSI_ISR_VC14FLVLERR_MASK 0x00100000
	Frame Level Error on Virtual Channel 14. More...

#define	XCSI_ISR_VC13FSYNCERR_MASK 0x00080000
	Frame Sync Error on Virtual Channel 13. More...

#define	XCSI_ISR_VC13FLVLERR_MASK 0x00040000
	Frame Level Error on Virtual Channel 13. More...

#define	XCSI_ISR_VC12FSYNCERR_MASK 0x00020000
	Frame Sync Error on Virtual Channel 12. More...

#define	XCSI_ISR_VC12FLVLERR_MASK 0x00010000
	Frame Level Error on Virtual Channel 12. More...

#define	XCSI_ISR_VC11FSYNCERR_MASK 0x00008000
	Frame Sync Error on Virtual Channel 11. More...

#define	XCSI_ISR_VC11FLVLERR_MASK 0x00004000
	Frame Level Error on Virtual Channel 11. More...

#define	XCSI_ISR_VC10FSYNCERR_MASK 0x00002000
	Frame Sync Error on Virtual Channel 10. More...

#define	XCSI_ISR_VC10FLVLERR_MASK 0x00001000
	Frame Level Error on Virtual Channel 10. More...

#define	XCSI_ISR_VC9FSYNCERR_MASK 0x00000800
	Frame Sync Error on Virtual Channel 9. More...

#define	XCSI_ISR_VC9FLVLERR_MASK 0x00000400
	Frame Level Error on Virtual Channel 9. More...

#define	XCSI_ISR_VC8FSYNCERR_MASK 0x00000200
	Frame Sync Error on Virtual Channel 8. More...

#define	XCSI_ISR_VC8FLVLERR_MASK 0x00000100
	Frame Level Error on Virtual Channel 8. More...

#define	XCSI_ISR_VC7FSYNCERR_MASK 0x00000080
	Frame Sync Error on Virtual Channel 7. More...

#define	XCSI_ISR_VC7FLVLERR_MASK 0x00000040
	Frame Level Error on Virtual Channel 7. More...

#define	XCSI_ISR_VC6FSYNCERR_MASK 0x00000020
	Frame Sync Error on Virtual Channel 6. More...

#define	XCSI_ISR_VC6FLVLERR_MASK 0x00000010
	Frame Level Error on Virtual Channel 6. More...

#define	XCSI_ISR_VC5FSYNCERR_MASK 0x00000008
	Frame Sync Error on Virtual Channel 5. More...

#define	XCSI_ISR_VC5FLVLERR_MASK 0x00000004
	Frame Level Error on Virtual Channel 5. More...

#define	XCSI_ISR_VC4FSYNCERR_MASK 0x00000002
	Frame Sync Error on Virtual Channel 4. More...

#define	XCSI_ISR_VC4FLVLERR_MASK 0x00000001
	Frame Level Error on Virtual Channel 4. More...

#define	XCSI_INTR_VCFE_MASK

#define	XCSI_INTR_PKTLVL_MASK

#define	XCSI_INTR_DPHY_MASK

#define	XCSI_INTR_SPKT_MASK

#define	XCSI_INTR_FRAMERCVD_MASK (XCSI_ISR_FR_MASK)

#define	XCSI_INTR_VCXFE_MASK (XCSI_ISR_VCXFE_MASK)

#define	XCSI_INTR_ERR_MASK

Bitmasks and offsets of XCSI_IER_OFFSET register
This register contains the interrupt enable masks
#define	XCSI_IER_FR_MASK 0x80000000
	Frame Received. More...

#define	XCSI_IER_VCXFE_MASK 0x40000000
	VCX Frame Error. More...

#define	XCSI_IER_SKEWCALHS_MASK 0x20000000
	Skewcalchs State. More...

#define	XCSI_IER_YUV420_MASK 0x10000000
	YUV420 Word Count Error. More...

#define	XCSI_IER_WC_MASK 0x00400000
	Word Count Corruption. More...

#define	XCSI_IER_ILC_MASK 0x00200000
	Incorrect Lanes Configured. More...

#define	XCSI_IER_SPFIFOF_MASK 0x00100000
	Short Packet FIFO FULL. More...

#define	XCSI_IER_SPFIFONE_MASK 0x00080000
	Short Packet FIFO Not Empty. More...

#define	XCSI_IER_SLBF_MASK 0x00040000
	Stream Line Buffer Full. More...

#define	XCSI_IER_STOP_MASK 0x00020000
	Detect Stop State. More...

#define	XCSI_IER_SOTERR_MASK 0x00002000
	SoT Error. More...

#define	XCSI_IER_SOTSYNCERR_MASK 0x00001000
	SoT Sync Error. More...

#define	XCSI_IER_ECC2BERR_MASK 0x00000800
	ECC 2 bit Error. More...

#define	XCSI_IER_ECC1BERR_MASK 0x00000400
	ECC 1 bit Error. More...

#define	XCSI_IER_CRCERR_MASK 0x00000200
	CRC Error. More...

#define	XCSI_IER_DATAIDERR_MASK 0x00000100
	Unknown data ID packet Error. More...

#define	XCSI_IER_VC3FSYNCERR_MASK 0x00000080
	Frame Sync Error on Virtual Channel 3. More...

#define	XCSI_IER_VC3FLVLERR_MASK 0x00000040
	Frame Level Error on Virtual Channel 3. More...

#define	XCSI_IER_VC2FSYNCERR_MASK 0x00000020
	Frame Sync Error on Virtual Channel 2. More...

#define	XCSI_IER_VC2FLVLERR_MASK 0x00000010
	Frame Level Error on Virtual Channel 2. More...

#define	XCSI_IER_VC1FSYNCERR_MASK 0x00000008
	Frame Sync Error on Virtual Channel 1. More...

#define	XCSI_IER_VC1FLVLERR_MASK 0x00000004
	Frame Level Error on Virtual Channel 1. More...

#define	XCSI_IER_VC0FSYNCERR_MASK 0x00000002
	Frame Sync Error on Virtual Channel 0. More...

#define	XCSI_IER_VC0FLVLERR_MASK 0x00000001
	Frame Level Error on Virtual Channel 0. More...

#define	XCSI_IER_ALLINTR_MASK 0xF07FFFFF
	All interrupts mask. More...

#define	XCSI_IER_FR_SHIFT 31
	Shift bits for Frame received interrupt. More...

#define	XCSI_IER_SKEWCALHS_SHIFT 29
	Shift bits for skewcalhs status. More...

#define	XCSI_IER_YUV420_SHIFT 28
	Shift bits for YUV 420 Word Count error. More...

#define	XCSI_IER_WC_SHIFT 22
	Shift bits for Word count corruption. More...

#define	XCSI_IER_ILC_SHIFT 21
	Shift bits for Incorrect Lanes configured. More...

#define	XCSI_IER_SPFIFOF_SHIFT 20
	Shift bits for Short Packet FIFO Full. More...

#define	XCSI_IER_SPFIFONE_SHIFT 19
	Shift bits for Short Packet FIFO Not Empty. More...

#define	XCSI_IER_SLBF_SHIFT 18
	Shift bits for Stream Line Buffer Full. More...

#define	XCSI_IER_STOP_SHIFT 17
	Shift bits for Stop State. More...

#define	XCSI_IER_SOTERR_SHIFT 13
	Shift bits for Start of Transmission Error. More...

#define	XCSI_IER_SOTSYNCERR_SHIFT 12
	Shift bits for Start of Transmission Sync Error. More...

#define	XCSI_IER_ECC2BERR_SHIFT 11
	Shift bits for 2 bit ECC error. More...

#define	XCSI_IER_ECC1BERR_SHIFT 10
	Shift bits for 1 bit ECC error. More...

#define	XCSI_IER_CRCERR_SHIFT 9
	Shift bits for Packet CRC error. More...

#define	XCSI_IER_DATAIDERR_SHIFT 8
	Shift bits for Unsupported Data ID error. More...

#define	XCSI_IER_VC3FSYNCERR_SHIFT 7
	Shift bits for Virtual Channel 3 Frame Synchronisation Error. More...

#define	XCSI_IER_VC3FLVLERR_SHIFT 6
	Shift bits for Virtual Channel 3 Frame Level Error. More...

#define	XCSI_IER_VC2FSYNCERR_SHIFT 5
	Shift bits for Virtual Channel 2 Frame Synchronisation Error. More...

#define	XCSI_IER_VC2FLVLERR_SHIFT 4
	Shift bits for Virtual Channel 2 Frame Level Error. More...

#define	XCSI_IER_VC1FSYNCERR_SHIFT 3
	Shift bits for Virtual Channel 1 Frame Synchronisation Error. More...

#define	XCSI_IER_VC1FLVLERR_SHIFT 2
	Shift bits for Virtual Channel 1 Frame Level Error. More...

#define	XCSI_IER_VC0FSYNCERR_SHIFT 1
	Shift bits for Virtual Channel 0 Frame Synchronisation Error. More...

#define	XCSI_IER_VC0FLVLERR_SHIFT 0
	Shift bits for Virtual Channel 0 Frame Level Error. More...

Bitmasks and offsets of XCSI_SPKTR_OFFSET register
This register contains the masks for getting the 16 bit data, virtual channel and data type
#define	XCSI_SPKTR_DATA_MASK 0x00FFFF00
	16 bit short packet data Received More...

#define	XCSI_SPKTR_VC_MASK 0x000000C0
	Virtual channel number. More...

#define	XCSI_SPKTR_DT_MASK 0x0000003F
	Data Type. More...

#define	XCSI_SPKTR_DATA_SHIFT 8
	Shift bits for Short Packet Data. More...

#define	XCSI_SPKTR_VC_SHIFT 6
	Shift bits for Short Packet Virtual Channel Data. More...

#define	XCSI_SPKTR_DT_SHIFT 0
	Bit Shift for Short Packet Data Type. More...

Bitmasks and offsets of XCSI_CLKINFR_OFFSET register
This register contains the masks for getting current status of clock lane
#define	XCSI_CLKINFR_STOP_MASK 0x00000002
	Stop State on clock lane. More...

#define	XCSI_CLKINFR_STOP_SHIFT 1
	Shift bits for Clock Lane Stop bit. More...

Bitmasks and offsets of XCSI_L(0..3)INFR register
This register contains the masks for getting current status of data lanes.
#define	XCSI_LXINFR_STOP_MASK 0x00000020
	Stop State on clock lane. More...

#define	XCSI_LXINFR_SKEWCALHS_MASK 0x00000004
	SkewcalHs State on clock lane. More...

#define	XCSI_LXINFR_SOTERR_MASK 0x00000002
	Detection of ErrSoTHS. More...

#define	XCSI_LXINFR_SOTSYNCERR_MASK 0x00000001
	Detection of ErrSoTSyncHS. More...

#define	XCSI_LXINFR_STOP_SHIFT 5
	Bit Shift for Data Lane Stop State. More...

#define	XCSI_LXINFR_SKEWCALHS_SHIFT 2
	Bit Shift for Data Lane SkewCalHs State. More...

#define	XCSI_LXINFR_SOTERR_SHIFT 1
	Bit Shift for Start of Transmission Error. More...

#define	XCSI_LXINFR_SOTSYNCERR_SHIFT 0
	Bit Shift for Start of Transmission Sync Error. More...

Bitmasks and offsets of XCSI_VC(0..3)INF(1/2)R register
This register contains the masks to get line count, byte count from Info Reg 1 and to get current data type being processed from Info Reg 2 for each virtual channel.
#define	XCSI_VCXINF1R_LINECOUNT_MASK 0xFFFF0000
	Number of long packets written into line buffer. More...

#define	XCSI_VCXINF1R_BYTECOUNT_MASK 0x0000FFFF
	Byte count of current packet in process. More...

#define	XCSI_VCXINF1R_LINECOUNT_SHIFT 16
	Shift bits for Virtual Channel Line Count bits. More...

#define	XCSI_VCXINF1R_BYTECOUNT_SHIFT 0
	Shift bits for Virtual Channel Byte Count bits. More...

#define	XCSI_VCXINF2R_DATATYPE_MASK 0x0000003F
	Data type of current packet. More...

#define	XCSI_VCXINF2R_DATATYPE_SHIFT 0
	Bit Shift for Virtual Channel Data Type. More...

Macro Definition Documentation

#define XCSI_CCR_COREENB_MASK 0x00000001

Enable/Disable core.

#define XCSI_CCR_COREENB_SHIFT 0

Shift bits for Core Enable.

#define XCSI_CCR_OFFSET 0x00000000

Core Configuration Register.

#define XCSI_CCR_SOFTRESET_MASK 0x00000002

Soft Reset the core.

#define XCSI_CCR_SOFTRESET_SHIFT 1

Shift bits for Soft reset.

#define XCSI_CLKINFR_OFFSET 0x0000003C

Clock Lane Info Register.

Referenced by XCsi_GetClkLaneInfo().

#define XCSI_CLKINFR_STOP_MASK 0x00000002

Stop State on clock lane.

Referenced by XCsi_GetClkLaneInfo().

#define XCSI_CLKINFR_STOP_SHIFT 1

Shift bits for Clock Lane Stop bit.

Referenced by XCsi_GetClkLaneInfo().

#define XCSI_CSR_OFFSET 0x00000010

Core Status Register.

#define XCSI_CSR_PKTCOUNT_MASK 0xFFFF0000

16-bit Packet Counter

#define XCSI_CSR_PKTCOUNT_SHIFT 16

Shift bits for Packet Counter.

#define XCSI_CSR_RIPCD_MASK 0x00000001

Reset in Progress OR Core Disabled.

#define XCSI_CSR_RIPCD_SHIFT 0

Bit Shift for Reset in Progress.

#define XCSI_CSR_SLBF_MASK 0x00000002

Stream Line Buffer Full.

#define XCSI_CSR_SLBF_SHIFT 1

Shift bits for Stream Line Buffer Full.

#define XCSI_CSR_SPFIFOFULL_MASK 0x00000008

Short Packet FIFO Full.

#define XCSI_CSR_SPFIFOFULL_SHIFT 3

Shift bits for Short Packet FIFO Full.

#define XCSI_CSR_SPFIFONE_MASK 0x00000004

Short Packet FIFO Not Empty.

#define XCSI_CSR_SPFIFONE_SHIFT 2

Shift bits for Short Packet Not Empty.

#define XCSI_DISABLE 0

Flag denoting disabling of CSI.

Referenced by XCsi_Activate().

#define XCSI_ENABLE 1

Flag denoting enabling of CSI.

Referenced by XCsi_Activate().

#define XCSI_GIER_GIE_MASK 0x00000001

Global Interrupt Enable bit.

#define XCSI_GIER_GIE_SHIFT 0

Shift bits for Global Interrupt Enable.

#define XCSI_GIER_OFFSET 0x00000020

Global Interrupt Register.

Referenced by XCsi_Configure().

#define XCSI_GIER_RESET 0

Disable the Global Interrupts.

#define XCSI_GIER_SET 1

Enable the Global Interrupts.

#define XCSI_H_

Prevent circular inclusions by using protection macros.

#define XCSI_HW_H_

Prevent circular inclusions by using protection macros.

#define XCSI_IER_ALLINTR_MASK 0xF07FFFFF

All interrupts mask.

Referenced by XCsi_InterruptClear(), XCsi_IntrDisable(), and XCsi_IntrEnable().

#define XCSI_IER_CRCERR_MASK 0x00000200

CRC Error.

#define XCSI_IER_CRCERR_SHIFT 9

Shift bits for Packet CRC error.

#define XCSI_IER_DATAIDERR_MASK 0x00000100

Unknown data ID packet Error.

#define XCSI_IER_DATAIDERR_SHIFT 8

Shift bits for Unsupported Data ID error.

#define XCSI_IER_ECC1BERR_MASK 0x00000400

ECC 1 bit Error.

#define XCSI_IER_ECC1BERR_SHIFT 10

Shift bits for 1 bit ECC error.

#define XCSI_IER_ECC2BERR_MASK 0x00000800

ECC 2 bit Error.

#define XCSI_IER_ECC2BERR_SHIFT 11

Shift bits for 2 bit ECC error.

#define XCSI_IER_FR_MASK 0x80000000

Frame Received.

#define XCSI_IER_FR_SHIFT 31

Shift bits for Frame received interrupt.

#define XCSI_IER_ILC_MASK 0x00200000

Incorrect Lanes Configured.

#define XCSI_IER_ILC_SHIFT 21

Shift bits for Incorrect Lanes configured.

#define XCSI_IER_OFFSET 0x00000028

Interrupt Enable Register.

Referenced by XCsi_GetIntrEnable(), XCsi_IntrDisable(), and XCsi_IntrEnable().

#define XCSI_IER_SKEWCALHS_MASK 0x20000000

Skewcalchs State.

#define XCSI_IER_SKEWCALHS_SHIFT 29

Shift bits for skewcalhs status.

#define XCSI_IER_SLBF_MASK 0x00040000

Stream Line Buffer Full.

#define XCSI_IER_SLBF_SHIFT 18

Shift bits for Stream Line Buffer Full.

#define XCSI_IER_SOTERR_MASK 0x00002000

SoT Error.

#define XCSI_IER_SOTERR_SHIFT 13

Shift bits for Start of Transmission Error.

#define XCSI_IER_SOTSYNCERR_MASK 0x00001000

SoT Sync Error.

#define XCSI_IER_SOTSYNCERR_SHIFT 12

Shift bits for Start of Transmission Sync Error.

#define XCSI_IER_SPFIFOF_MASK 0x00100000

Short Packet FIFO FULL.

#define XCSI_IER_SPFIFOF_SHIFT 20

Shift bits for Short Packet FIFO Full.

#define XCSI_IER_SPFIFONE_MASK 0x00080000

Short Packet FIFO Not Empty.

#define XCSI_IER_SPFIFONE_SHIFT 19

Shift bits for Short Packet FIFO Not Empty.

#define XCSI_IER_STOP_MASK 0x00020000

Detect Stop State.

#define XCSI_IER_STOP_SHIFT 17

Shift bits for Stop State.

#define XCSI_IER_VC0FLVLERR_MASK 0x00000001

Frame Level Error on Virtual Channel 0.

#define XCSI_IER_VC0FLVLERR_SHIFT 0

Shift bits for Virtual Channel 0 Frame Level Error.

#define XCSI_IER_VC0FSYNCERR_MASK 0x00000002

Frame Sync Error on Virtual Channel 0.

#define XCSI_IER_VC0FSYNCERR_SHIFT 1

Shift bits for Virtual Channel 0 Frame Synchronisation Error.

#define XCSI_IER_VC1FLVLERR_MASK 0x00000004

Frame Level Error on Virtual Channel 1.

#define XCSI_IER_VC1FLVLERR_SHIFT 2

Shift bits for Virtual Channel 1 Frame Level Error.

#define XCSI_IER_VC1FSYNCERR_MASK 0x00000008

Frame Sync Error on Virtual Channel 1.

#define XCSI_IER_VC1FSYNCERR_SHIFT 3

Shift bits for Virtual Channel 1 Frame Synchronisation Error.

#define XCSI_IER_VC2FLVLERR_MASK 0x00000010

Frame Level Error on Virtual Channel 2.

#define XCSI_IER_VC2FLVLERR_SHIFT 4

Shift bits for Virtual Channel 2 Frame Level Error.

#define XCSI_IER_VC2FSYNCERR_MASK 0x00000020

Frame Sync Error on Virtual Channel 2.

#define XCSI_IER_VC2FSYNCERR_SHIFT 5

Shift bits for Virtual Channel 2 Frame Synchronisation Error.

#define XCSI_IER_VC3FLVLERR_MASK 0x00000040

Frame Level Error on Virtual Channel 3.

#define XCSI_IER_VC3FLVLERR_SHIFT 6

Shift bits for Virtual Channel 3 Frame Level Error.

#define XCSI_IER_VC3FSYNCERR_MASK 0x00000080

Frame Sync Error on Virtual Channel 3.

#define XCSI_IER_VC3FSYNCERR_SHIFT 7

Shift bits for Virtual Channel 3 Frame Synchronisation Error.

#define XCSI_IER_VCXFE_MASK 0x40000000

VCX Frame Error.

#define XCSI_IER_WC_MASK 0x00400000

Word Count Corruption.

#define XCSI_IER_WC_SHIFT 22

Shift bits for Word count corruption.

#define XCSI_IER_YUV420_MASK 0x10000000

YUV420 Word Count Error.

#define XCSI_IER_YUV420_SHIFT 28

Shift bits for YUV 420 Word Count error.

#define XCSI_ISR_ALLINTR_MASK 0xF07FFFFF

All interrupts mask.

Referenced by XCsi_InterruptClear().

#define XCSI_ISR_CRCERR_MASK 0x00000200

CRC Error.

#define XCSI_ISR_CRCERR_SHIFT 9

Shift bits for Packet CRC error.

#define XCSI_ISR_DATAIDERR_MASK 0x00000100

Unknown data ID packet Error.

#define XCSI_ISR_DATAIDERR_SHIFT 8

Shift bits for Unsupported Data ID error.

#define XCSI_ISR_ECC1BERR_MASK 0x00000400

ECC 1 bit Error.

#define XCSI_ISR_ECC1BERR_SHIFT 10

Shift bits for 1 bit ECC error.

#define XCSI_ISR_ECC2BERR_MASK 0x00000800

ECC 2 bit Error.

#define XCSI_ISR_ECC2BERR_SHIFT 11

Shift bits for 2 bit ECC error.

#define XCSI_ISR_FR_MASK 0x80000000

Frame Received.

#define XCSI_ISR_FR_SHIFT 31

Shift bits for Frame received interrupt.

#define XCSI_ISR_ILC_MASK 0x00200000

Incorrect Lanes Configured.

#define XCSI_ISR_ILC_SHIFT 21

Shift bits for Incorrect Lanes configured.

#define XCSI_ISR_OFFSET 0x00000024

Interrupt Status Register.

Referenced by XCsi_GetIntrStatus(), and XCsi_InterruptClear().

#define XCSI_ISR_SKEWCALCHS_MASK 0x20000000

Skewcalhs Error.

#define XCSI_ISR_SKEWCALCHS_SHIFT 29

Shift bits for skeecalchs Error interrupt.

#define XCSI_ISR_SLBF_MASK 0x00040000

Stream Line Buffer Full.

#define XCSI_ISR_SLBF_SHIFT 18

Shift bits for Stream Line Buffer Full.

#define XCSI_ISR_SOTERR_MASK 0x00002000

SoT Error.

#define XCSI_ISR_SOTERR_SHIFT 13

Shift bits for Start of Transmission Error.

#define XCSI_ISR_SOTSYNCERR_MASK 0x00001000

SoT Sync Error.

#define XCSI_ISR_SOTSYNCERR_SHIFT 12

Shift bits for Start of Transmission Sync Error.

#define XCSI_ISR_SPFIFOF_MASK 0x00100000

Short Packet FIFO FULL.

#define XCSI_ISR_SPFIFOF_SHIFT 20

Shift bits for Short Packet FIFO Full.

#define XCSI_ISR_SPFIFONE_MASK 0x00080000

Short Packet FIFO Not Empty.

#define XCSI_ISR_SPFIFONE_SHIFT 19

Shift bits for Short Packet FIFO Not Empty.

#define XCSI_ISR_STOP_MASK 0x00020000

Detect Stop State.

#define XCSI_ISR_STOP_SHIFT 17

Shift bits for Stop State.

#define XCSI_ISR_VC0FLVLERR_MASK 0x00000001

Frame Level Error on Virtual Channel 0.

#define XCSI_ISR_VC0FLVLERR_SHIFT 0

Shift bits for Virtual Channel 0 Frame Level Error.

#define XCSI_ISR_VC0FSYNCERR_MASK 0x00000002

Frame Sync Error on Virtual Channel 0.

#define XCSI_ISR_VC0FSYNCERR_SHIFT 1

Shift bits for Virtual Channel 0 Frame Synchronisation Error.

#define XCSI_ISR_VC10FLVLERR_MASK 0x00001000

Frame Level Error on Virtual Channel 10.

#define XCSI_ISR_VC10FSYNCERR_MASK 0x00002000

Frame Sync Error on Virtual Channel 10.

#define XCSI_ISR_VC11FLVLERR_MASK 0x00004000

Frame Level Error on Virtual Channel 11.

#define XCSI_ISR_VC11FSYNCERR_MASK 0x00008000

Frame Sync Error on Virtual Channel 11.

#define XCSI_ISR_VC12FLVLERR_MASK 0x00010000

Frame Level Error on Virtual Channel 12.

#define XCSI_ISR_VC12FSYNCERR_MASK 0x00020000

Frame Sync Error on Virtual Channel 12.

#define XCSI_ISR_VC13FLVLERR_MASK 0x00040000

Frame Level Error on Virtual Channel 13.

#define XCSI_ISR_VC13FSYNCERR_MASK 0x00080000

Frame Sync Error on Virtual Channel 13.

#define XCSI_ISR_VC14FLVLERR_MASK 0x00100000

Frame Level Error on Virtual Channel 14.

#define XCSI_ISR_VC14FSYNCERR_MASK 0x00200000

Frame Sync Error on Virtual Channel 14.

#define XCSI_ISR_VC15FLVLERR_MASK 0x00400000

Frame Level Error on Virtual Channel 15.

#define XCSI_ISR_VC15FSYNCERR_MASK 0x00800000

Frame Sync Error on Virtual Channel 15.

#define XCSI_ISR_VC1FLVLERR_MASK 0x00000004

Frame Level Error on Virtual Channel 1.

#define XCSI_ISR_VC1FLVLERR_SHIFT 2

Shift bits for Virtual Channel 1 Frame Level Error.

#define XCSI_ISR_VC1FSYNCERR_MASK 0x00000008

Frame Sync Error on Virtual Channel 1.

#define XCSI_ISR_VC1FSYNCERR_SHIFT 3

Shift bits for Virtual Channel 1 Frame Synchronisation Error.

#define XCSI_ISR_VC2FLVLERR_MASK 0x00000010

Frame Level Error on Virtual Channel 2.

#define XCSI_ISR_VC2FLVLERR_SHIFT 4

Shift bits for Virtual Channel 2 Frame Level Error.

#define XCSI_ISR_VC2FSYNCERR_MASK 0x00000020

Frame Sync Error on Virtual Channel 2.

#define XCSI_ISR_VC2FSYNCERR_SHIFT 5

Shift bits for Virtual Channel 2 Frame Synchronisation Error.

#define XCSI_ISR_VC3FLVLERR_MASK 0x00000040

Frame Level Error on Virtual Channel 3.

#define XCSI_ISR_VC3FLVLERR_SHIFT 6

Shift bits for Virtual Channel 3 Frame Level Error.

#define XCSI_ISR_VC3FSYNCERR_MASK 0x00000080

Frame Sync Error on Virtual Channel 3.

#define XCSI_ISR_VC3FSYNCERR_SHIFT 7

Shift bits for Virtual Channel 3 Frame Synchronisation Error.

#define XCSI_ISR_VC4FLVLERR_MASK 0x00000001

Frame Level Error on Virtual Channel 4.

#define XCSI_ISR_VC4FSYNCERR_MASK 0x00000002

Frame Sync Error on Virtual Channel 4.

#define XCSI_ISR_VC5FLVLERR_MASK 0x00000004

Frame Level Error on Virtual Channel 5.

#define XCSI_ISR_VC5FSYNCERR_MASK 0x00000008

Frame Sync Error on Virtual Channel 5.

#define XCSI_ISR_VC6FLVLERR_MASK 0x00000010

Frame Level Error on Virtual Channel 6.

#define XCSI_ISR_VC6FSYNCERR_MASK 0x00000020

Frame Sync Error on Virtual Channel 6.

#define XCSI_ISR_VC7FLVLERR_MASK 0x00000040

Frame Level Error on Virtual Channel 7.

#define XCSI_ISR_VC7FSYNCERR_MASK 0x00000080

Frame Sync Error on Virtual Channel 7.

#define XCSI_ISR_VC8FLVLERR_MASK 0x00000100

Frame Level Error on Virtual Channel 8.

#define XCSI_ISR_VC8FSYNCERR_MASK 0x00000200

Frame Sync Error on Virtual Channel 8.

#define XCSI_ISR_VC9FLVLERR_MASK 0x00000400

Frame Level Error on Virtual Channel 9.

#define XCSI_ISR_VC9FSYNCERR_MASK 0x00000800

Frame Sync Error on Virtual Channel 9.

#define XCSI_ISR_VCXFE_MASK 0x40000000

VCX Frame Error.

#define XCSI_ISR_VCXFE_SHIFT 30

Shift bits for VCx Frame Error interrupt.

#define XCSI_ISR_WC_MASK 0x00400000

Word count corruption.

#define XCSI_ISR_WC_SHIFT 22

Shift bits for Word Count corruption.

#define XCSI_ISR_YUV420_MASK 0x10000000

YUV420 Word count Error.

#define XCSI_ISR_YUV420_SHIFT 28

Shift bits for YUV420 word count interrupt.

#define XCSI_L0INFR_OFFSET 0x00000040

Lane Information Registers.

Lane 0 Info Register

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_L1INFR_OFFSET 0x00000044

Lane 1 Info Register.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_L2INFR_OFFSET 0x00000048

Lane 2 Info Register.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_L3INFR_OFFSET 0x0000004C

Lane 3 Info Register.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_LXINFR_SKEWCALHS_MASK 0x00000004

SkewcalHs State on clock lane.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_LXINFR_SKEWCALHS_SHIFT 2

Bit Shift for Data Lane SkewCalHs State.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_LXINFR_SOTERR_MASK 0x00000002

Detection of ErrSoTHS.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_LXINFR_SOTERR_SHIFT 1

Bit Shift for Start of Transmission Error.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_LXINFR_SOTSYNCERR_MASK 0x00000001

Detection of ErrSoTSyncHS.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_LXINFR_SOTSYNCERR_SHIFT 0

Bit Shift for Start of Transmission Sync Error.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_LXINFR_STOP_MASK 0x00000020

Stop State on clock lane.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_LXINFR_STOP_SHIFT 5

Bit Shift for Data Lane Stop State.

Referenced by XCsi_GetDataLaneInfo().

#define XCSI_MAX_LANES 4

Max Lanes supported by CSI.

#define XCSI_MAX_VC 16

Max Virtual Channels supported for CSI.

Referenced by XCsi_GetVCInfo().

#define XCSI_PCR_ACTLANES_MASK 0x00000003

Active lanes in core.

#define XCSI_PCR_ACTLANES_SHIFT 0

Shift bits for Active Lanes.

#define XCSI_PCR_MAXLANES_MASK 0x00000018

Maximum lanes in core.

Referenced by XCsi_SelfTest().

#define XCSI_PCR_MAXLANES_SHIFT 3

Shift bits for Max Lanes.

Referenced by XCsi_SelfTest().

#define XCSI_PCR_OFFSET 0x00000004

Protocol Configuration Register.

Referenced by XCsi_SelfTest().

#define XCSI_SPKTR_DATA_MASK 0x00FFFF00

16 bit short packet data Received

Referenced by XCsi_GetShortPacket().

#define XCSI_SPKTR_DATA_SHIFT 8

Shift bits for Short Packet Data.

Referenced by XCsi_GetShortPacket().

#define XCSI_SPKTR_DT_MASK 0x0000003F

Data Type.

Referenced by XCsi_GetShortPacket().

#define XCSI_SPKTR_DT_SHIFT 0

Bit Shift for Short Packet Data Type.

Referenced by XCsi_GetShortPacket().

#define XCSI_SPKTR_OFFSET 0x00000030

Generic Short Packet Register.

Referenced by XCsi_GetShortPacket().

#define XCSI_SPKTR_VC_MASK 0x000000C0

Virtual channel number.

Referenced by XCsi_GetShortPacket().

#define XCSI_SPKTR_VC_SHIFT 6

Shift bits for Short Packet Virtual Channel Data.

Referenced by XCsi_GetShortPacket().

#define XCSI_V10_MAX_VC 4

Max Virtual Channels supported for v1.0.

#define XCSI_V20_MAX_VC 16

Max Virtual Channels supported for v2.0.

#define XCSI_VC0INF1R_OFFSET 0x00000060

Image Information Register for each Virtual Channel.

Virtual Channel 0 Image Information 1 Register

Referenced by XCsi_GetVCInfo().

#define XCSI_VC0INF2R_OFFSET 0x00000064

Virtual Channel 0 Image Information 2 Register.

#define XCSI_VC10INF1R_OFFSET 0x000000B0

Virtual Channel 10 Image Information 1 Register.

#define XCSI_VC10INF2R_OFFSET 0x000000B4

Virtual Channel 10 Image Information 2 Register.

#define XCSI_VC11INF1R_OFFSET 0x000000B8

Virtual Channel 11 Image Information 1 Register.

#define XCSI_VC11INF2R_OFFSET 0x000000BC

Virtual Channel 11 Image Information 2 Register.

#define XCSI_VC12INF1R_OFFSET 0x000000C0

Virtual Channel 12 Image Information 1 Register.

#define XCSI_VC12INF2R_OFFSET 0x000000C4

Virtual Channel 12 Image Information 2 Register.

#define XCSI_VC13INF1R_OFFSET 0x000000C8

Virtual Channel 13 Image Information 1 Register.

#define XCSI_VC13INF2R_OFFSET 0x000000CC

Virtual Channel 13 Image Information 2 Register.

#define XCSI_VC14INF1R_OFFSET 0x000000D0

Virtual Channel 14 Image Information 1 Register.

#define XCSI_VC14INF2R_OFFSET 0x000000D4

Virtual Channel 14 Image Information 2 Register.

#define XCSI_VC15INF1R_OFFSET 0x000000D8

Virtual Channel 15 Image Information 1 Register.

#define XCSI_VC15INF2R_OFFSET 0x000000DC

Virtual Channel 15 Image Information 2 Register.

#define XCSI_VC1INF1R_OFFSET 0x00000068

Virtual Channel 1 Image Information 1 Register.

Referenced by XCsi_GetVCInfo().

#define XCSI_VC1INF2R_OFFSET 0x0000006C

Virtual Channel 1 Image Information 2 Register.

#define XCSI_VC2INF1R_OFFSET 0x00000070

Virtual Channel 2 Image Information 1 Register.

#define XCSI_VC2INF2R_OFFSET 0x00000074

Virtual Channel 2 Image Information 2 Register.

#define XCSI_VC3INF1R_OFFSET 0x00000078

Virtual Channel 3 Image Information 1 Register.

#define XCSI_VC3INF2R_OFFSET 0x0000007C

Virtual Channel 3 Image Information 2 Register.

#define XCSI_VC4INF1R_OFFSET 0x00000080

Virtual Channel 4 Image Information 1 Register.

#define XCSI_VC4INF2R_OFFSET 0x00000084

Virtual Channel 4 Image Information 2 Register.

#define XCSI_VC5INF1R_OFFSET 0x00000088

Virtual Channel 5 Image Information 1 Register.

#define XCSI_VC5INF2R_OFFSET 0x0000008C

Virtual Channel 5 Image Information 2 Register.

#define XCSI_VC6INF1R_OFFSET 0x00000090

Virtual Channel 6 Image Information 1 Register.

#define XCSI_VC6INF2R_OFFSET 0x00000094

Virtual Channel 6 Image Information 2 Register.

#define XCSI_VC7INF1R_OFFSET 0x00000098

Virtual Channel 7 Image Information 1 Register.

#define XCSI_VC7INF2R_OFFSET 0x0000009C

Virtual Channel 7 Image Information 2 Register.

#define XCSI_VC8INF1R_OFFSET 0x000000A0

Virtual Channel 8 Image Information 1 Register.

#define XCSI_VC8INF2R_OFFSET 0x000000A4

Virtual Channel 8 Image Information 2 Register.

#define XCSI_VC9INF1R_OFFSET 0x000000A8

Virtual Channel 9 Image Information 1 Register.

#define XCSI_VC9INF2R_OFFSET 0x000000AC

Virtual Channel 9 Image Information 2 Register.

#define XCSI_VC_SEL_OFFSET 0x0000002C

VC Selection Register.

Referenced by XCsi_GetVCSelection(), and XCsi_SetVCSelection().

#define XCSI_VCX_FE_OFFSET 0x00000034

VCx Frame Error Register.

Referenced by XCsi_IntrHandler().

#define XCSI_VCXINF1R_BYTECOUNT_MASK 0x0000FFFF

Byte count of current packet in process.

Referenced by XCsi_GetVCInfo().

#define XCSI_VCXINF1R_BYTECOUNT_SHIFT 0

Shift bits for Virtual Channel Byte Count bits.

Referenced by XCsi_GetVCInfo().

#define XCSI_VCXINF1R_LINECOUNT_MASK 0xFFFF0000

Number of long packets written into line buffer.

Referenced by XCsi_GetVCInfo().

#define XCSI_VCXINF1R_LINECOUNT_SHIFT 16

Shift bits for Virtual Channel Line Count bits.

Referenced by XCsi_GetVCInfo().

#define XCSI_VCXINF2R_DATATYPE_MASK 0x0000003F

Data type of current packet.

Referenced by XCsi_GetVCInfo().

#define XCSI_VCXINF2R_DATATYPE_SHIFT 0

Bit Shift for Virtual Channel Data Type.

Referenced by XCsi_GetVCInfo().

Typedef Documentation

typedef void(* XCsi_CallBack)(void *CallBackRef, u32 Mask)

Callback type for all interrupts defined.

Parameters

CallBackRef	is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
Mask	is a bit mask indicating the cause of the event. For current core version, this parameter is "OR" of 0 or more XCSI_ISR_*_MASK constants defined in xcsi_hw.h.

Returns: None.

Note: None.

Function Documentation

u32 XCsi_Activate	(	XCsi *	InstancePtr,
		u8	Flag
	)

Thsi function will enable/disable the IP Core to start processing.

Parameters

InstancePtr	is the XCsi instance to operate on.
Flag	will be used to indicate Enable or Disable action

Returns

XST_SUCCESS on successful core enable or disable
XST_FAILURE if core disable times out.

Note: None.

References XCsi::IsReady, XCSI_DISABLE, and XCSI_ENABLE.

u32 XCsi_CfgInitialize	(	XCsi *	InstancePtr,
		XCsi_Config *	CfgPtr,
		UINTPTR	EffectiveAddr
	)

Initialize the XCsi instance provided by the caller based on the given Config structure.

Parameters

InstancePtr	is the XCsi instance to operate on.
CfgPtr	is the device configuration structure containing information about a specific CSI.
EffectiveAddr	is the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used.

Returns

XST_SUCCESS Initialization was successful.

Note: None.

References XCsi_Config::BaseAddr, XCsi::Config, XCsi::DPhyLvlErrCallBack, XCsi::ErrorCallBack, XCsi::FrameRecvdCallBack, XCsi::IsReady, XCsi::PktLvlErrCallBack, XCsi::ProtDecodeErrCallBack, XCsi::ShortPacketCallBack, and XCsi::VCXErrCallBack.

Referenced by CsiSelfTestExample().

u32 XCsi_Configure ( XCsi * InstancePtr )

This function will configure the core with proper number of Active Lanes.

Parameters

InstancePtr is the XCsi instance to operate on.

Returns

XST_SUCCESS On configuring the core.
XST_FAILURE if active lanes not set correctly

Note: None.

References XCsi::ActiveLanes, XCsi_Config::BaseAddr, XCsi::Config, XCsi_Config::FixedLanes, XCsi::IsReady, XCsi_GetIntrEnable(), XCSI_GIER_OFFSET, XCsi_IntrEnable(), and XCsi_IsActiveLaneCountValid().

void XCsi_GetClkLaneInfo	(	XCsi *	InstancePtr,
		XCsi_ClkLaneInfo *	ClkLane
	)

This function will get the information about the state of the Clock Lane.

Parameters

InstancePtr	is the XCsi instance to operate on
ClkLane	is going to be filled up by this function and returned to the caller.

Returns: None

References XCsi_Config::BaseAddr, XCsi::Config, XCsi_ClkLaneInfo::StopState, XCSI_CLKINFR_OFFSET, XCSI_CLKINFR_STOP_MASK, and XCSI_CLKINFR_STOP_SHIFT.

void XCsi_GetDataLaneInfo	(	XCsi *	InstancePtr,
		u8	Lane,
		XCsi_DataLaneInfo *	DataLane
	)

This function will get the information about the state of a Data Lane.

Parameters

InstancePtr	is the XCsi instance to operate on
Lane	is the Lane number whose information is requested
DataLane	is going to be filled up by this function and returned to the caller.

Returns: None

References XCsi_Config::BaseAddr, XCsi::Config, XCsi_DataLaneInfo::SkewCalHs, XCsi_DataLaneInfo::SoTErr, XCsi_DataLaneInfo::SoTSyncErr, XCsi_DataLaneInfo::StopState, XCSI_L0INFR_OFFSET, XCSI_L1INFR_OFFSET, XCSI_L2INFR_OFFSET, XCSI_L3INFR_OFFSET, XCSI_LXINFR_SKEWCALHS_MASK, XCSI_LXINFR_SKEWCALHS_SHIFT, XCSI_LXINFR_SOTERR_MASK, XCSI_LXINFR_SOTERR_SHIFT, XCSI_LXINFR_SOTSYNCERR_MASK, XCSI_LXINFR_SOTSYNCERR_SHIFT, XCSI_LXINFR_STOP_MASK, and XCSI_LXINFR_STOP_SHIFT.

u32 XCsi_GetIntrEnable ( XCsi * InstancePtr )

This function will get the interrupt mask set (enabled) in the CSI2 Rx core.

Parameters

InstancePtr is the XCsi instance to operate on

Returns: Interrupt Mask with bits set for corresponding interrupt in Interrupt enable register

Note: None

References XCsi_Config::BaseAddr, XCsi::Config, and XCSI_IER_OFFSET.

Referenced by XCsi_Configure(), and XCsi_IntrHandler().

u32 XCsi_GetIntrStatus ( XCsi * InstancePtr )

This function will get the list of interrupts pending in the Interrupt Status Register of the CSI2 Rx core.

Parameters

InstancePtr is the XCsi instance to operate on

Returns: Interrupt Mask with bits set for corresponding interrupt in Interrupt Status register

Note: None

References XCsi_Config::BaseAddr, XCsi::Config, and XCSI_ISR_OFFSET.

Referenced by XCsi_IntrHandler().

void XCsi_GetShortPacket	(	XCsi *	InstancePtr,
		XCsi_SPktData *	ShortPacketStruct
	)

This function will get the short packet received in the FIFO from the Generic Short Packet Register and fill up the structure passed from caller.

Parameters

InstancePtr	is the XCsi instance to operate on
ShortPacketStruct	is going to be filled up by this function and returned to the caller.

Returns: None

References XCsi_Config::BaseAddr, XCsi::Config, XCsi_SPktData::Data, XCsi_SPktData::DataType, XCsi_SPktData::VirtualChannel, XCSI_SPKTR_DATA_MASK, XCSI_SPKTR_DATA_SHIFT, XCSI_SPKTR_DT_MASK, XCSI_SPKTR_DT_SHIFT, XCSI_SPKTR_OFFSET, XCSI_SPKTR_VC_MASK, and XCSI_SPKTR_VC_SHIFT.

void XCsi_GetVCInfo	(	XCsi *	InstancePtr,
		u8	Vc,
		XCsi_VCInfo *	VCInfo
	)

This function will get the line count, byte count and data type information about a Virtual Channel.

Parameters

InstancePtr	is the XCsi instance to operate on
Vc	is the Virtual Channel number whose information is requested
VCInfo	is going to be filled up by this function and returned to the caller.

Returns: None

References XCsi_Config::BaseAddr, XCsi_VCInfo::ByteCount, XCsi::Config, XCsi_VCInfo::DataType, XCsi_VCInfo::LineCount, XCSI_MAX_VC, XCSI_VC0INF1R_OFFSET, XCSI_VC1INF1R_OFFSET, XCSI_VCXINF1R_BYTECOUNT_MASK, XCSI_VCXINF1R_BYTECOUNT_SHIFT, XCSI_VCXINF1R_LINECOUNT_MASK, XCSI_VCXINF1R_LINECOUNT_SHIFT, XCSI_VCXINF2R_DATATYPE_MASK, and XCSI_VCXINF2R_DATATYPE_SHIFT.

u32 XCsi_GetVCSelection ( XCsi * InstancePtr )

This function will return the virtual channels selected.

Parameters

InstancePtr is the XCsi instance to operate on

Returns: Value of selected VCs.

References XCsi_Config::BaseAddr, XCsi::Config, and XCSI_VC_SEL_OFFSET.

void XCsi_InterruptClear	(	XCsi *	InstancePtr,
		u32	Mask
	)

This function will clear the interrupts set in the Interrupt Status Register of the CSI2 Rx core.

Parameters

InstancePtr	is the XCsi instance to operate on
Mask	is Interrupt Mask with bits set for corresponding interrupt to be cleared in the Interrupt Status register

Returns: None

Note: None

References XCsi_Config::BaseAddr, XCsi::Config, XCSI_IER_ALLINTR_MASK, XCSI_ISR_ALLINTR_MASK, and XCSI_ISR_OFFSET.

Referenced by XCsi_IntrHandler().

void XCsi_IntrDisable	(	XCsi *	InstancePtr,
		u32	Mask
	)

This function will disable the interrupts present in the interrupt mask passed onto the function.

Parameters

InstancePtr	is the XCsi instance to operate on
Mask	is the interrupt mask which need to be enabled in core

Returns: None

Note: None

References XCsi_Config::BaseAddr, XCsi::Config, XCSI_IER_ALLINTR_MASK, and XCSI_IER_OFFSET.

void XCsi_IntrEnable	(	XCsi *	InstancePtr,
		u32	Mask
	)

This function will enable the interrupts present in the interrupt mask passed onto the function.

Parameters

InstancePtr	is the XCsi instance to operate on
Mask	is the interrupt mask which need to be enabled in core

Returns: None

Note: None

References XCsi_Config::BaseAddr, XCsi::Config, XCSI_IER_ALLINTR_MASK, and XCSI_IER_OFFSET.

Referenced by XCsi_Configure().

void XCsi_IntrHandler ( void * InstancePtr )

This function is the interrupt handler for the CSI2 Rx core.

This handler reads the pending interrupt from the Interrupt Status register, determines the source of the interrupts and calls the respective callbacks for the interrupts that are enabled in Interrupt Enable register, and finally clears the interrupts.

The application is responsible for connecting this function to the interrupt system. Application beyond this core is also responsible for providing callbacks to handle interrupts and installing the callbacks using XCsi_SetCallBack() during initialization phase.

Parameters

InstancePtr is a pointer to the XCsi core instance.

Returns: None.

Note: Interrupt should be enabled to execute interrupt handler.

References XCsi_Config::BaseAddr, XCsi::Config, XCsi::DPhyLvlErrCallBack, XCsi::DPhyLvlErrRef, XCsi::ErrorCallBack, XCsi::ErrRef, XCsi::FrameRecvdCallBack, XCsi::FrameRecvdRef, XCsi::IsReady, XCsi::PktLvlErrCallBack, XCsi::PktLvlErrRef, XCsi::ProtDecErrRef, XCsi::ProtDecodeErrCallBack, XCsi::ShortPacketCallBack, XCsi::ShortPacketRef, XCsi::VCXErrCallBack, XCsi::VCXErrRef, XCsi_GetIntrEnable(), XCsi_GetIntrStatus(), XCsi_InterruptClear(), and XCSI_VCX_FE_OFFSET.

u8 XCsi_IsActiveLaneCountValid	(	XCsi *	InstancePtr,
		u8	ActiveLanesCount
	)

This function checks the validity of the active lanes parameter.

Parameters

InstancePtr	is a pointer to the Subsystem instance to be worked on.
ActiveLanesCount	is the lane count to check if valid.

Returns

1 if specified Active Lanes is valid.
0 otherwise, if the Active Lanes specified isn't valid as per spec and design.

Note: None.

References XCsi::Config, XCsi_Config::FixedLanes, and XCsi_Config::MaxLanesPresent.

Referenced by XCsi_Configure().

XCsi_Config * XCsi_LookupConfig ( u32 DeviceId )

Look up the hardware configuration for a device instance.

Parameters

DeviceId is the unique device ID of the device to lookup for

Returns: The reference to the configuration record in the configuration table (in xcsi_g.c) corresponding to the Device ID or if not found,a NULL pointer is returned.

Note: None

Referenced by CsiSelfTestExample().

u32 XCsi_Reset ( XCsi * InstancePtr )

This function will do a reset of the IP.

This will reset the values of all regiters except Core Config and Protocol Config registers.

Parameters

InstancePtr is the XCsi instance to operate on.

Returns

XST_SUCCESS On proper reset.
XST_FAILURE on timeout and core being stuck in reset

Note: None.

u32 XCsi_SelfTest ( XCsi * InstancePtr )

Runs a self-test on the driver/device.

This test checks if the LaneCount present in register matches the one from the generated file.

Parameters

InstancePtr is a pointer to the XCsi instance.

Returns

XST_SUCCESS if self-test was successful

XST_FAILURE if the read value was not equal to _g.c file

Note: None

References XCsi_Config::BaseAddr, XCsi::Config, XCsi::IsReady, XCsi_Config::MaxLanesPresent, XCSI_PCR_MAXLANES_MASK, XCSI_PCR_MAXLANES_SHIFT, and XCSI_PCR_OFFSET.

Referenced by CsiSelfTestExample().

int XCsi_SetCallBack	(	XCsi *	InstancePtr,
		u32	HandleType,
		void *	Callbackfunc,
		void *	Callbackref
	)

This routine installs an asynchronous callback function for the given HandlerType:

HandlerType                     Callback Function Type
----------------------------  --------------------------------------------
(XCSI_HANDLER_DPHY)             DPhyLvlErrCallBack
(XCSI_HANDLER_PROTLVL)  ProtDecodeErrCallBack
(XCSI_HANDLER_PKTLVL)           PktLvlErrCallBack
(XCSI_HANDLER_SHORTPACKET)      ShortPacketCallBack
(XCSI_HANDLER_FRAMERECVD)       FrameRecvdCallBack
(XCSI_HANDLER_VCXERR)           VCXErrCallBack
(XCSI_HANDLER_OTHERERROR)       ErrorCallBack

Parameters

InstancePtr	is the XCsi instance to operate on
HandleType	is the type of call back to be registered.
Callbackfunc	is the pointer to a call back funtion which is called when a particular event occurs.
Callbackref	is a void pointer to data to be referenced to by the Callbackfunc

Returns

XST_SUCCESS when handler is installed.

XST_INVALID_PARAM when HandlerType is invalid.

Note: Invoking this function for a handler that already has been installed replaces it with the new handler.

References XCsi::DPhyLvlErrCallBack, XCsi::DPhyLvlErrRef, XCsi::ErrorCallBack, XCsi::ErrRef, XCsi::FrameRecvdCallBack, XCsi::FrameRecvdRef, XCsi::IsReady, XCsi::PktLvlErrCallBack, XCsi::PktLvlErrRef, XCsi::ProtDecErrRef, XCsi::ProtDecodeErrCallBack, XCsi::ShortPacketCallBack, XCsi::ShortPacketRef, XCsi::VCXErrCallBack, and XCsi::VCXErrRef.

void XCsi_SetVCSelection	(	XCsi *	InstancePtr,
		u16	Value
	)

This function will control the virtual channels selection dynamically.

Parameters

InstancePtr	is the XCsi instance to operate on
Value	will set the virtual channels corresponding to each bit value. bit value 1: core processes packets with this VC, bit value 0: core filters packets with this VC.

Returns: None

References XCsi_Config::BaseAddr, XCsi::Config, and XCSI_VC_SEL_OFFSET.

Data Structures

Macros

Typedefs

Functions

Interrupt Types for setting Callbacks

Device registers

Bitmasks and offsets of XCSI_CCR_OFFSET register

Bitmasks and offset of XCSI_PCR_OFFSET register

Bitmasks and offsets of XCSI_CSR_OFFSET register

Bitmasks and offsets of XCSI_GIER_OFFSET register

Bitmasks and offsets of XCSI_ISR_OFFSET register

BitMasks for grouped interrupts

Bitmasks and offsets of XCSI_IER_OFFSET register

Bitmasks and offsets of XCSI_SPKTR_OFFSET register

Bitmasks and offsets of XCSI_CLKINFR_OFFSET register

Bitmasks and offsets of XCSI_L(0..3)INFR register

Bitmasks and offsets of XCSI_VC(0..3)INF(1/2)R register

Macro Definition Documentation

Typedef Documentation

Function Documentation