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dsi
Vitis Drivers API Documentation
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dsi
Vitis Drivers API Documentation
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The configuration structure for DSI Controller This structure passes the hardware building information to the driver. More...
Data Fields | |
| u32 | DeviceId |
| Device Id. More... | |
| UINTPTR | BaseAddr |
| Base address of DSI Controller. More... | |
| u8 | DsiLanes |
| DSI supported lanes1, 2, 3, 4. More... | |
| u8 | DataType |
| RGB type. More... | |
| u32 | DsiByteFifo |
| DSI byte FIFO size 128, 256, 512, 1024, 2048, 4096, 8192, 16384. More... | |
| u8 | CrcGen |
| CRC Generation enable status. More... | |
| u8 | DsiPixel |
| Pixels per beat receive on input stream. More... | |
The configuration structure for DSI Controller This structure passes the hardware building information to the driver.
| UINTPTR XDsi_Config::BaseAddr |
Base address of DSI Controller.
Referenced by DsiSelfTestExample(), XDsi_CfgInitialize(), XDsi_GetConfigParams(), XDsi_SelfTest(), XDsi_SendLongPacket(), XDsi_SendShortPacket(), XDsi_SetCustomVideoInterfaceTiming(), and XDsi_SetVideoInterfaceTiming().
| u8 XDsi_Config::CrcGen |
CRC Generation enable status.
| u8 XDsi_Config::DataType |
RGB type.
| u32 XDsi_Config::DeviceId |
Device Id.
| u32 XDsi_Config::DsiByteFifo |
DSI byte FIFO size 128, 256, 512, 1024, 2048, 4096, 8192, 16384.
| u8 XDsi_Config::DsiLanes |
DSI supported lanes1, 2, 3, 4.
Referenced by XDsi_SelfTest().
| u8 XDsi_Config::DsiPixel |
Pixels per beat receive on input stream.