Overview

This file demonstrates how to use the mcdma driver on the Xilinx AXI MCDMA core (AXI MCDMA) to transfer packets in interrupt mode.

This examples shows how to do multiple packets and multiple BD's Per packet transfers.

H/W Requirements: In order to test this example at the design level AXI MCDMA MM2S should be connected with the S2MM channel.

System level Considerations for Zynq UltraScale+ designs: Please refer xmcdma_polled_example.c file.

MODIFICATION HISTORY:

Ver   Who  Date      Changes
----- ---- --------  -------------------------------------------------------
1.0      adk  18/07/17  Initial Version.
1.2      rsp  07/19/18  Read channel count from IP config.
                Fix gcc 'pointer from integer without a cast' warning.
      rsp  08/17/18     Fix typos and rephrase comments.
      rsp  08/17/18  Read Length register value from IP config.
1.3   rsp  02/05/19  Remove snooping enable from application.
      rsp  02/06/19  Programmatically select cache maintenance ops for HPC
                     and non-HPC designs. In Rx remove arch64 specific dsb
                     instruction by performing cache invalidate operation
                     for all supported architectures.
1.7   sa   08/12/22  Updated the example to use latest MIG cannoical define
                        i.e XPAR_MIG_0_C0_DDR4_MEMORY_MAP_BASEADDR.
1.8      sa   09/29/22  Fix infinite loops in the example.
1.9   aj   19/07/23  Updated the example to support SDT flow.

Functions
int	main (void)
	Main function. More...

Function Documentation

int main ( void )

Main function.

This function is the main entry of the tests on DMA core. It sets up DMA engine to be ready to receive and send packets, then a packet is transmitted and will be verified after it is received via the DMA.

Parameters

None

Returns

XST_SUCCESS if test passes
XST_FAILURE if test fails.

Note: None.

References XMcDma_CfgInitialize(), and XMcdma_LookupConfig().

Overview

Functions

Function Documentation