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qspips
Vitis Drivers API Documentation
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Data Structures | |
struct | XQspiPs_Config |
This typedef contains configuration information for the device. More... | |
struct | XQspiPs |
The XQspiPs driver instance data. More... | |
Macros | |
#define | XQspiPs_SetSlaveIdle(InstancePtr, RegisterValue) |
Set the contents of the slave idle count register. More... | |
#define | XQspiPs_GetSlaveIdle(InstancePtr) |
Get the contents of the slave idle count register. More... | |
#define | XQspiPs_SetTXWatermark(InstancePtr, RegisterValue) |
Set the contents of the transmit FIFO watermark register. More... | |
#define | XQspiPs_GetTXWatermark(InstancePtr) XQspiPs_In32(((InstancePtr)->Config.BaseAddress) + XQSPIPS_TXWR_OFFSET) |
Get the contents of the transmit FIFO watermark register. More... | |
#define | XQspiPs_SetRXWatermark(InstancePtr, RegisterValue) |
Set the contents of the receive FIFO watermark register. More... | |
#define | XQspiPs_GetRXWatermark(InstancePtr) XQspiPs_In32(((InstancePtr)->Config.BaseAddress) + XQSPIPS_RXWR_OFFSET) |
Get the contents of the receive FIFO watermark register. More... | |
#define | XQspiPs_Enable(InstancePtr) |
Enable the device and uninhibit master transactions. More... | |
#define | XQspiPs_Disable(InstancePtr) XQspiPs_Out32(((InstancePtr)->Config.BaseAddress) + XQSPIPS_ER_OFFSET, 0) |
Disable the device. More... | |
#define | XQspiPs_SetLqspiConfigReg(InstancePtr, RegisterValue) |
Set the contents of the Linear QSPI Configuration register. More... | |
#define | XQspiPs_GetLqspiConfigReg(InstancePtr) |
Get the contents of the Linear QSPI Configuration register. More... | |
Configuration options | |
The following options are supported to enable/disable certain features of an QSPI device. Each of the options is a bit mask, so more than one may be specified. The Active Low Clock option configures the device's clock polarity. Setting this option means the clock is active low and the SCK signal idles high. By default, the clock is active high and SCK idles low. The Clock Phase option configures the QSPI device for one of two transfer formats. A clock phase of 0, the default, means data is valid on the first SCK edge (rising or falling) after the slave select (SS) signal has been asserted. A clock phase of 1 means data is valid on the second SCK edge (rising or falling) after SS has been asserted. The QSPI Force Slave Select option is used to enable manual control of the slave select signal. 0: The SPI_SS signal is controlled by the QSPI controller during transfers. (Default) 1: The SPI_SS signal is forced active (driven low) regardless of any transfers in progress. NOTE: The driver will handle setting and clearing the Slave Select when the user sets the "FORCE_SSELECT_OPTION". Using this option will allow the QSPI clock to be set to a faster speed. If the QSPI clock is too fast, the processor cannot empty and refill the FIFOs before the TX FIFO is empty When the QSPI hardware is controlling the Slave Select signals, this will cause slave to be de-selected and terminate the transfer. The Manual Start option is used to enable manual control of the Start command to perform data transfer. 0: The Start command is controlled by the QSPI controller during transfers(Default). Data transmission starts as soon as there is data in the TXFIFO and stalls when the TXFIFO is empty 1: The Start command must be issued by software to perform data transfer. Bit 15 of Configuration register is used to issue Start command. This bit must be set whenever TXFIFO is filled with new data. NOTE: The driver will set the Manual Start Enable bit in Configuration Register, if Manual Start option is selected. Software will issue Manual Start command whenever TXFIFO is filled with data. When there is no further data, driver will clear the Manual Start Enable bit. | |
#define | XQSPIPS_CLK_ACTIVE_LOW_OPTION 0x2 |
Active Low Clock option. More... | |
#define | XQSPIPS_CLK_PHASE_1_OPTION 0x4 |
Clock Phase one option. More... | |
#define | XQSPIPS_FORCE_SSELECT_OPTION 0x10 |
Force Slave Select. More... | |
#define | XQSPIPS_MANUAL_START_OPTION 0x20 |
Manual Start enable. More... | |
#define | XQSPIPS_LQSPI_MODE_OPTION 0x80 |
Linear QPSI mode. More... | |
#define | XQSPIPS_HOLD_B_DRIVE_OPTION 0x100 |
Drive HOLD_B Pin. More... | |
QSPI Clock Prescaler options | |
The QSPI Clock Prescaler Configuration bits are used to program master mode bit rate. The bit rate can be programmed in divide-by-two decrements from pclk/2 to pclk/256. | |
#define | XQSPIPS_CLK_PRESCALE_2 0x00 |
PCLK/2 Prescaler. More... | |
#define | XQSPIPS_CLK_PRESCALE_4 0x01 |
PCLK/4 Prescaler. More... | |
#define | XQSPIPS_CLK_PRESCALE_8 0x02 |
PCLK/8 Prescaler. More... | |
#define | XQSPIPS_CLK_PRESCALE_16 0x03 |
PCLK/16 Prescaler. More... | |
#define | XQSPIPS_CLK_PRESCALE_32 0x04 |
PCLK/32 Prescaler. More... | |
#define | XQSPIPS_CLK_PRESCALE_64 0x05 |
PCLK/64 Prescaler. More... | |
#define | XQSPIPS_CLK_PRESCALE_128 0x06 |
PCLK/128 Prescaler. More... | |
#define | XQSPIPS_CLK_PRESCALE_256 0x07 |
PCLK/256 Prescaler. More... | |
Callback events | |
These constants specify the handler events that are passed to a handler from the driver. These constants are not bit masks such that only one will be passed at a time to the handler. | |
#define | XQSPIPS_EVENT_TRANSFER_DONE 2 |
Transfer done. More... | |
#define | XQSPIPS_EVENT_TRANSMIT_UNDERRUN 3 |
TX FIFO empty. More... | |
#define | XQSPIPS_EVENT_RECEIVE_OVERRUN 4 |
Receive data loss because RX FIFO full. More... | |
Flash commands | |
The following constants define most of the commands supported by flash devices. Users can add more commands supported by the flash devices | |
#define | XQSPIPS_FLASH_OPCODE_WRSR 0x01 /* Write status register */ |
#define | XQSPIPS_FLASH_OPCODE_PP 0x02 /* Page program */ |
#define | XQSPIPS_FLASH_OPCODE_NORM_READ 0x03 /* Normal read data bytes */ |
#define | XQSPIPS_FLASH_OPCODE_WRDS 0x04 /* Write disable */ |
#define | XQSPIPS_FLASH_OPCODE_RDSR1 0x05 /* Read status register 1 */ |
#define | XQSPIPS_FLASH_OPCODE_WREN 0x06 /* Write enable */ |
#define | XQSPIPS_FLASH_OPCODE_FAST_READ 0x0B /* Fast read data bytes */ |
#define | XQSPIPS_FLASH_OPCODE_BE_4K 0x20 /* Erase 4KiB block */ |
#define | XQSPIPS_FLASH_OPCODE_RDSR2 0x35 /* Read status register 2 */ |
#define | XQSPIPS_FLASH_OPCODE_DUAL_READ 0x3B /* Dual read data bytes */ |
#define | XQSPIPS_FLASH_OPCODE_BE_32K 0x52 /* Erase 32KiB block */ |
#define | XQSPIPS_FLASH_OPCODE_QUAD_READ 0x6B /* Quad read data bytes */ |
#define | XQSPIPS_FLASH_OPCODE_ERASE_SUS 0x75 /* Erase suspend */ |
#define | XQSPIPS_FLASH_OPCODE_ERASE_RES 0x7A /* Erase resume */ |
#define | XQSPIPS_FLASH_OPCODE_RDID 0x9F /* Read JEDEC ID */ |
#define | XQSPIPS_FLASH_OPCODE_BE 0xC7 /* Erase whole flash block */ |
#define | XQSPIPS_FLASH_OPCODE_SE 0xD8 /* Sector erase (usually 64KB)*/ |
#define | XQSPIPS_FLASH_OPCODE_DUAL_IO_READ 0xBB /* Read data using Dual I/O */ |
#define | XQSPIPS_FLASH_OPCODE_QUAD_IO_READ 0xEB /* Read data using Quad I/O */ |
#define | XQSPIPS_FLASH_OPCODE_BRWR 0x17 /* Bank Register Write */ |
#define | XQSPIPS_FLASH_OPCODE_BRRD 0x16 /* Bank Register Read */ |
#define | XQSPIPS_FLASH_OPCODE_EARWR 0xC5 |
#define | XQSPIPS_FLASH_OPCODE_EARRD 0xC8 |
#define | XQSPIPS_FLASH_OPCODE_DIE_ERASE 0xC4 |
#define | XQSPIPS_FLASH_OPCODE_READ_FLAG_SR 0x70 |
#define | XQSPIPS_FLASH_OPCODE_CLEAR_FLAG_SR 0x50 |
#define | XQSPIPS_FLASH_OPCODE_READ_LOCK_REG 0xE8 /* Lock Reg Read */ |
#define | XQSPIPS_FLASH_OPCODE_WRITE_LOCK_REG 0xE5 /* Lock Reg Write */ |
Instruction size | |
The following constants define numbers 1 to 4. Used to identify whether TXD0,1,2 or 3 is to be used. | |
#define | XQSPIPS_SIZE_ONE 1 |
#define | XQSPIPS_SIZE_TWO 2 |
#define | XQSPIPS_SIZE_THREE 3 |
#define | XQSPIPS_SIZE_FOUR 4 |
ConnectionMode | |
The following constants are the possible values of ConnectionMode in Config structure. | |
#define | XQSPIPS_CONNECTION_MODE_SINGLE 0 |
#define | XQSPIPS_CONNECTION_MODE_STACKED 1 |
#define | XQSPIPS_CONNECTION_MODE_PARALLEL 2 |
FIFO threshold value | |
This is the Rx FIFO threshold (in words) that was found to be most optimal in terms of performance | |
#define | XQSPIPS_RXFIFO_THRESHOLD_OPT 32 |
Typedefs | |
typedef void(* | XQspiPs_StatusHandler )(void *CallBackRef, u32 StatusEvent, unsigned ByteCount) |
The handler data type allows the user to define a callback function to handle the asynchronous processing for the QSPI device. More... | |
Functions | |
XQspiPs_Config * | XQspiPs_LookupConfig (u16 DeviceId) |
Looks up the device configuration based on the unique device ID. More... | |
int | XQspiPs_CfgInitialize (XQspiPs *InstancePtr, XQspiPs_Config *ConfigPtr, u32 EffectiveAddr) |
Initializes a specific XQspiPs instance such that the driver is ready to use. More... | |
void | XQspiPs_Reset (XQspiPs *InstancePtr) |
Resets the QSPI device. More... | |
void | XQspiPs_Abort (XQspiPs *InstancePtr) |
Aborts a transfer in progress by disabling the device and flush the RxFIFO. More... | |
s32 | XQspiPs_Transfer (XQspiPs *InstancePtr, u8 *SendBufPtr, u8 *RecvBufPtr, u32 ByteCount) |
Transfers specified data on the QSPI bus. More... | |
s32 | XQspiPs_PolledTransfer (XQspiPs *InstancePtr, u8 *SendBufPtr, u8 *RecvBufPtr, u32 ByteCount) |
Transfers specified data on the QSPI bus in polled mode. More... | |
int | XQspiPs_LqspiRead (XQspiPs *InstancePtr, u8 *RecvBufPtr, u32 Address, unsigned ByteCount) |
Read the flash in Linear QSPI mode. More... | |
int | XQspiPs_SetSlaveSelect (XQspiPs *InstancePtr) |
Selects the slave with which the master communicates. More... | |
void | XQspiPs_SetStatusHandler (XQspiPs *InstancePtr, void *CallBackRef, XQspiPs_StatusHandler FuncPtr) |
Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software. More... | |
void | XQspiPs_InterruptHandler (void *InstancePtr) |
The interrupt handler for QSPI interrupts. More... | |
int | XQspiPs_SelfTest (XQspiPs *InstancePtr) |
Runs a self-test on the driver/device. More... | |
s32 | XQspiPs_SetOptions (XQspiPs *InstancePtr, u32 Options) |
This function sets the options for the QSPI device driver. More... | |
u32 | XQspiPs_GetOptions (XQspiPs *InstancePtr) |
This function gets the options for the QSPI device. More... | |
s32 | XQspiPs_SetClkPrescaler (XQspiPs *InstancePtr, u8 Prescaler) |
This function sets the clock prescaler for an QSPI device. More... | |
u8 | XQspiPs_GetClkPrescaler (XQspiPs *InstancePtr) |
This function gets the clock prescaler of an QSPI device. More... | |
int | XQspiPs_SetDelays (XQspiPs *InstancePtr, u8 DelayNss, u8 DelayBtwn, u8 DelayAfter, u8 DelayInit) |
This function sets the delay register for the QSPI device driver. More... | |
void | XQspiPs_GetDelays (XQspiPs *InstancePtr, u8 *DelayNss, u8 *DelayBtwn, u8 *DelayAfter, u8 *DelayInit) |
This function gets the delay settings for an QSPI device. More... | |