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spi
Vitis Drivers API Documentation
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spi
Vitis Drivers API Documentation
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This file contains a design example using the Spi driver (XSpi) and the Spi device as a Slave, in interrupt mode.
This example fills the Spi Tx buffer with the number of data bytes it expects to receive from the master and then Spi device waits for an external master to initiate the transfer. When the master initiates the transfer, the Spi device receives data from the master and simultaneously sends the data in Tx buffer to the master. Once the transfer is complete, a transfer complete interrupt is generated and this example prints the data received from the master. The number of bytes to be received by the Spi slave is defined by the constant BUFFER_SIZE in this file.
The external SPI devices that are present on the Xilinx boards don't support the Master functionality. This example has been tested with Aardvark I2C/SPI Host Adapter, an off board external SPI Master device and the Xilinx SPI device configured as a Slave. This example has been tested for byte-wide SPI transfers.
This example assumes that there is a STDIO device in the system.
MODIFICATION HISTORY:
Ver Who Date Changes
1.00a psk 09/05/08 First Release 3.00a ktn 10/22/09 Converted all register accesses to 32 bit access. Updated to use the HAL APIs/macros. Replaced call to XSpi_Initialize API with XSpi_LookupConfig and XSpi_CfgInitialize. 3.01a sdm 04/23/10 Enabled DTR Half_empty interrupt so that Tx FIFO is not empty during a transfer in slave mode. 4.2 ms 01/23/17 Added xil_printf statement in main function to ensure that "Successfully ran" and "Failed" strings are available in all examples. This is a fix for CR-965028. 4.11 sb 07/11/23 Added support for system device-tree flow.
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| int | main (void) |
| Main function to call the Spi Slave example in interrupt mode. More... | |
| int main | ( | void | ) |
Main function to call the Spi Slave example in interrupt mode.