MLIR-AIE
memory_allocator.h
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1//===- memory_allocator.h ---------------------------------------*- C++ -*-===//
2//
3// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7// (c) Copyright 2021 Xilinx Inc.
8// (c) Copyright 2023 Advanced Micro Devices, Inc.
9//
10//===----------------------------------------------------------------------===//
11
12#ifndef AIE_MEMORY_ALLOCATOR_H
13#define AIE_MEMORY_ALLOCATOR_H
14
15#include "target.h"
16
17#include <stdint.h>
18#include <stdio.h>
19#include <stdlib.h>
20
21// #if defined(__AIESIM__)
22// #include "xioutils.h"
23// #include <iostream>
24// #endif
25
26extern "C" {
27
28/// Depending on the model of a particular device, this API supports several
29/// different scenarios for device memory allocation and reference.
30/// For instance, on the VCK190 with ARM host programmed through libXAIE,
31/// `mlir_aie_mem_alloc()` might allocate data in device DDR and return a
32/// cacheable mapping to it. `mlir_aie_sync_mem_cpu()` and
33/// `mlir_aie_sync_mem_dev()` would flush and invalidate caches.
34/// A device address would correspond to a DDR physical address.
35/// Alternatively in the AIESIM environment, `mlir_aie_mem_alloc()` allocates
36/// a duplicate buffer in the host memory and in the simulator memory for each
37/// allocation. `mlir_aie_sync_mem_cpu()` and `mlir_aie_sync_mem_dev()` make
38/// an explicit copy between these two buffers and device addresses are modeled
39/// in a simulator-specific way. Other combinations are also possible, largely
40/// representing different tradeoffs between efficiency of host data access vs.
41/// efficiency of accelerator access.
42
43// static variable for tracking current DDR physical addr during AIESIM
44static uint16_t nextAlignedAddr;
45
46/// @brief Allocate a buffer in device memory
47/// @param ctx The AIE context
48/// @param handle External memory model handle for tracking the allocation
49/// @param size The number of 32-bit words to allocate
50/// @return A host-side pointer that can write into the allocated buffer
51/// @todo This is at best a quick hack and should be replaced
53 int size);
54
55/// @brief Synchronize the buffer from the device to the host CPU.
56/// This is expected to be called after the device writes data into
57/// device memory, so that the data can be read by the CPU. In
58/// a non-cache coherent system, this implies invalidating the
59/// processor cache associated with the buffer.
60/// @param handle External memory model handle identifying the buffer to
61/// synchronize
63
64/// @brief Synchronize the buffer from the host CPU to the device.
65/// This is expected to be called after the host writes data into
66/// device memory, so that the data can be read by the device. In
67/// a non-cache coherent system, this implies flushing the
68/// processor cache associated with the buffer.
69/// @param handle External memory model handle identifying the buffer to
70/// synchronize
72
73/// @brief Return a device address corresponding to the given host address.
74/// @param ctx The AIE context
75/// @param host_address A host-side pointer returned from mlir_aie_mem_alloc
76/// @return The device physical address corresponding to the host pointer
77u64 mlir_aie_get_device_address(aie_libxaie_ctx_t *ctx, void *host_address);
78
79} // extern "C"
80
81#endif
void mlir_aie_sync_mem_dev(ext_mem_model_t &handle)
Synchronize the buffer from the host CPU to the device.
u64 mlir_aie_get_device_address(aie_libxaie_ctx_t *ctx, void *host_address)
Return a device address corresponding to the given host address.
void mlir_aie_sync_mem_cpu(ext_mem_model_t &handle)
Synchronize the buffer from the device to the host CPU.
int * mlir_aie_mem_alloc(aie_libxaie_ctx_t *ctx, ext_mem_model_t &handle, int size)
Allocate a buffer in device memory.