MLIR-AIE 1.4.5.dev
AIEToConfiguration.h
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1//===- AIEToConfiguration.h -------------------------------------*- C++ -*-===//
2//
3// Copyright (C) 2024 Advanced Micro Devices, Inc.
4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
5//
6//===----------------------------------------------------------------------===//
7
8#ifndef AIE_CONVERSION_AIETOCONFIGURATION_AIETOCONFIGURATION_H
9#define AIE_CONVERSION_AIETOCONFIGURATION_AIETOCONFIGURATION_H
10
11#include "mlir/IR/BuiltinOps.h"
12#include "mlir/Pass/Pass.h"
13#include <memory>
14
15namespace xilinx::AIEX {
16class BlockwriteData;
17} // namespace xilinx::AIEX
18
19namespace xilinx::AIE {
20
21class DeviceOp;
22
23// --------------------------------------------------------------------------
24// Device configuration
25// --------------------------------------------------------------------------
26
27// an enum to represent the output type of the transaction binary
32
33std::unique_ptr<mlir::OperationPass<xilinx::AIE::DeviceOp>>
35
36std::unique_ptr<mlir::OperationPass<xilinx::AIE::DeviceOp>>
38
39std::optional<mlir::ModuleOp>
40convertTransactionBinaryToMLIR(mlir::MLIRContext *ctx,
41 std::vector<uint8_t> &binary);
42
43// Generate transaction binary and insert configuration operations at the
44// current insertion point, their blockwrite payloads in `blockwriteData`'s
45// device.
46mlir::LogicalResult generateAndInsertConfigOps(
47 mlir::OpBuilder &builder, xilinx::AIE::DeviceOp device,
48 xilinx::AIEX::BlockwriteData &blockwriteData, llvm::StringRef clElfDir = "",
51 bool skipCtrlPktOverlay = false);
52
53// Inserts, before each site in a runtime sequence, the configuration ops of
54// its device. They are generated once per device and sequence-holding device,
55// and a sequence's constants and payload globals are made once, at its head:
56// a device reloaded hundreds of times would otherwise repeat each per reload.
57// Control-packet output skips what is marked is_ctrl_pkt_overlay. A site that
58// is an aiex.npu.write_teardown gets the device's teardown ops instead.
59mlir::LogicalResult insertConfigOps(
60 llvm::ArrayRef<std::pair<mlir::Operation *, xilinx::AIE::DeviceOp>> sites,
62
63// Inlines each aiex.npu.write_config and write_teardown in `module`. The arith
64// and memref dialects must be loaded.
65mlir::LogicalResult inlineWriteConfigs(mlir::ModuleOp module);
66
67// Insert the ops of `device`'s teardown (see aiex.npu.write_teardown).
68mlir::LogicalResult
69generateAndInsertTeardownOps(mlir::OpBuilder &builder,
70 xilinx::AIE::DeviceOp device,
71 xilinx::AIEX::BlockwriteData &blockwriteData,
74
75// --------------------------------------------------------------------------
76// Device reset
77// --------------------------------------------------------------------------
78
79// Enum for specifying which tile types to reset
80enum class ResetTileType : unsigned {
81 None = 0,
82 ShimNOC = 1 << 0,
83 MemTile = 1 << 1,
84 CoreTile = 1 << 2,
86};
87
88inline bool hasFlag(ResetTileType value, ResetTileType flag) {
89 return (static_cast<unsigned>(value) & static_cast<unsigned>(flag)) != 0;
90}
91
92// Enum for specifying when to reset
93enum class ResetMode {
94 Never, // Never perform reset
95 IfUsed, // Reset only if the tile is used in the device
96 IfUsedFineGrained, // Reset only individual locks/connections that are used
97 IfChanged, // Reset only if the tile configuration changed from previous
98 IfChangedFineGrained, // Reset only individual locks/connections that changed
99 Always // Reset all tiles of the specified type
100};
101
102// Configuration for different reset operations
111
112// Insert reset operations at the current insertion point
113mlir::LogicalResult generateAndInsertResetOps(
114 mlir::OpBuilder &builder, xilinx::AIE::DeviceOp device,
115 ResetConfig dmaConfig, ResetConfig switchConfig, ResetConfig lockConfig,
116 ResetConfig coreConfig, xilinx::AIE::DeviceOp previousDevice);
117
118} // namespace xilinx::AIE
119
120#endif // AIE_CONVERSION_AIETOCONFIGURATION_AIETOCONFIGURATION_H
bool hasFlag(ResetTileType value, ResetTileType flag)
mlir::LogicalResult generateAndInsertResetOps(mlir::OpBuilder &builder, xilinx::AIE::DeviceOp device, ResetConfig dmaConfig, ResetConfig switchConfig, ResetConfig lockConfig, ResetConfig coreConfig, xilinx::AIE::DeviceOp previousDevice)
mlir::LogicalResult insertConfigOps(llvm::ArrayRef< std::pair< mlir::Operation *, xilinx::AIE::DeviceOp > > sites, AIEToConfigurationOutputType outputType)
mlir::LogicalResult inlineWriteConfigs(mlir::ModuleOp module)
std::unique_ptr< mlir::OperationPass< xilinx::AIE::DeviceOp > > createConvertAIEToTransactionPass()
mlir::LogicalResult generateAndInsertConfigOps(mlir::OpBuilder &builder, xilinx::AIE::DeviceOp device, xilinx::AIEX::BlockwriteData &blockwriteData, llvm::StringRef clElfDir="", AIEToConfigurationOutputType outputType=AIEToConfigurationOutputType::Transaction, bool skipCtrlPktOverlay=false)
std::optional< mlir::ModuleOp > convertTransactionBinaryToMLIR(mlir::MLIRContext *ctx, std::vector< uint8_t > &binary)
std::unique_ptr< mlir::OperationPass< xilinx::AIE::DeviceOp > > createConvertAIEToControlPacketsPass()
mlir::LogicalResult generateAndInsertTeardownOps(mlir::OpBuilder &builder, xilinx::AIE::DeviceOp device, xilinx::AIEX::BlockwriteData &blockwriteData, AIEToConfigurationOutputType outputType=AIEToConfigurationOutputType::Transaction)
ResetConfig(ResetTileType tt=ResetTileType::None, ResetMode m=ResetMode::Never)