Passes.h

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//===- Passes.h - AIE Vector Passes -----------------------------*- C++ -*-===//
//
// Copyright (C) 2022 Xilinx, Inc.
// Copyright (C) 2023 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// Register all the AIE vectorization passes
//===----------------------------------------------------------------------===//
 
#ifndef AIE_DIALECT_AIEVEC_TRANSFORMS_PASSES_H
#define AIE_DIALECT_AIEVEC_TRANSFORMS_PASSES_H
 
#include "aie/Dialect/AIEVec/AIE1/IR/AIEVecAIE1Dialect.h"
#include "aie/Dialect/AIEVec/IR/AIEVecDialect.h"
 
#include "mlir/Pass/Pass.h"
#include "mlir/Pass/PassOptions.h"
 
namespace mlir {
 
namespace affine {
class AffineDialect;
}
 
namespace func {
class FuncDialect;
} // end namespace func
 
namespace arith {
class ArithDialect;
} // end namespace arith
 
namespace memref {
class MemRefDialect;
} // end namespace memref
 
namespace scf {
class SCFDialect;
} // end namespace scf
 
namespace vector {
class VectorDialect;
} // end namespace vector
 
} // end namespace mlir
 
//===----------------------------------------------------------------------===//
// Registration
//===----------------------------------------------------------------------===//
 
namespace mlir {
namespace func {
class FuncOp;
} // namespace func
} // namespace mlir
 
namespace xilinx {
namespace aievec {
 
#define GEN_PASS_DECL
#include "aie/Dialect/AIEVec/Transforms/Passes.h.inc"
 
std::unique_ptr<mlir::Pass> createSplitVectorLoadUpsChainsPass();
 
/// Generate the code for registering passes.
#define GEN_PASS_REGISTRATION
#include "aie/Dialect/AIEVec/Transforms/Passes.h.inc"
 
} // end namespace aievec
} // end namespace xilinx
 
#endif // AIE_DIALECT_AIEVEC_TRANSFORMS_PASSES_H