8#ifndef AIE_C_TARGETMODEL_H
9#define AIE_C_TARGETMODEL_H
30#define DEFINE_C_API_STRUCT(name, storage) \
34 typedef struct name name
38#undef DEFINE_C_API_STRUCT
43MLIR_CAPI_EXPORTED uint32_t
57MLIR_CAPI_EXPORTED uint32_t
61MLIR_CAPI_EXPORTED uint32_t
76MLIR_CAPI_EXPORTED
bool
80 int src_col,
int src_row,
81 int dst_col,
int dst_row);
84 int src_col,
int src_row,
85 int dst_col,
int dst_row);
88 int src_col,
int src_row,
89 int dst_col,
int dst_row);
92 int src_col,
int src_row,
93 int dst_col,
int dst_row);
96 int src_col,
int src_row,
97 int dst_col,
int dst_row);
100 int src_col,
int src_row,
101 int dst_col,
int dst_row);
104 int src_col,
int src_row,
105 int dst_col,
int dst_row);
108 int src_col,
int src_row,
109 int dst_col,
int dst_row);
112 int src_col,
int src_row,
113 int dst_col,
int dst_row);
115MLIR_CAPI_EXPORTED
bool
117 int src_row,
int dst_col,
int dst_row);
119MLIR_CAPI_EXPORTED uint32_t
122MLIR_CAPI_EXPORTED uint32_t
125MLIR_CAPI_EXPORTED uint32_t
128MLIR_CAPI_EXPORTED uint32_t
131MLIR_CAPI_EXPORTED uint32_t
134MLIR_CAPI_EXPORTED uint32_t
137MLIR_CAPI_EXPORTED uint32_t
144MLIR_CAPI_EXPORTED uint32_t
148MLIR_CAPI_EXPORTED uint32_t
152MLIR_CAPI_EXPORTED uint32_t
158MLIR_CAPI_EXPORTED uint32_t
161MLIR_CAPI_EXPORTED uint32_t
164MLIR_CAPI_EXPORTED uint32_t
167MLIR_CAPI_EXPORTED uint32_t
170MLIR_CAPI_EXPORTED uint32_t
173MLIR_CAPI_EXPORTED uint32_t
180MLIR_CAPI_EXPORTED
bool aieDmaBdFits(uint32_t device,
int col,
int row,
181 MlirType elementType, int64_t offset,
182 const int64_t *sizes,
183 const int64_t *strides, int64_t len);
186 AieTargetModel targetModel,
int col,
int row);
189 AieTargetModel targetModel,
int col,
int row, uint32_t bundle);
192 AieTargetModel targetModel,
int col,
int row, uint32_t bundle);
195 AieTargetModel targetModel,
int col,
int row, uint32_t bundle);
198 AieTargetModel targetModel,
int col,
int row, uint32_t bundle);
200MLIR_CAPI_EXPORTED uint32_t
203MLIR_CAPI_EXPORTED uint32_t
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumSourceShimMuxConnections(AieTargetModel targetModel, int col, int row, uint32_t bundle)
MLIR_CAPI_EXPORTED bool aieTargetModelIsWest(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemWestBaseAddress(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED int aieTargetModelColumns(AieTargetModel targetModel)
Returns the number of columns in the target model.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetLocalMemorySize(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED int aieTargetModelRows(AieTargetModel targetModel)
Returns the number of rows in the target model.
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumBanks(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumDestShimMuxConnections(AieTargetModel targetModel, int col, int row, uint32_t bundle)
MLIR_CAPI_EXPORTED uint32_t aieGetTargetModelAddressGenGranularity(AieTargetModel targetModel)
Returns the data bus width for the target model.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMaxLockValue(AieTargetModel targetModel)
Largest value a lock register holds.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumLocks(AieTargetModel targetModel, int col, int row)
#define DEFINE_C_API_STRUCT(name, storage)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDefaultCoreStackSize(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDmaBdWrapBits(AieTargetModel targetModel, int col, int row)
Field widths of a DMA buffer descriptor, which differ by tile type.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMaxRepeatCount(AieTargetModel targetModel)
Largest repeat count one DMA task queue push can carry (unsupported = 0).
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemEast(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsInternal(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED bool aieDmaBdFits(uint32_t device, int col, int row, MlirType elementType, int64_t offset, const int64_t *sizes, const int64_t *strides, int64_t len)
Whether one DMA buffer descriptor of tile (col, row) on device holds the pattern, as aie-normalize-dm...
MLIR_CAPI_EXPORTED bool aieTargetModelIsNPU(AieTargetModel targetModel)
Returns true if this is an NPU target model.
MLIR_CAPI_EXPORTED bool aieTargetModelIsLegalMemAffinity(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumBDs(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsShimNOCorPLTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemNorthBaseAddress(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED bool aieTargetModelIsShimNOCTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetTileType(AieTargetModel targetModel, int col, int row)
Returns the tile type for the given coordinates.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDmaTaskQueueDepth(AieTargetModel targetModel)
How many tasks one DMA channel's task queue holds (unsupported = 0).
MLIR_CAPI_EXPORTED bool aieTargetModelIsEast(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMaxChannelNumForAdjacentTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsCoreTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemSouth(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDmaBdStepBits(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemWest(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED AieTargetModel aieGetTargetModel(uint32_t device)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetTargetArch(AieTargetModel targetModel)
Returns the AIE architecture (as the underlying value of xilinx::AIE::AIEArch: AIE1=1,...
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemTileSize(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemEastBaseAddress(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumDestSwitchboxConnections(AieTargetModel targetModel, int col, int row, uint32_t bundle)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemSouthBaseAddress(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED bool aieTargetModelIsNorth(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsSouth(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumMemTileRows(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetColumnShift(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED bool aieTargetModelIsShimPLTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetRowShift(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumSourceSwitchboxConnections(AieTargetModel targetModel, int col, int row, uint32_t bundle)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDmaBdIterBits(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemNorth(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)