MLIR-AIE 1.4.5.dev
TargetModel.h
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1//===- TargetModel.h --------------------------------------------*- C++ -*-===//
2//
3// Copyright (C) 2024 Advanced Micro Devices, Inc.
4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
5//
6//===----------------------------------------------------------------------===//
7
8#ifndef AIE_C_TARGETMODEL_H
9#define AIE_C_TARGETMODEL_H
10
11#include "mlir-c/IR.h"
12
13#ifdef __cplusplus
14extern "C" {
15#endif
16
17//===----------------------------------------------------------------------===//
18// Opaque type declarations.
19//
20// Types are exposed to C bindings as structs containing opaque pointers. They
21// are not supposed to be inspected from C. This allows the underlying
22// representation to change without affecting the API users. The use of structs
23// instead of typedefs enables some type safety as structs are not implicitly
24// convertible to each other.
25//
26// Instances of these types may or may not own the underlying object. The
27// ownership semantics is defined by how an instance of the type was obtained.
28//===----------------------------------------------------------------------===//
29
30#define DEFINE_C_API_STRUCT(name, storage) \
31 struct name { \
32 storage d; \
33 }; \
34 typedef struct name name
35
36DEFINE_C_API_STRUCT(AieTargetModel, uint64_t);
37
38#undef DEFINE_C_API_STRUCT
39
40MLIR_CAPI_EXPORTED AieTargetModel aieGetTargetModel(uint32_t device);
41
42/// Returns the data bus width for the target model.
43MLIR_CAPI_EXPORTED uint32_t
44aieGetTargetModelAddressGenGranularity(AieTargetModel targetModel);
45
46/// Returns the number of columns in the target model.
47MLIR_CAPI_EXPORTED int aieTargetModelColumns(AieTargetModel targetModel);
48
49/// Returns the number of rows in the target model.
50MLIR_CAPI_EXPORTED int aieTargetModelRows(AieTargetModel targetModel);
51
52/// Returns true if this is an NPU target model.
53MLIR_CAPI_EXPORTED bool aieTargetModelIsNPU(AieTargetModel targetModel);
54
55/// Returns the AIE architecture (as the underlying value of
56/// xilinx::AIE::AIEArch: AIE1=1, AIE2=2, AIE2p=3).
57MLIR_CAPI_EXPORTED uint32_t
58aieTargetModelGetTargetArch(AieTargetModel targetModel);
59
60/// Returns the tile type for the given coordinates.
61MLIR_CAPI_EXPORTED uint32_t
62aieTargetModelGetTileType(AieTargetModel targetModel, int col, int row);
63
64MLIR_CAPI_EXPORTED bool aieTargetModelIsCoreTile(AieTargetModel targetModel,
65 int col, int row);
66
67MLIR_CAPI_EXPORTED bool aieTargetModelIsMemTile(AieTargetModel targetModel,
68 int col, int row);
69
70MLIR_CAPI_EXPORTED bool aieTargetModelIsShimNOCTile(AieTargetModel targetModel,
71 int col, int row);
72
73MLIR_CAPI_EXPORTED bool aieTargetModelIsShimPLTile(AieTargetModel targetModel,
74 int col, int row);
75
76MLIR_CAPI_EXPORTED bool
77aieTargetModelIsShimNOCorPLTile(AieTargetModel targetModel, int col, int row);
78
79MLIR_CAPI_EXPORTED bool aieTargetModelIsInternal(AieTargetModel targetModel,
80 int src_col, int src_row,
81 int dst_col, int dst_row);
82
83MLIR_CAPI_EXPORTED bool aieTargetModelIsWest(AieTargetModel targetModel,
84 int src_col, int src_row,
85 int dst_col, int dst_row);
86
87MLIR_CAPI_EXPORTED bool aieTargetModelIsEast(AieTargetModel targetModel,
88 int src_col, int src_row,
89 int dst_col, int dst_row);
90
91MLIR_CAPI_EXPORTED bool aieTargetModelIsNorth(AieTargetModel targetModel,
92 int src_col, int src_row,
93 int dst_col, int dst_row);
94
95MLIR_CAPI_EXPORTED bool aieTargetModelIsSouth(AieTargetModel targetModel,
96 int src_col, int src_row,
97 int dst_col, int dst_row);
98
99MLIR_CAPI_EXPORTED bool aieTargetModelIsMemWest(AieTargetModel targetModel,
100 int src_col, int src_row,
101 int dst_col, int dst_row);
102
103MLIR_CAPI_EXPORTED bool aieTargetModelIsMemEast(AieTargetModel targetModel,
104 int src_col, int src_row,
105 int dst_col, int dst_row);
106
107MLIR_CAPI_EXPORTED bool aieTargetModelIsMemNorth(AieTargetModel targetModel,
108 int src_col, int src_row,
109 int dst_col, int dst_row);
110
111MLIR_CAPI_EXPORTED bool aieTargetModelIsMemSouth(AieTargetModel targetModel,
112 int src_col, int src_row,
113 int dst_col, int dst_row);
114
115MLIR_CAPI_EXPORTED bool
116aieTargetModelIsLegalMemAffinity(AieTargetModel targetModel, int src_col,
117 int src_row, int dst_col, int dst_row);
118
119MLIR_CAPI_EXPORTED uint32_t
120aieTargetModelGetMemSouthBaseAddress(AieTargetModel targetModel);
121
122MLIR_CAPI_EXPORTED uint32_t
123aieTargetModelGetMemNorthBaseAddress(AieTargetModel targetModel);
124
125MLIR_CAPI_EXPORTED uint32_t
126aieTargetModelGetMemEastBaseAddress(AieTargetModel targetModel);
127
128MLIR_CAPI_EXPORTED uint32_t
129aieTargetModelGetMemWestBaseAddress(AieTargetModel targetModel);
130
131MLIR_CAPI_EXPORTED uint32_t
132aieTargetModelGetLocalMemorySize(AieTargetModel targetModel);
133
134MLIR_CAPI_EXPORTED uint32_t
135aieTargetModelGetDefaultCoreStackSize(AieTargetModel targetModel);
136
137MLIR_CAPI_EXPORTED uint32_t
138aieTargetModelGetNumLocks(AieTargetModel targetModel, int col, int row);
139
140MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumBDs(AieTargetModel targetModel,
141 int col, int row);
142
143/// Largest value a lock register holds.
144MLIR_CAPI_EXPORTED uint32_t
145aieTargetModelGetMaxLockValue(AieTargetModel targetModel);
146
147/// Largest repeat count one DMA task queue push can carry (unsupported = 0).
148MLIR_CAPI_EXPORTED uint32_t
149aieTargetModelGetMaxRepeatCount(AieTargetModel targetModel);
150
151/// How many tasks one DMA channel's task queue holds (unsupported = 0).
152MLIR_CAPI_EXPORTED uint32_t
153aieTargetModelGetDmaTaskQueueDepth(AieTargetModel targetModel);
154
155/// Field widths of a DMA buffer descriptor, which differ by tile type. The step
156/// field counts address granules, not elements -- see
157/// aieGetTargetModelAddressGenGranularity.
158MLIR_CAPI_EXPORTED uint32_t
159aieTargetModelGetDmaBdWrapBits(AieTargetModel targetModel, int col, int row);
160
161MLIR_CAPI_EXPORTED uint32_t
162aieTargetModelGetDmaBdStepBits(AieTargetModel targetModel, int col, int row);
163
164MLIR_CAPI_EXPORTED uint32_t
165aieTargetModelGetDmaBdIterBits(AieTargetModel targetModel, int col, int row);
166
167MLIR_CAPI_EXPORTED uint32_t
168aieTargetModelGetNumMemTileRows(AieTargetModel targetModel);
169
170MLIR_CAPI_EXPORTED uint32_t
171aieTargetModelGetMemTileSize(AieTargetModel targetModel);
172
173MLIR_CAPI_EXPORTED uint32_t
174aieTargetModelGetNumBanks(AieTargetModel targetModel, int col, int row);
175
176/// Whether one DMA buffer descriptor of tile (col, row) on `device` holds the
177/// pattern, as aie-normalize-dma-bd-dims and the DMA lowerings take it.
178/// `sizes` and `strides` are four dimensions, outermost first, and `len` the
179/// descriptor's length, all in elements of `elementType`.
180MLIR_CAPI_EXPORTED bool aieDmaBdFits(uint32_t device, int col, int row,
181 MlirType elementType, int64_t offset,
182 const int64_t *sizes,
183 const int64_t *strides, int64_t len);
184
186 AieTargetModel targetModel, int col, int row);
187
188MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumDestSwitchboxConnections(
189 AieTargetModel targetModel, int col, int row, uint32_t bundle);
190
191MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumSourceSwitchboxConnections(
192 AieTargetModel targetModel, int col, int row, uint32_t bundle);
193
194MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumDestShimMuxConnections(
195 AieTargetModel targetModel, int col, int row, uint32_t bundle);
196
197MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumSourceShimMuxConnections(
198 AieTargetModel targetModel, int col, int row, uint32_t bundle);
199
200MLIR_CAPI_EXPORTED uint32_t
201aieTargetModelGetColumnShift(AieTargetModel targetModel);
202
203MLIR_CAPI_EXPORTED uint32_t
204aieTargetModelGetRowShift(AieTargetModel targetModel);
205
206#ifdef __cplusplus
207}
208#endif
209
210#endif // AIE_C_TARGETMODEL_H
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumSourceShimMuxConnections(AieTargetModel targetModel, int col, int row, uint32_t bundle)
MLIR_CAPI_EXPORTED bool aieTargetModelIsWest(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemWestBaseAddress(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED int aieTargetModelColumns(AieTargetModel targetModel)
Returns the number of columns in the target model.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetLocalMemorySize(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED int aieTargetModelRows(AieTargetModel targetModel)
Returns the number of rows in the target model.
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumBanks(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumDestShimMuxConnections(AieTargetModel targetModel, int col, int row, uint32_t bundle)
MLIR_CAPI_EXPORTED uint32_t aieGetTargetModelAddressGenGranularity(AieTargetModel targetModel)
Returns the data bus width for the target model.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMaxLockValue(AieTargetModel targetModel)
Largest value a lock register holds.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumLocks(AieTargetModel targetModel, int col, int row)
#define DEFINE_C_API_STRUCT(name, storage)
Definition TargetModel.h:30
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDefaultCoreStackSize(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDmaBdWrapBits(AieTargetModel targetModel, int col, int row)
Field widths of a DMA buffer descriptor, which differ by tile type.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMaxRepeatCount(AieTargetModel targetModel)
Largest repeat count one DMA task queue push can carry (unsupported = 0).
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemEast(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsInternal(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED bool aieDmaBdFits(uint32_t device, int col, int row, MlirType elementType, int64_t offset, const int64_t *sizes, const int64_t *strides, int64_t len)
Whether one DMA buffer descriptor of tile (col, row) on device holds the pattern, as aie-normalize-dm...
MLIR_CAPI_EXPORTED bool aieTargetModelIsNPU(AieTargetModel targetModel)
Returns true if this is an NPU target model.
MLIR_CAPI_EXPORTED bool aieTargetModelIsLegalMemAffinity(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumBDs(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsShimNOCorPLTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemNorthBaseAddress(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED bool aieTargetModelIsShimNOCTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetTileType(AieTargetModel targetModel, int col, int row)
Returns the tile type for the given coordinates.
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDmaTaskQueueDepth(AieTargetModel targetModel)
How many tasks one DMA channel's task queue holds (unsupported = 0).
MLIR_CAPI_EXPORTED bool aieTargetModelIsEast(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMaxChannelNumForAdjacentTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsCoreTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemSouth(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDmaBdStepBits(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemWest(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED AieTargetModel aieGetTargetModel(uint32_t device)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetTargetArch(AieTargetModel targetModel)
Returns the AIE architecture (as the underlying value of xilinx::AIE::AIEArch: AIE1=1,...
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemTileSize(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemEastBaseAddress(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumDestSwitchboxConnections(AieTargetModel targetModel, int col, int row, uint32_t bundle)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetMemSouthBaseAddress(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED bool aieTargetModelIsNorth(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsSouth(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumMemTileRows(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetColumnShift(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED bool aieTargetModelIsShimPLTile(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetRowShift(AieTargetModel targetModel)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetNumSourceSwitchboxConnections(AieTargetModel targetModel, int col, int row, uint32_t bundle)
MLIR_CAPI_EXPORTED uint32_t aieTargetModelGetDmaBdIterBits(AieTargetModel targetModel, int col, int row)
MLIR_CAPI_EXPORTED bool aieTargetModelIsMemNorth(AieTargetModel targetModel, int src_col, int src_row, int dst_col, int dst_row)