Data Structures
struct	XAxiEthernet_Config
	This typedef contains configuration information for a Axi Ethernet device. More...

struct	XAxiEthernet
	struct XAxiEthernet is the type for Axi Ethernet driver instance data. More...

Macros
#define	XAE_MDIO_DIV_DFT 29
	Default MDIO clock divisor. More...

#define	XAxiEthernet_IsStarted(InstancePtr) (((InstancePtr)->IsStarted == XIL_COMPONENT_IS_STARTED) ? TRUE : FALSE)
	XAxiEthernet_IsStarted reports if the device is in the started or stopped state. More...

#define	XAxiEthernet_IsDma(InstancePtr) (((InstancePtr)->Config.AxiDevType == XPAR_AXI_DMA) ? TRUE: FALSE)
	XAxiEthernet_IsDma reports if the device is currently connected to DMA. More...

#define	XAxiEthernet_IsFifo(InstancePtr) (((InstancePtr)->Config.AxiDevType == XPAR_AXI_FIFO) ? TRUE: FALSE)
	XAxiEthernet_IsFifo reports if the device is currently connected to a fifo core. More...

#define	XAxiEthernet_IsMcDma(InstancePtr) (((InstancePtr)->Config.AxiDevType == XPAR_AXI_MCDMA) ? TRUE: FALSE)
	XAxiEthernet_IsMcDma reports if the device is currently connected to MCDMA. More...

#define	XAxiEthernet_AxiDevBaseAddress(InstancePtr) ((InstancePtr)->Config.AxiDevBaseAddress)
	XAxiEthernet_AxiDevBaseAddress reports the base address of the core connected to the Axi Ethernet's Axi4 Stream interface. More...

#define	XAxiEthernet_IsRecvFrameDropped(InstancePtr)
	XAxiEthernet_IsRecvFrameDropped determines if the device thinks it has dropped a receive frame. More...

#define	XAxiEthernet_IsRxPartialCsum(InstancePtr) ((((InstancePtr)->Config.RxCsum) == 0x01) ? TRUE : FALSE)
	XAxiEthernet_IsRxPartialCsum determines if the device is configured with partial checksum offloading on the receive channel. More...

#define	XAxiEthernet_IsTxPartialCsum(InstancePtr) ((((InstancePtr)->Config.TxCsum) == 0x01) ? TRUE : FALSE)
	XAxiEthernet_IsTxPartialCsum determines if the device is configured with partial checksum offloading on the transmit channel. More...

#define	XAxiEthernet_IsRxFullCsum(InstancePtr) ((((InstancePtr)->Config.RxCsum) == 0x02) ? TRUE : FALSE)
	XAxiEthernet_IsRxFullCsum determines if the device is configured with full checksum offloading on the receive channel. More...

#define	XAxiEthernet_IsTxFullCsum(InstancePtr) ((((InstancePtr)->Config.TxCsum) == 0x02) ? TRUE : FALSE)
	XAxiEthernet_IsTxFullCsum determines if the device is configured with full checksum offloading on the transmit channel. More...

#define	XAxiEthernet_GetPhysicalInterface(InstancePtr) ((InstancePtr)->Config.PhyType)
	XAxiEthernet_GetPhysicalInterface returns the type of PHY interface being used by the given instance, specified by InstancePtr. More...

#define	XAxiEthernet_GetIntStatus(InstancePtr) XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, XAE_IS_OFFSET)
	XAxiEthernet_GetIntStatus returns a bit mask of the interrupt status register (ISR). More...

#define	XAxiEthernet_IntEnable(InstancePtr, Mask)
	XAxiEthernet_IntEnable enables the interrupts specified in Mask. More...

#define	XAxiEthernet_IntDisable(InstancePtr, Mask)
	XAxiEthernet_IntDisable disables the interrupts specified in Mask. More...

#define	XAxiEthernet_IntPending(InstancePtr) XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, XAE_IP_OFFSET)
	XAxiEthernet_IntPending returns a bit mask of the pending interrupts. More...

#define	XAxiEthernet_IntClear(InstancePtr, Mask)
	XAxiEthernet_IntClear clears pending interrupts specified in Mask. More...

#define	XAxiEthernet_IsExtFuncCap(InstancePtr)
	XAxiEthernet_IsExtFuncCap determines if the device is capable of the new/extend VLAN and multicast features. More...

#define	XAxiEthernet_IsExtMcastEnable(InstancePtr)
	XAxiEthernet_IsExtMcastEnable determines if the extended multicast features is enabled. More...

#define	XAxiEthernet_IsExtMcast(InstancePtr) (((InstancePtr)->Config.ExtMcast) ? TRUE : FALSE)
	XAxiEthernet_IsExtMcast determines if the device is built with new/extended multicast features. More...

#define	XAxiEthernet_IsTxVlanStrp(InstancePtr) (((InstancePtr)->Config.TxVlanStrp) ? TRUE : FALSE)
	XAxiEthernet_IsTxVlanStrp determines if the device is configured with transmit VLAN stripping on the transmit channel. More...

#define	XAxiEthernet_IsRxVlanStrp(InstancePtr) (((InstancePtr)->Config.RxVlanStrp) ? TRUE : FALSE)
	XAxiEthernet_IsRxVlanStrp determines if the device is configured with receive VLAN stripping on the receive channel. More...

#define	XAxiEthernet_IsTxVlanTran(InstancePtr) (((InstancePtr)->Config.TxVlanTran) ? TRUE : FALSE)
	XAxiEthernet_IsTxVlanTran determines if the device is configured with transmit VLAN translation on the transmit channel. More...

#define	XAxiEthernet_IsRxVlanTran(InstancePtr) (((InstancePtr)->Config.RxVlanTran) ? TRUE : FALSE)
	XAxiEthernet_IsRxVlanTran determines if the device is configured with receive VLAN translation on the receive channel. More...

#define	XAxiEthernet_IsTxVlanTag(InstancePtr) (((InstancePtr)->Config.TxVlanTag) ? TRUE : FALSE)
	XAxiEthernet_IsTxVlanTag determines if the device is configured with transmit VLAN tagging on the transmit channel. More...

#define	XAxiEthernet_IsRxVlanTag(InstancePtr) (((InstancePtr)->Config.RxVlanTag) ? TRUE : FALSE)
	XAxiEthernet_IsRxVlanTag determines if the device is configured with receive VLAN tagging on the receive channel. More...

#define	XAxiEthernet_GetTemacType(InstancePtr) ((InstancePtr)->Config.TemacType)
	XAxiEthernet_GetTemacType returns the Axi Ethernet type of the core. More...

#define	XAxiEthernet_IsAvbConfigured(InstancePtr) (((InstancePtr)->Config.Avb) ? TRUE : FALSE)
	XAxiEthernet_IsAvbConfigured returns determines if Ethernet AVB.is configured in the harwdare or not. More...

#define	XAxiEthernet_IsSgmiiOverLvdsEnabled(InstancePtr) (((InstancePtr)->Config.EnableSgmiiOverLvds) ? TRUE : FALSE)
	XAxiEthernet_IsSgmiiOverLvdsEnabled determines if SGMII over LVDS is enabled in the harwdare or not. More...

#define	XAxiEthernet_IsStatsConfigured(InstancePtr) (((InstancePtr)->Config.Stats) ? TRUE : FALSE)
	XAxiEthernet_IsStatsConfigured returns determines if Statistics gathering. More...

#define	XAxiEthernet_ReadReg(BaseAddress, RegOffset) (Xil_In32(((BaseAddress) + (RegOffset))))
	XAxiEthernet_ReadReg returns the value read from the register specified by RegOffset. More...

#define	XAxiEthernet_WriteReg(BaseAddress, RegOffset, Data) Xil_Out32(((BaseAddress) + (RegOffset)), (Data))
	XAxiEthernet_WriteReg, writes Data to the register specified by RegOffset. More...

Typedefs
typedef struct XAxiEthernet_Config	XAxiEthernet_Config
	This typedef contains configuration information for a Axi Ethernet device. More...

typedef struct XAxiEthernet	XAxiEthernet
	struct XAxiEthernet is the type for Axi Ethernet driver instance data. More...

Functions
int	XAxiEthernet_CfgInitialize (XAxiEthernet InstancePtr, XAxiEthernet_Config CfgPtr, UINTPTR EffectiveAddress)
	XAxiEthernet_CfgInitialize initializes an AXI Ethernet device along with the InstancePtr that references it. More...

int	XAxiEthernet_Initialize (XAxiEthernet InstancePtr, XAxiEthernet_Config CfgPtr, UINTPTR EffectiveAddress)
	XAxiEthernet_Initialize initializes an AXI Ethernet device along with the InstancePtr that references it. More...

void	XAxiEthernet_Start (XAxiEthernet *InstancePtr)
	XAxiEthernet_Start starts the Axi Ethernet device as follows: More...

void	XAxiEthernet_Stop (XAxiEthernet *InstancePtr)
	XAxiEthernet_Stop gracefully stops the Axi Ethernet device as follows: More...

void	XAxiEthernet_Reset (XAxiEthernet *InstancePtr)
	XAxiEthernet_Reset does not perform a soft reset of the AxiEthernet core. More...

int	XAxiEthernet_SetMacAddress (XAxiEthernet InstancePtr, void AddressPtr)
	XAxiEthernet_SetMacAddress sets the MAC address for the Axi Ethernet device, specified by InstancePtr to the MAC address specified by AddressPtr. More...

void	XAxiEthernet_GetMacAddress (XAxiEthernet InstancePtr, void AddressPtr)
	XAxiEthernet_GetMacAddress gets the MAC address for the Axi Ethernet, specified by InstancePtr into the memory buffer specified by AddressPtr. More...

int	XAxiEthernet_SetOptions (XAxiEthernet *InstancePtr, u32 Options)
	XAxiEthernet_SetOptions enables the options, Options for the Axi Ethernet, specified by InstancePtr. More...

int	XAxiEthernet_ClearOptions (XAxiEthernet *InstancePtr, u32 Options)
	XAxiEthernet_ClearOptions clears the options, Options for the Axi Ethernet, specified by InstancePtr. More...

u32	XAxiEthernet_GetOptions (XAxiEthernet *InstancePtr)
	XAxiEthernet_GetOptions returns the current option settings. More...

u16	XAxiEthernet_GetOperatingSpeed (XAxiEthernet *InstancePtr)
	XAxiEthernet_GetOperatingSpeed gets the current operating link speed. More...

int	XAxiEthernet_SetOperatingSpeed (XAxiEthernet *InstancePtr, u16 Speed)
	XAxiEthernet_SetOperatingSpeed sets the current operating link speed. More...

void	XAxiEthernet_SetBadFrmRcvOption (XAxiEthernet *InstancePtr)
	XAxiEthernet_SetBadFrmRcvOption is used to enable the bad frame receive option. More...

void	XAxiEthernet_ClearBadFrmRcvOption (XAxiEthernet *InstancePtr)
	XAxiEthernet_ClearBadFrmRcvOption is used to disable the bad frame receive option. More...

void	XAxiEthernet_DisableControlFrameLenCheck (XAxiEthernet *InstancePtr)
	XAxiEthernet_DisableControlFrameLenCheck is used to disable the length check for control frames (pause frames). More...

void	XAxiEthernet_EnableControlFrameLenCheck (XAxiEthernet *InstancePtr)
	XAxiEthernet_EnableControlFrameLenCheck is used to enable the length check for control frames (pause frames). More...

void	XAxiEthernet_PhySetMdioDivisor (XAxiEthernet *InstancePtr, u8 Divisor)
	XAxiEthernet_PhySetMdioDivisor sets the MDIO clock divisor in the Axi Ethernet,specified by InstancePtr to the value, Divisor. More...

XAxiEthernet_Config *	XAxiEthernet_LookupConfig (u16 DeviceId)
	XAxiEthernet_LookupConfig returns a reference to an XAxiEthernet_Config structure based on an unique device id, DeviceId. More...

int	XAxiEthernet_SetMacPauseAddress (XAxiEthernet InstancePtr, void AddressPtr)
	XAxiEthernet_SetMacPauseAddress sets the MAC address used for pause frames to AddressPtr. More...

void	XAxiEthernet_GetMacPauseAddress (XAxiEthernet InstancePtr, void AddressPtr)
	XAxiEthernet_GetMacPauseAddress gets the MAC address used for pause frames for the Axi Ethernet device specified by InstancePtr. More...

int	XAxiEthernet_SendPausePacket (XAxiEthernet *InstancePtr, u16 PauseValue)
	XAxiEthernet_SendPausePacket sends a pause packet with the value of PauseValue. More...

int	XAxiEthernet_GetSgmiiStatus (XAxiEthernet InstancePtr, u16 SpeedPtr)
	XAxiEthernet_GetSgmiiStatus get the state of the link when using the SGMII media interface. More...

int	XAxiEthernet_GetRgmiiStatus (XAxiEthernet InstancePtr, u16 SpeedPtr, int IsFullDuplexPtr, int IsLinkUpPtr)
	XAxiEthernet_GetRgmiiStatus get the state of the link when using the RGMII media interface. More...

int	XAxiEthernet_MulticastAdd (XAxiEthernet InstancePtr, void AddressPtr, int Entry)
	XAxiEthernet_MulticastAdd adds the Ethernet address, AddressPtr to the Axi Ethernet device's multicast filter list, at list index Entry. More...

void	XAxiEthernet_MulticastGet (XAxiEthernet InstancePtr, void AddressPtr, int Entry)
	XAxiEthernet_MulticastGet gets the Ethernet address stored at index Entry in the Axi Ethernet device's multicast filter list. More...

int	XAxiEthernet_MulticastClear (XAxiEthernet *InstancePtr, int Entry)
	XAxiEthernet_MulticastClear clears the Ethernet address stored at index Entry in the Axi Ethernet device's multicast filter list. More...

int	XAxiEthernet_SetTpid (XAxiEthernet *InstancePtr, u16 Tpid, u8 Entry)
	XAxiEthernet_SetTpid sets the VLAN Tag Protocol Identifier(TPID). More...

int	XAxiEthernet_ClearTpid (XAxiEthernet *InstancePtr, u8 Entry)
	XAxiEthernet_ClearTpid clears the VLAN Tag Protocol Identifier(TPID). More...

void	XAxiEthernet_GetTpid (XAxiEthernet InstancePtr, u16 TpidPtr, u8 Entry)
	XAxiEthernet_GetTpid gets the VLAN Tag Protocol Identifier value (TPID). More...

int	XAxiEthernet_SetVTagMode (XAxiEthernet *InstancePtr, u32 Mode, int Dir)
	XAxiEthernet_SetVTagMode configures the VLAN tagging mode. More...

void	XAxiEthernet_GetVTagMode (XAxiEthernet InstancePtr, u8 ModePtr, int Dir)
	XAxiEthernet_GetVTagMode gets VLAN tagging mode. More...

int	XAxiEthernet_SetVStripMode (XAxiEthernet *InstancePtr, u32 Mode, int Dir)
	XAxiEthernet_SetVStripMode configures the VLAN strip mode. More...

void	XAxiEthernet_GetVStripMode (XAxiEthernet InstancePtr, u8 ModePtr, int Dir)
	XAxiEthernet_GetVStripMode gets the VLAN stripping mode. More...

int	XAxiEthernet_SetVTagValue (XAxiEthernet *InstancePtr, u32 VTagValue, int Dir)
	XAxiEthernet_SetVTagValue configures the VLAN tagging value. More...

void	XAxiEthernet_GetVTagValue (XAxiEthernet InstancePtr, u32 VTagValuePtr, int Dir)
	XAxiEthernet_GetVTagValue gets the configured VLAN tagging value. More...

int	XAxiEthernet_SetVidTable (XAxiEthernet *InstancePtr, u32 Entry, u32 Vid, u8 Strip, u8 Tag, int Dir)
	XAxiEthernet_SetVidTable sets VID table includes new VLAN ID, strip and tag enable bits. More...

void	XAxiEthernet_GetVidTable (XAxiEthernet InstancePtr, u32 Entry, u32 VidPtr, u8 StripPtr, u8 TagPtr, int Dir)
	XAxiEthernet_GetVidTable gets VID table content includes new VLAN ID, strip and tag enable bits. More...

int	XAxiEthernet_AddExtMulticastGroup (XAxiEthernet InstancePtr, void AddressPtr)
	XAxiEthernet_AddExtMulticastGroup adds an entry to the multicast Ethernet address table. More...

int	XAxiEthernet_ClearExtMulticastGroup (XAxiEthernet InstancePtr, void AddressPtr)
	XAxiEthernet_ClearExtMulticastGroup clears input multicast Ethernet address group from table. More...

int	XAxiEthernet_GetExtMulticastGroup (XAxiEthernet InstancePtr, void AddressPtr)
	XAxiEthernet_GetExtMulticastGroup returns whether the given Ethernet address group is stored in the table. More...

void	XAxiEthernet_DumpExtMulticastGroup (XAxiEthernet *InstancePtr)
	XAxiEthernet_DumpExtMulticastGroup dumps ALL provisioned acceptable multicast MAC in the Axi Ethernet device's multicast table. More...

Configuration options
The following are device configuration options. See the XAxiEthernet_SetOptions, XAxiEthernet_ClearOptions and XAxiEthernet_GetOptions routines for information on how to use options. The default state of the options are also noted below.
#define	XAE_PROMISC_OPTION 0x00000001
	< XAE_PROMISC_OPTION specifies the Axi Ethernet device to accept all incoming packets. More...

#define	XAE_JUMBO_OPTION 0x00000002
	XAE_VLAN_OPTION specifies the Axi Ethernet device to enable VLAN support for transmit and receive. More...

#define	XAE_VLAN_OPTION 0x00000004
	XAE_FLOW_CONTROL_OPTION specifies the Axi Ethernet device to recognize received flow control frames. More...

#define	XAE_FLOW_CONTROL_OPTION 0x00000008
	XAE_FCS_STRIP_OPTION specifies the Axi Ethernet device to strip FCS and PAD from received frames. More...

#define	XAE_FCS_STRIP_OPTION 0x00000010
	XAE_FCS_INSERT_OPTION specifies the Axi Ethernet device to generate the FCS field and add PAD automatically for outgoing frames. More...

#define	XAE_FCS_INSERT_OPTION 0x00000020
	XAE_LENTYPE_ERR_OPTION specifies the Axi Ethernet device to enable Length/Type error checking (mismatched type/length field) for received frames. More...

#define	XAE_LENTYPE_ERR_OPTION 0x00000040
	XAE_TRANSMITTER_ENABLE_OPTION specifies the Axi Ethernet device transmitter to be enabled. More...

#define	XAE_TRANSMITTER_ENABLE_OPTION 0x00000080
	XAE_RECEIVER_ENABLE_OPTION specifies the Axi Ethernet device receiver to be enabled. More...

#define	XAE_RECEIVER_ENABLE_OPTION 0x00000100
	XAE_BROADCAST_OPTION specifies the Axi Ethernet device to receive frames sent to the broadcast Ethernet address. More...

#define	XAE_BROADCAST_OPTION 0x00000200
	XAE_MULTICAST_OPTION specifies the Axi Ethernet device to receive frames sent to Ethernet addresses that are programmed into the Multicast Address Table (MAT). More...

#define	XAE_MULTICAST_OPTION 0x00000400
	XAE_EXT_MULTICAST_OPTION specifies the Axi Ethernet device to receive frames sent to Ethernet addresses that are programmed into the Multicast Address Table. More...

#define	XAE_EXT_MULTICAST_OPTION 0x00000800
	XAE_EXT_TXVLAN_TRAN_OPTION specifies the Axi Ethernet device to enable transmit VLAN translation. More...

#define	XAE_EXT_TXVLAN_TRAN_OPTION 0x00001000
	XAE_EXT_RXVLAN_TRAN_OPTION specifies the Axi Ethernet device to enable receive VLAN translation. More...

#define	XAE_EXT_RXVLAN_TRAN_OPTION 0x00002000
	XAE_EXT_TXVLAN_TAG_OPTION specifies the Axi Ethernet device to enable transmit VLAN tagging. More...

#define	XAE_EXT_TXVLAN_TAG_OPTION 0x00004000
	XAE_EXT_RXVLAN_TAG_OPTION specifies the Axi Ethernet device to enable receive VLAN tagging. More...

#define	XAE_EXT_RXVLAN_TAG_OPTION 0x00008000
	XAE_EXT_TXVLAN_STRP_OPTION specifies the Axi Ethernet device to enable transmit VLAN stripping. More...

#define	XAE_EXT_TXVLAN_STRP_OPTION 0x00010000
	XAE_EXT_RXVLAN_STRP_OPTION specifies the Axi Ethernet device to enable receive VLAN stripping. More...

#define	XAE_EXT_RXVLAN_STRP_OPTION 0x00020000

#define	XAE_DEFAULT_OPTIONS
	XAE_DEFAULT_OPTIONS specify the options set in XAxiEthernet_Reset() and XAxiEthernet_CfgInitialize() More...

Axi Ethernet registers offset
#define	XAE_RAF_OFFSET 0x00000000
	Reset and Address filter. More...

#define	XAE_TPF_OFFSET 0x00000004
	Tx Pause Frame. More...

#define	XAE_IFGP_OFFSET 0x00000008
	Tx Inter-frame gap adjustment. More...

#define	XAE_IS_OFFSET 0x0000000C
	Interrupt status. More...

#define	XAE_IP_OFFSET 0x00000010
	Interrupt pending. More...

#define	XAE_IE_OFFSET 0x00000014
	Interrupt enable. More...

#define	XAE_TTAG_OFFSET 0x00000018
	Tx VLAN TAG. More...

#define	XAE_RTAG_OFFSET 0x0000001C
	Rx VLAN TAG. More...

#define	XAE_UAWL_OFFSET 0x00000020
	Unicast address word lower. More...

#define	XAE_UAWU_OFFSET 0x00000024
	Unicast address word upper. More...

#define	XAE_TPID0_OFFSET 0x00000028
	VLAN TPID0 register. More...

#define	XAE_TPID1_OFFSET 0x0000002C
	VLAN TPID1 register. More...

#define	XAE_RXBL_OFFSET 0x00000200
	Received Bytes, LSW. More...

#define	XAE_RXBU_OFFSET 0x00000204
	Received Bytes, MSW. More...

#define	XAE_TXBL_OFFSET 0x00000208
	Transmitted Bytes, LSW. More...

#define	XAE_TXBU_OFFSET 0x0000020C
	Transmitted Bytes, MSW. More...

#define	XAE_RXUNDRL_OFFSET 0x00000210
	Count of undersize(less than 64 bytes) frames received, LSW. More...

#define	XAE_RXUNDRU_OFFSET 0x00000214
	Count of undersize(less than 64 bytes) frames received, MSW. More...

#define	XAE_RXFRAGL_OFFSET 0x00000218
	Count of undersized(less than 64 bytes) and bad FCS frames received, LSW. More...

#define	XAE_RXFRAGU_OFFSET 0x0000021C
	Count of undersized(less than 64 bytes) and bad FCS frames received, MSW. More...

#define	XAE_RX64BL_OFFSET 0x00000220
	Count of 64 bytes frames received, LSW. More...

#define	XAE_RX64BU_OFFSET 0x00000224
	Count of 64 bytes frames received, MSW. More...

#define	XAE_RX65B127L_OFFSET 0x00000228
	Count of 65-127 bytes Frames received, LSW. More...

#define	XAE_RX65B127U_OFFSET 0x0000022C
	Count of 65-127 bytes Frames received, MSW. More...

#define	XAE_RX128B255L_OFFSET 0x00000230
	Count of 128-255 bytes Frames received, LSW. More...

#define	XAE_RX128B255U_OFFSET 0x00000234
	Count of 128-255 bytes frames received, MSW. More...

#define	XAE_RX256B511L_OFFSET 0x00000238
	Count of 256-511 bytes Frames received, LSW. More...

#define	XAE_RX256B511U_OFFSET 0x0000023C
	Count of 256-511 bytes frames received, MSW. More...

#define	XAE_RX512B1023L_OFFSET 0x00000240
	Count of 512-1023 bytes frames received, LSW. More...

#define	XAE_RX512B1023U_OFFSET 0x00000244
	Count of 512-1023 bytes frames received, MSW. More...

#define	XAE_RX1024BL_OFFSET 0x00000248
	Count of 1024-MAX bytes frames received, LSW. More...

#define	XAE_RX1024BU_OFFSET 0x0000024C
	Count of 1024-MAX bytes frames received, MSW. More...

#define	XAE_RXOVRL_OFFSET 0x00000250
	Count of oversize frames received, LSW. More...

#define	XAE_RXOVRU_OFFSET 0x00000254
	Count of oversize frames received, MSW. More...

#define	XAE_TX64BL_OFFSET 0x00000258
	Count of 64 bytes frames transmitted, LSW. More...

#define	XAE_TX64BU_OFFSET 0x0000025C
	Count of 64 bytes frames transmitted, MSW. More...

#define	XAE_TX65B127L_OFFSET 0x00000260
	Count of 65-127 bytes frames transmitted, LSW. More...

#define	XAE_TX65B127U_OFFSET 0x00000264
	Count of 65-127 bytes frames transmitted, MSW. More...

#define	XAE_TX128B255L_OFFSET 0x00000268
	Count of 128-255 bytes frames transmitted, LSW. More...

#define	XAE_TX128B255U_OFFSET 0x0000026C
	Count of 128-255 bytes frames transmitted, MSW. More...

#define	XAE_TX256B511L_OFFSET 0x00000270
	Count of 256-511 bytes frames transmitted, LSW. More...

#define	XAE_TX256B511U_OFFSET 0x00000274
	Count of 256-511 bytes frames transmitted, MSW. More...

#define	XAE_TX512B1023L_OFFSET 0x00000278
	Count of 512-1023 bytes frames transmitted, LSW. More...

#define	XAE_TX512B1023U_OFFSET 0x0000027C
	Count of 512-1023 bytes frames transmitted, MSW. More...

#define	XAE_TX1024L_OFFSET 0x00000280
	Count of 1024-MAX bytes frames transmitted, LSW. More...

#define	XAE_TX1024U_OFFSET 0x00000284
	Count of 1024-MAX bytes frames transmitted, MSW. More...

#define	XAE_TXOVRL_OFFSET 0x00000288
	Count of oversize frames transmitted, LSW. More...

#define	XAE_TXOVRU_OFFSET 0x0000028C
	Count of oversize frames transmitted, MSW. More...

#define	XAE_RXFL_OFFSET 0x00000290
	Count of frames received OK, LSW. More...

#define	XAE_RXFU_OFFSET 0x00000294
	Count of frames received OK, MSW. More...

#define	XAE_RXFCSERL_OFFSET 0x00000298
	Count of frames received with FCS error and at least 64 bytes, LSW. More...

#define	XAE_RXFCSERU_OFFSET 0x0000029C
	Count of frames received with FCS error and at least 64 bytes,MSW. More...

#define	XAE_RXBCSTFL_OFFSET 0x000002A0
	Count of broadcast frames received, LSW. More...

#define	XAE_RXBCSTFU_OFFSET 0x000002A4
	Count of broadcast frames received, MSW. More...

#define	XAE_RXMCSTFL_OFFSET 0x000002A8
	Count of multicast frames received, LSW. More...

#define	XAE_RXMCSTFU_OFFSET 0x000002AC
	Count of multicast frames received, MSW. More...

#define	XAE_RXCTRFL_OFFSET 0x000002B0
	Count of control frames received, LSW. More...

#define	XAE_RXCTRFU_OFFSET 0x000002B4
	Count of control frames received, MSW. More...

#define	XAE_RXLTERL_OFFSET 0x000002B8
	Count of frames received with length error, LSW. More...

#define	XAE_RXLTERU_OFFSET 0x000002BC
	Count of frames received with length error, MSW. More...

#define	XAE_RXVLANFL_OFFSET 0x000002C0
	Count of VLAN tagged frames received, LSW. More...

#define	XAE_RXVLANFU_OFFSET 0x000002C4
	Count of VLAN tagged frames received, MSW. More...

#define	XAE_RXPFL_OFFSET 0x000002C8
	Count of pause frames received, LSW. More...

#define	XAE_RXPFU_OFFSET 0x000002CC
	Count of pause frames received, MSW. More...

#define	XAE_RXUOPFL_OFFSET 0x000002D0
	Count of control frames received with unsupported opcode, LSW. More...

#define	XAE_RXUOPFU_OFFSET 0x000002D4
	Count of control frames received with unsupported opcode, MSW. More...

#define	XAE_TXFL_OFFSET 0x000002D8
	Count of frames transmitted OK, LSW. More...

#define	XAE_TXFU_OFFSET 0x000002DC
	Count of frames transmitted OK, MSW. More...

#define	XAE_TXBCSTFL_OFFSET 0x000002E0
	Count of broadcast frames transmitted OK, LSW. More...

#define	XAE_TXBCSTFU_OFFSET 0x000002E4
	Count of broadcast frames transmitted, MSW. More...

#define	XAE_TXMCSTFL_OFFSET 0x000002E8
	Count of multicast frames transmitted, LSW. More...

#define	XAE_TXMCSTFU_OFFSET 0x000002EC
	Count of multicast frames transmitted, MSW. More...

#define	XAE_TXUNDRERL_OFFSET 0x000002F0
	Count of frames transmitted underrun error, LSW. More...

#define	XAE_TXUNDRERU_OFFSET 0x000002F4
	Count of frames transmitted underrun error, MSW. More...

#define	XAE_TXCTRFL_OFFSET 0x000002F8
	Count of control frames transmitted, LSW. More...

#define	XAE_TXCTRFU_OFFSET 0x000002FC
	Count of control frames, transmitted, MSW. More...

#define	XAE_TXVLANFL_OFFSET 0x00000300
	Count of VLAN tagged frames transmitted, LSW. More...

#define	XAE_TXVLANFU_OFFSET 0x00000304
	Count of VLAN tagged frames transmitted, MSW. More...

#define	XAE_TXPFL_OFFSET 0x00000308
	Count of pause frames transmitted, LSW. More...

#define	XAE_TXPFU_OFFSET 0x0000030C
	Count of pause frames transmitted, MSW. More...

#define	XAE_TXSCL_OFFSET 0x00000310
	Single Collision Frames Transmitted OK, LSW. More...

#define	XAE_TXSCU_OFFSET 0x00000314
	Single Collision Frames Transmitted OK, MSW. More...

#define	XAE_TXMCL_OFFSET 0x00000318
	Multiple Collision Frames Transmitted OK, LSW. More...

#define	XAE_TXMCU_OFFSET 0x0000031C
	Multiple Collision Frames Transmitted OK, MSW. More...

#define	XAE_TXDEFL_OFFSET 0x00000320
	Deferred Tx Frames, LSW. More...

#define	XAE_TXDEFU_OFFSET 0x00000324
	Deferred Tx Frames, MSW. More...

#define	XAE_TXLTCL_OFFSET 0x00000328
	Frames transmitted with late Collisions, LSW. More...

#define	XAE_TXLTCU_OFFSET 0x0000032C
	Frames transmitted with late Collisions, MSW. More...

#define	XAE_TXAECL_OFFSET 0x00000330
	Frames aborted with excessive Collisions, LSW. More...

#define	XAE_TXAECU_OFFSET 0x00000334
	Frames aborted with excessive Collisions, MSW. More...

#define	XAE_TXEDEFL_OFFSET 0x00000338
	Transmit Frames with excessive Defferal, LSW. More...

#define	XAE_TXEDEFU_OFFSET 0x0000033C
	Transmit Frames with excessive Defferal, MSW. More...

#define	XAE_RXAERL_OFFSET 0x00000340
	Frames received with alignment errors, LSW. More...

#define	XAE_RXAERU_OFFSET 0x0000034C
	Frames received with alignment errors, MSW. More...

#define	XAE_RCW0_OFFSET 0x00000400
	Rx Configuration Word 0. More...

#define	XAE_RCW1_OFFSET 0x00000404
	Rx Configuration Word 1. More...

#define	XAE_TC_OFFSET 0x00000408
	Tx Configuration. More...

#define	XAE_FCC_OFFSET 0x0000040C
	Flow Control Configuration. More...

#define	XAE_EMMC_OFFSET 0x00000410
	EMAC mode configuration. More...

#define	XAE_RXFC_OFFSET 0x00000414
	Rx Max Frm Config Register. More...

#define	XAE_TXFC_OFFSET 0x00000418
	Tx Max Frm Config Register. More...

#define	XAE_TX_TIMESTAMP_ADJ_OFFSET 0x0000041C
	Transmitter time stamp adjust control Register. More...

#define	XAE_PHYC_OFFSET 0x00000420
	RGMII/SGMII configuration. More...

#define	XAE_IDREG_OFFSET 0x000004F8
	Identification Register. More...

#define	XAE_ARREG_OFFSET 0x000004FC
	Ability Register. More...

#define	XAE_MDIO_MC_OFFSET 0x00000500
	MII Management Config. More...

#define	XAE_MDIO_MCR_OFFSET 0x00000504
	MII Management Control. More...

#define	XAE_MDIO_MWD_OFFSET 0x00000508
	MII Management Write Data. More...

#define	XAE_MDIO_MRD_OFFSET 0x0000050C
	MII Management Read Data. More...

#define	XAE_MDIO_MIS_OFFSET 0x00000600
	MII Management Interrupt Status. More...

#define	XAE_MDIO_MIP_OFFSET 0x00000620
	MII Management Interrupt Pending register offse. More...

#define	XAE_MDIO_MIE_OFFSET 0x00000640
	MII Management Interrupt Enable register offset. More...

#define	XAE_MDIO_MIC_OFFSET 0x00000660
	MII Management Interrupt Clear register offset. More...

#define	XAE_UAW0_OFFSET 0x00000700
	Unicast address word 0. More...

#define	XAE_UAW1_OFFSET 0x00000704
	Unicast address word 1. More...

#define	XAE_FMI_OFFSET 0x00000708
	Filter Mask Index. More...

#define	XAE_AF0_OFFSET 0x00000710
	Address Filter 0. More...

#define	XAE_AF1_OFFSET 0x00000714
	Address Filter 1. More...

#define	XAE_TX_VLAN_DATA_OFFSET 0x00004000
	TX VLAN data table address. More...

#define	XAE_RX_VLAN_DATA_OFFSET 0x00008000
	RX VLAN data table address. More...

#define	XAE_MCAST_TABLE_OFFSET 0x00020000
	Multicast table address. More...

Reset and Address Filter (RAF) Register bit definitions.
These bits are associated with the XAE_RAF_OFFSET register.
#define	XAE_RAF_MCSTREJ_MASK 0x00000002
	Reject receive multicast destination address. More...

#define	XAE_RAF_BCSTREJ_MASK 0x00000004
	Reject receive broadcast destination address. More...

#define	XAE_RAF_TXVTAGMODE_MASK 0x00000018
	Tx VLAN TAG mode. More...

#define	XAE_RAF_RXVTAGMODE_MASK 0x00000060
	Rx VLAN TAG mode. More...

#define	XAE_RAF_TXVSTRPMODE_MASK 0x00000180
	Tx VLAN STRIP mode. More...

#define	XAE_RAF_RXVSTRPMODE_MASK 0x00000600
	Rx VLAN STRIP mode. More...

#define	XAE_RAF_NEWFNCENBL_MASK 0x00000800
	New function mode. More...

#define	XAE_RAF_EMULTIFLTRENBL_MASK 0x00001000
	Extended Multicast Filtering mode. More...

#define	XAE_RAF_STATSRST_MASK 0x00002000
	Statistics Counter Reset. More...

#define	XAE_RAF_RXBADFRMEN_MASK 0x00004000
	Receive Bad Frame Enable. More...

#define	XAE_RAF_TXVTAGMODE_SHIFT 3
	Tx Tag mode shift bits. More...

#define	XAE_RAF_RXVTAGMODE_SHIFT 5
	Rx Tag mode shift bits. More...

#define	XAE_RAF_TXVSTRPMODE_SHIFT 7
	Tx strip mode shift bits. More...

#define	XAE_RAF_RXVSTRPMODE_SHIFT 9
	Rx Strip mode shift bits. More...

Transmit Pause Frame Register (TPF) bit definitions
#define	XAE_TPF_TPFV_MASK 0x0000FFFF
	Tx pause frame value. More...

Transmit Inter-Frame Gap Adjustment Register (TFGP) bit definitions
#define	XAE_TFGP_IFGP_MASK 0x0000007F
	Transmit inter-frame gap adjustment value. More...

Interrupt Status/Enable/Mask Registers bit definitions
The bit definition of these three interrupt registers are the same. These bits are associated with the XAE_IS_OFFSET, XAE_IP_OFFSET, and XAE_IE_OFFSET registers.
#define	XAE_INT_HARDACSCMPLT_MASK 0x00000001
	Hard register access complete. More...

#define	XAE_INT_AUTONEG_MASK 0x00000002
	Auto negotiation complete. More...

#define	XAE_INT_RXCMPIT_MASK 0x00000004
	Rx complete. More...

#define	XAE_INT_RXRJECT_MASK 0x00000008
	Rx frame rejected. More...

#define	XAE_INT_RXFIFOOVR_MASK 0x00000010
	Rx fifo overrun. More...

#define	XAE_INT_TXCMPIT_MASK 0x00000020
	Tx complete. More...

#define	XAE_INT_RXDCMLOCK_MASK 0x00000040
	Rx Dcm Lock. More...

#define	XAE_INT_MGTRDY_MASK 0x00000080
	MGT clock Lock. More...

#define	XAE_INT_PHYRSTCMPLT_MASK 0x00000100
	Phy Reset complete. More...

#define	XAE_INT_ALL_MASK 0x0000003F
	All the ints. More...

#define	XAE_INT_RECV_ERROR_MASK (XAE_INT_RXRJECT_MASK \| XAE_INT_RXFIFOOVR_MASK)
	INT bits that indicate receive errors. More...

TPID Register (TPID) bit definitions
#define	XAE_TPID_0_MASK 0x0000FFFF
	TPID 0. More...

#define	XAE_TPID_1_MASK 0xFFFF0000
	TPID 1. More...

Receive Configuration Word 1 (RCW1) Register bit definitions
#define	XAE_RCW1_RST_MASK 0x80000000
	Reset. More...

#define	XAE_RCW1_JUM_MASK 0x40000000
	Jumbo frame enable. More...

#define	XAE_RCW1_FCS_MASK 0x20000000
	In-Band FCS enable (FCS not stripped) More...

#define	XAE_RCW1_RX_MASK 0x10000000
	Receiver enable. More...

#define	XAE_RCW1_VLAN_MASK 0x08000000
	VLAN frame enable. More...

#define	XAE_RCW1_LT_DIS_MASK 0x02000000
	Length/type field valid check disable. More...

#define	XAE_RCW1_CL_DIS_MASK 0x01000000
	Control frame Length check disable. More...

#define	XAE_RCW1_1588_TIMESTAMP_EN_MASK 0x00400000
	Inband 1588 time stamp enable. More...

#define	XAE_RCW1_PAUSEADDR_MASK 0x0000FFFF
	Pause frame source address bits [47:32].Bits [31:0] are stored in register RCW0. More...

Transmitter Configuration (TC) Register bit definitions
#define	XAE_TC_RST_MASK 0x80000000
	Reset. More...

#define	XAE_TC_JUM_MASK 0x40000000
	Jumbo frame enable. More...

#define	XAE_TC_FCS_MASK 0x20000000
	In-Band FCS enable (FCS not generated) More...

#define	XAE_TC_TX_MASK 0x10000000
	Transmitter enable. More...

#define	XAE_TC_VLAN_MASK 0x08000000
	VLAN frame enable. More...

#define	XAE_TC_IFG_MASK 0x02000000
	Inter-frame gap adjustment enable. More...

#define	XAE_TC_1588_CMD_EN_MASK 0x00400000
	1588 Cmd field enable More...

Flow Control Configuration (FCC) Register Bit definitions
#define	XAE_FCC_FCRX_MASK 0x20000000
	Rx flow control enable. More...

#define	XAE_FCC_FCTX_MASK 0x40000000
	Tx flow control enable. More...

Ethernet MAC Mode Configuration (EMMC) Register bit definitions
#define	XAE_EMMC_LINKSPEED_MASK 0xC0000000
	Link speed. More...

#define	XAE_EMMC_RGMII_MASK 0x20000000
	RGMII mode enable. More...

#define	XAE_EMMC_SGMII_MASK 0x10000000
	SGMII mode enable. More...

#define	XAE_EMMC_GPCS_MASK 0x08000000
	1000BaseX mode enable More...

#define	XAE_EMMC_HOST_MASK 0x04000000
	Host interface enable. More...

#define	XAE_EMMC_TX16BIT 0x02000000
	16 bit Tx client enable More...

#define	XAE_EMMC_RX16BIT 0x01000000
	16 bit Rx client enable More...

#define	XAE_EMMC_LINKSPD_10 0x00000000
	Link Speed mask for 10 Mbit. More...

#define	XAE_EMMC_LINKSPD_100 0x40000000
	Link Speed mask for 100 Mbit. More...

#define	XAE_EMMC_LINKSPD_1000 0x80000000
	Link Speed mask for 1000 Mbit. More...

RGMII/SGMII Configuration (PHYC) Register bit definitions
#define	XAE_PHYC_SGMIILINKSPEED_MASK 0xC0000000
	SGMII link speed mask. More...

#define	XAE_PHYC_RGMIILINKSPEED_MASK 0x0000000C
	RGMII link speed. More...

#define	XAE_PHYC_RGMIIHD_MASK 0x00000002
	RGMII Half-duplex. More...

#define	XAE_PHYC_RGMIILINK_MASK 0x00000001
	RGMII link status. More...

#define	XAE_PHYC_RGLINKSPD_10 0x00000000
	RGMII link 10 Mbit. More...

#define	XAE_PHYC_RGLINKSPD_100 0x00000004
	RGMII link 100 Mbit. More...

#define	XAE_PHYC_RGLINKSPD_1000 0x00000008
	RGMII link 1000 Mbit. More...

#define	XAE_PHYC_SGLINKSPD_10 0x00000000
	SGMII link 10 Mbit. More...

#define	XAE_PHYC_SGLINKSPD_100 0x40000000
	SGMII link 100 Mbit. More...

#define	XAE_PHYC_SGLINKSPD_1000 0x80000000
	SGMII link 1000 Mbit. More...

MDIO Management Configuration (MC) Register bit definitions
#define	XAE_MDIO_MC_MDIOEN_MASK 0x00000040
	MII management enable. More...

#define	XAE_MDIO_MC_CLOCK_DIVIDE_MAX 0x3F
	Maximum MDIO divisor. More...

MDIO Management Control Register (MCR) Register bit definitions
#define	XAE_MDIO_MCR_PHYAD_MASK 0x1F000000
	Phy Address Mask. More...

#define	XAE_MDIO_MCR_PHYAD_SHIFT 24
	Phy Address Shift. More...

#define	XAE_MDIO_MCR_REGAD_MASK 0x001F0000
	Reg Address Mask. More...

#define	XAE_MDIO_MCR_REGAD_SHIFT 16
	Reg Address Shift. More...

#define	XAE_MDIO_MCR_OP_MASK 0x0000C000
	Operation Code Mask. More...

#define	XAE_MDIO_MCR_OP_SHIFT 13
	Operation Code Shift. More...

#define	XAE_MDIO_MCR_OP_READ_MASK 0x00008000
	Op Code Read Mask. More...

#define	XAE_MDIO_MCR_OP_WRITE_MASK 0x00004000
	Op Code Write Mask. More...

#define	XAE_MDIO_MCR_INITIATE_MASK 0x00000800
	Ready Mask. More...

#define	XAE_MDIO_MCR_READY_MASK 0x00000080
	Ready Mask. More...

MDIO Interrupt Enable/Mask/Status Registers bit definitions
The bit definition of these three interrupt registers are the same. These bits are associated with the XAE_IS_OFFSET, XAE_IP_OFFSET, and XAE_IE_OFFSET registers.
#define	XAE_MDIO_INT_MIIM_RDY_MASK 0x00000001
	MIIM Interrupt. More...

Axi Ethernet Unicast Address Register Word 1 (UAW1) Register Bit
definitions
#define	XAE_UAW1_UNICASTADDR_MASK 0x0000FFFF
	Station address bits [47:32] Station address bits [31:0] are stored in register UAW0. More...

Filter Mask Index (FMI) Register bit definitions
#define	XAE_FMI_PM_MASK 0x80000000
	Promiscuous mode enable. More...

#define	XAE_FMI_IND_MASK 0x00000003
	Index Mask. More...

Extended multicast buffer descriptor bit mask
#define	XAE_BD_RX_USR2_BCAST_MASK 0x00000004

#define	XAE_BD_RX_USR2_IP_MCAST_MASK 0x00000002

#define	XAE_BD_RX_USR2_MCAST_MASK 0x00000001

Axi Ethernet Multicast Address Register Word 1 (MAW1)
#define	XAE_MAW1_RNW_MASK 0x00800000
	Multicast address table register read enable. More...

#define	XAE_MAW1_ADDR_MASK 0x00030000
	Multicast address table register address. More...

#define	XAE_MAW1_MULTICADDR_MASK 0x0000FFFF
	Multicast address bits [47:32] Multicast address bits [31:0] are stored in register MAW0. More...

#define	XAE_MAW1_MATADDR_SHIFT_MASK 16
	Number of bits to shift right to align with XAE_MAW1_CAMADDR_MASK. More...

Other Constant definitions used in the driver
#define	XAE_SPEED_10_MBPS 10
	Speed of 10 Mbps. More...

#define	XAE_SPEED_100_MBPS 100
	Speed of 100 Mbps. More...

#define	XAE_SPEED_1000_MBPS 1000
	Speed of 1000 Mbps. More...

#define	XAE_SPEED_2500_MBPS 2500
	Speed of 2500 Mbps. More...

#define	XAE_SOFT_TEMAC_LOW_SPEED 0
	For soft cores with 10/100 Mbps speed. More...

#define	XAE_SOFT_TEMAC_HIGH_SPEED 1
	For soft cores with 10/100/1000 Mbps speed. More...

#define	XAE_HARD_TEMAC_TYPE 2
	For hard TEMAC cores used virtex-6. More...

#define	XAE_PHY_ADDR_LIMIT 31
	Max limit while accessing and searching for available PHYs. More...

#define	XAE_PHY_REG_NUM_LIMIT 31
	Max register limit in PHY as mandated by the spec. More...

#define	XAE_RST_DEFAULT_TIMEOUT_VAL 1000000
	Timeout in us used while checking if the core had come out of reset or for the driver API to wait for before returning a failure case. More...

#define	XAE_VLAN_TABL_STRP_FLD_LEN 1
	Strip field length in vlan table used for extended vlan features. More...

#define	XAE_VLAN_TABL_TAG_FLD_LEN 1
	Tag field length in vlan table used for extended vlan features. More...

#define	XAE_MAX_VLAN_TABL_ENTRY 0xFFF
	Max possible number of entries in vlan table used for extended vlan features. More...

#define	XAE_VLAN_TABL_VID_START_OFFSET 2
	VID field start offset in each entry in the VLAN table. More...

#define	XAE_VLAN_TABL_STRP_STRT_OFFSET 1
	Strip field start offset in each entry in the VLAN table. More...

#define	XAE_VLAN_TABL_STRP_ENTRY_MASK 0x01
	Mask used to extract the the strip field from an entry in VLAN table. More...

#define	XAE_VLAN_TABL_TAG_ENTRY_MASK 0x01
	Mask used to extract the the tag field from an entry in VLAN table. More...

Macro Definition Documentation

#define XAE_AF0_OFFSET 0x00000710

Address Filter 0.

Referenced by XAxiEthernet_MulticastAdd(), XAxiEthernet_MulticastClear(), and XAxiEthernet_MulticastGet().

#define XAE_AF1_OFFSET 0x00000714

Address Filter 1.

Referenced by XAxiEthernet_MulticastAdd(), XAxiEthernet_MulticastClear(), and XAxiEthernet_MulticastGet().

#define XAE_ARREG_OFFSET 0x000004FC

Ability Register.

#define XAE_BROADCAST_OPTION 0x00000200

XAE_MULTICAST_OPTION specifies the Axi Ethernet device to receive frames sent to Ethernet addresses that are programmed into the Multicast Address Table (MAT).

This driver sets this option to disabled (cleared) by default.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_DEFAULT_OPTIONS

Value:

(XAE_FLOW_CONTROL_OPTION |              \
		 XAE_BROADCAST_OPTION |                       \
		 XAE_FCS_INSERT_OPTION |              \
		 XAE_FCS_STRIP_OPTION |                       \
		 XAE_LENTYPE_ERR_OPTION |             \
		 XAE_TRANSMITTER_ENABLE_OPTION |      \
		 XAE_RECEIVER_ENABLE_OPTION)

XAE_DEFAULT_OPTIONS specify the options set in XAxiEthernet_Reset() and XAxiEthernet_CfgInitialize()

Referenced by AxiEthernetSgDmaIntrExtMulticastExample(), XAxiEthernet_Reset(), and XAxiEthernet_SetOptions().

#define XAE_EMMC_GPCS_MASK 0x08000000

1000BaseX mode enable

#define XAE_EMMC_HOST_MASK 0x04000000

Host interface enable.

#define XAE_EMMC_LINKSPD_10 0x00000000

Link Speed mask for 10 Mbit.

Referenced by XAxiEthernet_GetOperatingSpeed().

#define XAE_EMMC_LINKSPD_100 0x40000000

Link Speed mask for 100 Mbit.

Referenced by XAxiEthernet_GetOperatingSpeed(), and XAxiEthernet_SetOperatingSpeed().

#define XAE_EMMC_LINKSPD_1000 0x80000000

Link Speed mask for 1000 Mbit.

Referenced by XAxiEthernet_GetOperatingSpeed(), and XAxiEthernet_SetOperatingSpeed().

#define XAE_EMMC_LINKSPEED_MASK 0xC0000000

Link speed.

Referenced by XAxiEthernet_GetOperatingSpeed(), and XAxiEthernet_SetOperatingSpeed().

#define XAE_EMMC_OFFSET 0x00000410

EMAC mode configuration.

Referenced by XAxiEthernet_GetOperatingSpeed(), and XAxiEthernet_SetOperatingSpeed().

#define XAE_EMMC_RGMII_MASK 0x20000000

RGMII mode enable.

#define XAE_EMMC_RX16BIT 0x01000000

16 bit Rx client enable

#define XAE_EMMC_SGMII_MASK 0x10000000

SGMII mode enable.

#define XAE_EMMC_TX16BIT 0x02000000

16 bit Tx client enable

#define XAE_EXT_MULTICAST_OPTION 0x00000800

XAE_EXT_TXVLAN_TRAN_OPTION specifies the Axi Ethernet device to enable transmit VLAN translation.

This driver sets this option to be dependent on HW configuration by default.

Referenced by AxiEthernetSgDmaIntrExtMulticastExample().

#define XAE_EXT_RXVLAN_TAG_OPTION 0x00008000

XAE_EXT_TXVLAN_STRP_OPTION specifies the Axi Ethernet device to enable transmit VLAN stripping.

This driver sets this option to be dependent during HW build time by default.

#define XAE_EXT_RXVLAN_TRAN_OPTION 0x00002000

XAE_EXT_TXVLAN_TAG_OPTION specifies the Axi Ethernet device to enable transmit VLAN tagging.

This driver sets this option to be dependent during HW build time by default.

Referenced by AxiEthernetSgDmaIntrExtVlanExample().

#define XAE_EXT_TXVLAN_STRP_OPTION 0x00010000

XAE_EXT_RXVLAN_STRP_OPTION specifies the Axi Ethernet device to enable receive VLAN stripping.

This driver sets this option to be dependent during HW build time by default.

#define XAE_EXT_TXVLAN_TAG_OPTION 0x00004000

XAE_EXT_RXVLAN_TAG_OPTION specifies the Axi Ethernet device to enable receive VLAN tagging.

This driver sets this option to be dependent during HW build time by default.

Referenced by AxiEthernetSgDmaIntrExtVlanExample().

#define XAE_EXT_TXVLAN_TRAN_OPTION 0x00001000

XAE_EXT_RXVLAN_TRAN_OPTION specifies the Axi Ethernet device to enable receive VLAN translation.

This driver sets this option to be dependent on HW configuration by default.

Referenced by AxiEthernetSgDmaIntrExtVlanExample().

#define XAE_FCC_FCRX_MASK 0x20000000

Rx flow control enable.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_FCC_FCTX_MASK 0x40000000

Tx flow control enable.

#define XAE_FCC_OFFSET 0x0000040C

Flow Control Configuration.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_FCS_INSERT_OPTION 0x00000020

XAE_LENTYPE_ERR_OPTION specifies the Axi Ethernet device to enable Length/Type error checking (mismatched type/length field) for received frames.

This driver sets this option to enabled (set) by default.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_FCS_STRIP_OPTION 0x00000010

XAE_FCS_INSERT_OPTION specifies the Axi Ethernet device to generate the FCS field and add PAD automatically for outgoing frames.

This driver sets this option to enabled (set) by default.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_FLOW_CONTROL_OPTION 0x00000008

XAE_FCS_STRIP_OPTION specifies the Axi Ethernet device to strip FCS and PAD from received frames.

Note that PAD from VLAN frames is not stripped. This driver sets this option to enabled (set) by default.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_FMI_IND_MASK 0x00000003

Index Mask.

#define XAE_FMI_OFFSET 0x00000708

Filter Mask Index.

Referenced by XAxiEthernet_ClearOptions(), XAxiEthernet_MulticastAdd(), XAxiEthernet_MulticastClear(), XAxiEthernet_MulticastGet(), and XAxiEthernet_SetOptions().

#define XAE_FMI_PM_MASK 0x80000000

Promiscuous mode enable.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_HARD_TEMAC_TYPE 2

For hard TEMAC cores used virtex-6.

#define XAE_IDREG_OFFSET 0x000004F8

Identification Register.

#define XAE_IE_OFFSET 0x00000014

Interrupt enable.

Referenced by XAxiEthernet_Stop().

#define XAE_IFGP_OFFSET 0x00000008

Tx Inter-frame gap adjustment.

#define XAE_INT_ALL_MASK 0x0000003F

All the ints.

#define XAE_INT_AUTONEG_MASK 0x00000002

Auto negotiation complete.

#define XAE_INT_HARDACSCMPLT_MASK 0x00000001

Hard register access complete.

#define XAE_INT_MGTRDY_MASK 0x00000080

MGT clock Lock.

Referenced by XAxiEthernet_Reset().

#define XAE_INT_PHYRSTCMPLT_MASK 0x00000100

Phy Reset complete.

#define XAE_INT_RECV_ERROR_MASK (XAE_INT_RXRJECT_MASK | XAE_INT_RXFIFOOVR_MASK)

INT bits that indicate receive errors.

Referenced by AxiEthernetSgDmaFullChecksumOffloadExample(), AxiEthernetSgDmaIntrExtMulticastExample(), AxiEthernetSgDmaIntrExtVlanExample(), AxiEthernetSgDmaIntrSingleFrameExample(), and AxiEthernetSgDmaPartialChecksumOffloadExample().

#define XAE_INT_RXCMPIT_MASK 0x00000004

Rx complete.

#define XAE_INT_RXDCMLOCK_MASK 0x00000040

Rx Dcm Lock.

#define XAE_INT_RXFIFOOVR_MASK 0x00000010

Rx fifo overrun.

Referenced by AxiEthernetPollForRxStatus(), AxiEthernetSgDmaIntrExample(), and AxiEthernetSingleFrameIntrExample().

#define XAE_INT_RXRJECT_MASK 0x00000008

Rx frame rejected.

Referenced by AxiEthernetPollForRxStatus(), AxiEthernetSgDmaIntrExample(), AxiEthernetSingleFrameIntrExample(), and XAxiEthernet_Stop().

#define XAE_INT_TXCMPIT_MASK 0x00000020

Tx complete.

#define XAE_IP_OFFSET 0x00000010

Interrupt pending.

Referenced by XAxiEthernet_Stop().

#define XAE_IS_OFFSET 0x0000000C

Interrupt status.

Referenced by XAxiEthernet_Reset(), and XAxiEthernet_Stop().

#define XAE_JUMBO_OPTION 0x00000002

XAE_VLAN_OPTION specifies the Axi Ethernet device to enable VLAN support for transmit and receive.

This driver sets this option to disabled (cleared) by default.

Referenced by AxiEthernetSgDmaIntrExtVlanExample(), XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_LENTYPE_ERR_OPTION 0x00000040

XAE_TRANSMITTER_ENABLE_OPTION specifies the Axi Ethernet device transmitter to be enabled.

This driver sets this option to enabled (set) by default.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_MAW1_ADDR_MASK 0x00030000

Multicast address table register address.

#define XAE_MAW1_MATADDR_SHIFT_MASK 16

Number of bits to shift right to align with XAE_MAW1_CAMADDR_MASK.

#define XAE_MAW1_MULTICADDR_MASK 0x0000FFFF

Multicast address bits [47:32] Multicast address bits [31:0] are stored in register MAW0.

#define XAE_MAW1_RNW_MASK 0x00800000

Multicast address table register read enable.

#define XAE_MAX_VLAN_TABL_ENTRY 0xFFF

Max possible number of entries in vlan table used for extended vlan features.

Referenced by XAxiEthernet_GetVidTable(), and XAxiEthernet_SetVidTable().

#define XAE_MCAST_TABLE_OFFSET 0x00020000

Multicast table address.

Referenced by XAxiEthernet_AddExtMulticastGroup(), XAxiEthernet_ClearExtMulticastGroup(), XAxiEthernet_DumpExtMulticastGroup(), and XAxiEthernet_GetExtMulticastGroup().

#define XAE_MDIO_DIV_DFT 29

Default MDIO clock divisor.

#define XAE_MDIO_INT_MIIM_RDY_MASK 0x00000001

MIIM Interrupt.

#define XAE_MDIO_MC_CLOCK_DIVIDE_MAX 0x3F

Maximum MDIO divisor.

Referenced by XAxiEthernet_PhySetMdioDivisor().

#define XAE_MDIO_MC_MDIOEN_MASK 0x00000040

MII management enable.

Referenced by XAxiEthernet_PhySetMdioDivisor().

#define XAE_MDIO_MC_OFFSET 0x00000500

MII Management Config.

Referenced by XAxiEthernet_PhySetMdioDivisor().

#define XAE_MDIO_MCR_INITIATE_MASK 0x00000800

Ready Mask.

#define XAE_MDIO_MCR_OFFSET 0x00000504

MII Management Control.

#define XAE_MDIO_MCR_OP_MASK 0x0000C000

Operation Code Mask.

#define XAE_MDIO_MCR_OP_READ_MASK 0x00008000

Op Code Read Mask.

#define XAE_MDIO_MCR_OP_SHIFT 13

Operation Code Shift.

#define XAE_MDIO_MCR_OP_WRITE_MASK 0x00004000

Op Code Write Mask.

#define XAE_MDIO_MCR_PHYAD_MASK 0x1F000000

Phy Address Mask.

#define XAE_MDIO_MCR_PHYAD_SHIFT 24

Phy Address Shift.

#define XAE_MDIO_MCR_READY_MASK 0x00000080

Ready Mask.

#define XAE_MDIO_MCR_REGAD_MASK 0x001F0000

Reg Address Mask.

#define XAE_MDIO_MCR_REGAD_SHIFT 16

Reg Address Shift.

#define XAE_MDIO_MIC_OFFSET 0x00000660

MII Management Interrupt Clear register offset.

#define XAE_MDIO_MIE_OFFSET 0x00000640

MII Management Interrupt Enable register offset.

#define XAE_MDIO_MIP_OFFSET 0x00000620

MII Management Interrupt Pending register offse.

#define XAE_MDIO_MIS_OFFSET 0x00000600

MII Management Interrupt Status.

#define XAE_MDIO_MRD_OFFSET 0x0000050C

MII Management Read Data.

#define XAE_MDIO_MWD_OFFSET 0x00000508

MII Management Write Data.

#define XAE_MULTICAST_OPTION 0x00000400

XAE_EXT_MULTICAST_OPTION specifies the Axi Ethernet device to receive frames sent to Ethernet addresses that are programmed into the Multicast Address Table.

This driver sets this option to be dependent on HW configuration by default.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_PHY_ADDR_LIMIT 31

Max limit while accessing and searching for available PHYs.

#define XAE_PHY_REG_NUM_LIMIT 31

Max register limit in PHY as mandated by the spec.

#define XAE_PHYC_OFFSET 0x00000420

RGMII/SGMII configuration.

Referenced by XAxiEthernet_GetRgmiiStatus(), and XAxiEthernet_GetSgmiiStatus().

#define XAE_PHYC_RGLINKSPD_10 0x00000000

RGMII link 10 Mbit.

Referenced by XAxiEthernet_GetRgmiiStatus().

#define XAE_PHYC_RGLINKSPD_100 0x00000004

RGMII link 100 Mbit.

Referenced by XAxiEthernet_GetRgmiiStatus().

#define XAE_PHYC_RGLINKSPD_1000 0x00000008

RGMII link 1000 Mbit.

Referenced by XAxiEthernet_GetRgmiiStatus().

#define XAE_PHYC_RGMIIHD_MASK 0x00000002

RGMII Half-duplex.

Referenced by XAxiEthernet_GetRgmiiStatus().

#define XAE_PHYC_RGMIILINK_MASK 0x00000001

RGMII link status.

Referenced by XAxiEthernet_GetRgmiiStatus().

#define XAE_PHYC_RGMIILINKSPEED_MASK 0x0000000C

RGMII link speed.

Referenced by XAxiEthernet_GetRgmiiStatus().

#define XAE_PHYC_SGLINKSPD_10 0x00000000

SGMII link 10 Mbit.

Referenced by XAxiEthernet_GetSgmiiStatus().

#define XAE_PHYC_SGLINKSPD_100 0x40000000

SGMII link 100 Mbit.

Referenced by XAxiEthernet_GetSgmiiStatus().

#define XAE_PHYC_SGLINKSPD_1000 0x80000000

SGMII link 1000 Mbit.

Referenced by XAxiEthernet_GetSgmiiStatus().

#define XAE_PHYC_SGMIILINKSPEED_MASK 0xC0000000

SGMII link speed mask.

Referenced by XAxiEthernet_GetSgmiiStatus().

#define XAE_PROMISC_OPTION 0x00000001

< XAE_PROMISC_OPTION specifies the Axi Ethernet device to accept all incoming packets.

This driver sets this option to disabled (cleared) by default.XAE_JUMBO_OPTION specifies the Axi Ethernet device to accept jumbo frames for transmit and receive. This driver sets this option to disabled (cleared) by default.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_RAF_BCSTREJ_MASK 0x00000004

Reject receive broadcast destination address.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_RAF_EMULTIFLTRENBL_MASK 0x00001000

Extended Multicast Filtering mode.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_RAF_MCSTREJ_MASK 0x00000002

Reject receive multicast destination address.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_RAF_NEWFNCENBL_MASK 0x00000800

New function mode.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_RAF_OFFSET 0x00000000

Reset and Address filter.

Referenced by XAxiEthernet_ClearBadFrmRcvOption(), XAxiEthernet_ClearOptions(), XAxiEthernet_GetVStripMode(), XAxiEthernet_GetVTagMode(), XAxiEthernet_SetBadFrmRcvOption(), XAxiEthernet_SetOptions(), XAxiEthernet_SetVStripMode(), and XAxiEthernet_SetVTagMode().

#define XAE_RAF_RXBADFRMEN_MASK 0x00004000

Receive Bad Frame Enable.

Referenced by XAxiEthernet_ClearBadFrmRcvOption(), and XAxiEthernet_SetBadFrmRcvOption().

#define XAE_RAF_RXVSTRPMODE_MASK 0x00000600

Rx VLAN STRIP mode.

Referenced by XAxiEthernet_ClearOptions(), XAxiEthernet_GetVStripMode(), XAxiEthernet_SetOptions(), and XAxiEthernet_SetVStripMode().

#define XAE_RAF_RXVSTRPMODE_SHIFT 9

Rx Strip mode shift bits.

Referenced by XAxiEthernet_GetVStripMode(), XAxiEthernet_SetOptions(), and XAxiEthernet_SetVStripMode().

#define XAE_RAF_RXVTAGMODE_MASK 0x00000060

Rx VLAN TAG mode.

Referenced by XAxiEthernet_ClearOptions(), XAxiEthernet_GetVTagMode(), XAxiEthernet_SetOptions(), and XAxiEthernet_SetVTagMode().

#define XAE_RAF_RXVTAGMODE_SHIFT 5

Rx Tag mode shift bits.

Referenced by XAxiEthernet_GetVTagMode(), XAxiEthernet_SetOptions(), and XAxiEthernet_SetVTagMode().

#define XAE_RAF_STATSRST_MASK 0x00002000

Statistics Counter Reset.

#define XAE_RAF_TXVSTRPMODE_MASK 0x00000180

Tx VLAN STRIP mode.

Referenced by XAxiEthernet_ClearOptions(), XAxiEthernet_GetVStripMode(), XAxiEthernet_SetOptions(), and XAxiEthernet_SetVStripMode().

#define XAE_RAF_TXVSTRPMODE_SHIFT 7

Tx strip mode shift bits.

Referenced by XAxiEthernet_GetVStripMode(), XAxiEthernet_SetOptions(), and XAxiEthernet_SetVStripMode().

#define XAE_RAF_TXVTAGMODE_MASK 0x00000018

Tx VLAN TAG mode.

Referenced by XAxiEthernet_ClearOptions(), XAxiEthernet_GetVTagMode(), XAxiEthernet_SetOptions(), and XAxiEthernet_SetVTagMode().

#define XAE_RAF_TXVTAGMODE_SHIFT 3

Tx Tag mode shift bits.

Referenced by XAxiEthernet_GetVTagMode(), XAxiEthernet_SetOptions(), and XAxiEthernet_SetVTagMode().

#define XAE_RCW0_OFFSET 0x00000400

Rx Configuration Word 0.

Referenced by XAxiEthernet_GetMacPauseAddress(), and XAxiEthernet_SetMacPauseAddress().

#define XAE_RCW1_1588_TIMESTAMP_EN_MASK 0x00400000

Inband 1588 time stamp enable.

#define XAE_RCW1_CL_DIS_MASK 0x01000000

Control frame Length check disable.

Referenced by XAxiEthernet_DisableControlFrameLenCheck(), and XAxiEthernet_EnableControlFrameLenCheck().

#define XAE_RCW1_FCS_MASK 0x20000000

In-Band FCS enable (FCS not stripped)

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_RCW1_JUM_MASK 0x40000000

Jumbo frame enable.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_RCW1_LT_DIS_MASK 0x02000000

Length/type field valid check disable.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_RCW1_OFFSET 0x00000404

Rx Configuration Word 1.

Referenced by XAxiEthernet_ClearOptions(), XAxiEthernet_DisableControlFrameLenCheck(), XAxiEthernet_EnableControlFrameLenCheck(), XAxiEthernet_GetMacPauseAddress(), XAxiEthernet_SetMacPauseAddress(), XAxiEthernet_SetOptions(), XAxiEthernet_Start(), and XAxiEthernet_Stop().

#define XAE_RCW1_PAUSEADDR_MASK 0x0000FFFF

Pause frame source address bits [47:32].Bits [31:0] are stored in register RCW0.

Referenced by XAxiEthernet_SetMacPauseAddress().

#define XAE_RCW1_RST_MASK 0x80000000

Reset.

#define XAE_RCW1_RX_MASK 0x10000000

Receiver enable.

Referenced by XAxiEthernet_ClearOptions(), XAxiEthernet_SetOptions(), XAxiEthernet_Start(), and XAxiEthernet_Stop().

#define XAE_RCW1_VLAN_MASK 0x08000000

VLAN frame enable.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_RECEIVER_ENABLE_OPTION 0x00000100

XAE_BROADCAST_OPTION specifies the Axi Ethernet device to receive frames sent to the broadcast Ethernet address.

This driver sets this option to enabled (set) by default.

Referenced by AxiEthernetPingReqExample(), AxiEthernetSgDmaFullChecksumOffloadExample(), AxiEthernetSgDmaIntrCoalescingExample(), AxiEthernetSgDmaIntrExtMulticastExample(), AxiEthernetSgDmaIntrExtVlanExample(), AxiEthernetSgDmaIntrMultiFrameExample(), AxiEthernetSgDmaIntrSingleFrameExample(), AxiEthernetSgDmaMultiFrameExample(), AxiEthernetSgDmaPartialChecksumOffloadExample(), AxiEthernetSgDmaSingleFrameExample(), XAxiEthernet_ClearOptions(), XAxiEthernet_SetOptions(), and XAxiEthernet_Start().

#define XAE_RST_DEFAULT_TIMEOUT_VAL 1000000

Timeout in us used while checking if the core had come out of reset or for the driver API to wait for before returning a failure case.

Referenced by XAxiEthernet_Reset().

#define XAE_RTAG_OFFSET 0x0000001C

Rx VLAN TAG.

Referenced by XAxiEthernet_GetVTagValue(), and XAxiEthernet_SetVTagValue().

#define XAE_RX1024BL_OFFSET 0x00000248

Count of 1024-MAX bytes frames received, LSW.

#define XAE_RX1024BU_OFFSET 0x0000024C

Count of 1024-MAX bytes frames received, MSW.

#define XAE_RX128B255L_OFFSET 0x00000230

Count of 128-255 bytes Frames received, LSW.

#define XAE_RX128B255U_OFFSET 0x00000234

Count of 128-255 bytes frames received, MSW.

#define XAE_RX256B511L_OFFSET 0x00000238

Count of 256-511 bytes Frames received, LSW.

#define XAE_RX256B511U_OFFSET 0x0000023C

Count of 256-511 bytes frames received, MSW.

#define XAE_RX512B1023L_OFFSET 0x00000240

Count of 512-1023 bytes frames received, LSW.

#define XAE_RX512B1023U_OFFSET 0x00000244

Count of 512-1023 bytes frames received, MSW.

#define XAE_RX64BL_OFFSET 0x00000220

Count of 64 bytes frames received, LSW.

#define XAE_RX64BU_OFFSET 0x00000224

Count of 64 bytes frames received, MSW.

#define XAE_RX65B127L_OFFSET 0x00000228

Count of 65-127 bytes Frames received, LSW.

#define XAE_RX65B127U_OFFSET 0x0000022C

Count of 65-127 bytes Frames received, MSW.

#define XAE_RX_VLAN_DATA_OFFSET 0x00008000

RX VLAN data table address.

Referenced by XAxiEthernet_GetVidTable(), and XAxiEthernet_SetVidTable().

#define XAE_RXAERL_OFFSET 0x00000340

Frames received with alignment errors, LSW.

#define XAE_RXAERU_OFFSET 0x0000034C

Frames received with alignment errors, MSW.

#define XAE_RXBCSTFL_OFFSET 0x000002A0

Count of broadcast frames received, LSW.

#define XAE_RXBCSTFU_OFFSET 0x000002A4

Count of broadcast frames received, MSW.

#define XAE_RXBL_OFFSET 0x00000200

Received Bytes, LSW.

#define XAE_RXBU_OFFSET 0x00000204

Received Bytes, MSW.

#define XAE_RXCTRFL_OFFSET 0x000002B0

Count of control frames received, LSW.

#define XAE_RXCTRFU_OFFSET 0x000002B4

Count of control frames received, MSW.

#define XAE_RXFC_OFFSET 0x00000414

Rx Max Frm Config Register.

#define XAE_RXFCSERL_OFFSET 0x00000298

Count of frames received with FCS error and at least 64 bytes, LSW.

#define XAE_RXFCSERU_OFFSET 0x0000029C

Count of frames received with FCS error and at least 64 bytes,MSW.

#define XAE_RXFL_OFFSET 0x00000290

Count of frames received OK, LSW.

#define XAE_RXFRAGL_OFFSET 0x00000218

Count of undersized(less than 64 bytes) and bad FCS frames received, LSW.

#define XAE_RXFRAGU_OFFSET 0x0000021C

Count of undersized(less than 64 bytes) and bad FCS frames received, MSW.

#define XAE_RXFU_OFFSET 0x00000294

Count of frames received OK, MSW.

#define XAE_RXLTERL_OFFSET 0x000002B8

Count of frames received with length error, LSW.

#define XAE_RXLTERU_OFFSET 0x000002BC

Count of frames received with length error, MSW.

#define XAE_RXMCSTFL_OFFSET 0x000002A8

Count of multicast frames received, LSW.

#define XAE_RXMCSTFU_OFFSET 0x000002AC

Count of multicast frames received, MSW.

#define XAE_RXOVRL_OFFSET 0x00000250

Count of oversize frames received, LSW.

#define XAE_RXOVRU_OFFSET 0x00000254

Count of oversize frames received, MSW.

#define XAE_RXPFL_OFFSET 0x000002C8

Count of pause frames received, LSW.

#define XAE_RXPFU_OFFSET 0x000002CC

Count of pause frames received, MSW.

#define XAE_RXUNDRL_OFFSET 0x00000210

Count of undersize(less than 64 bytes) frames received, LSW.

#define XAE_RXUNDRU_OFFSET 0x00000214

Count of undersize(less than 64 bytes) frames received, MSW.

#define XAE_RXUOPFL_OFFSET 0x000002D0

Count of control frames received with unsupported opcode, LSW.

#define XAE_RXUOPFU_OFFSET 0x000002D4

Count of control frames received with unsupported opcode, MSW.

#define XAE_RXVLANFL_OFFSET 0x000002C0

Count of VLAN tagged frames received, LSW.

#define XAE_RXVLANFU_OFFSET 0x000002C4

Count of VLAN tagged frames received, MSW.

#define XAE_SOFT_TEMAC_HIGH_SPEED 1

For soft cores with 10/100/1000 Mbps speed.

#define XAE_SOFT_TEMAC_LOW_SPEED 0

For soft cores with 10/100 Mbps speed.

#define XAE_SPEED_1000_MBPS 1000

Speed of 1000 Mbps.

Referenced by AxiEthernetUtilConfigureInternalPhy(), AxiEthernetUtilEnterLoopback(), XAxiEthernet_GetOperatingSpeed(), XAxiEthernet_GetRgmiiStatus(), XAxiEthernet_GetSgmiiStatus(), and XAxiEthernet_SetOperatingSpeed().

#define XAE_SPEED_100_MBPS 100

Speed of 100 Mbps.

Referenced by AxiEthernetUtilConfigureInternalPhy(), AxiEthernetUtilEnterLoopback(), XAxiEthernet_GetOperatingSpeed(), XAxiEthernet_GetRgmiiStatus(), XAxiEthernet_GetSgmiiStatus(), and XAxiEthernet_SetOperatingSpeed().

#define XAE_SPEED_10_MBPS 10

Speed of 10 Mbps.

Referenced by AxiEthernetUtilConfigureInternalPhy(), AxiEthernetUtilEnterLoopback(), XAxiEthernet_GetOperatingSpeed(), XAxiEthernet_GetRgmiiStatus(), XAxiEthernet_GetSgmiiStatus(), and XAxiEthernet_SetOperatingSpeed().

#define XAE_SPEED_2500_MBPS 2500

Speed of 2500 Mbps.

Referenced by AxiEthernetUtilConfigureInternalPhy(), AxiEthernetUtilEnterLoopback(), and XAxiEthernet_SetOperatingSpeed().

#define XAE_TC_1588_CMD_EN_MASK 0x00400000

1588 Cmd field enable

#define XAE_TC_FCS_MASK 0x20000000

In-Band FCS enable (FCS not generated)

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_TC_IFG_MASK 0x02000000

Inter-frame gap adjustment enable.

#define XAE_TC_JUM_MASK 0x40000000

Jumbo frame enable.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_TC_OFFSET 0x00000408

Tx Configuration.

Referenced by XAxiEthernet_ClearOptions(), XAxiEthernet_SetOptions(), and XAxiEthernet_Start().

#define XAE_TC_RST_MASK 0x80000000

Reset.

#define XAE_TC_TX_MASK 0x10000000

Transmitter enable.

Referenced by XAxiEthernet_ClearOptions(), XAxiEthernet_SetOptions(), and XAxiEthernet_Start().

#define XAE_TC_VLAN_MASK 0x08000000

VLAN frame enable.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_TFGP_IFGP_MASK 0x0000007F

Transmit inter-frame gap adjustment value.

#define XAE_TPF_OFFSET 0x00000004

Tx Pause Frame.

Referenced by XAxiEthernet_SendPausePacket().

#define XAE_TPF_TPFV_MASK 0x0000FFFF

Tx pause frame value.

Referenced by XAxiEthernet_SendPausePacket().

#define XAE_TPID0_OFFSET 0x00000028

VLAN TPID0 register.

Referenced by XAxiEthernet_ClearTpid(), XAxiEthernet_GetTpid(), and XAxiEthernet_SetTpid().

#define XAE_TPID1_OFFSET 0x0000002C

VLAN TPID1 register.

Referenced by XAxiEthernet_ClearTpid(), XAxiEthernet_GetTpid(), and XAxiEthernet_SetTpid().

#define XAE_TPID_0_MASK 0x0000FFFF

TPID 0.

Referenced by XAxiEthernet_ClearTpid(), XAxiEthernet_GetTpid(), and XAxiEthernet_SetTpid().

#define XAE_TPID_1_MASK 0xFFFF0000

TPID 1.

Referenced by XAxiEthernet_ClearTpid(), and XAxiEthernet_SetTpid().

#define XAE_TRANSMITTER_ENABLE_OPTION 0x00000080

XAE_RECEIVER_ENABLE_OPTION specifies the Axi Ethernet device receiver to be enabled.

This driver sets this option to enabled (set) by default.

Referenced by AxiEthernetPingReqExample(), AxiEthernetSgDmaFullChecksumOffloadExample(), AxiEthernetSgDmaIntrCoalescingExample(), AxiEthernetSgDmaIntrExtMulticastExample(), AxiEthernetSgDmaIntrExtVlanExample(), AxiEthernetSgDmaIntrMultiFrameExample(), AxiEthernetSgDmaIntrSingleFrameExample(), AxiEthernetSgDmaMultiFrameExample(), AxiEthernetSgDmaPartialChecksumOffloadExample(), AxiEthernetSgDmaSingleFrameExample(), XAxiEthernet_ClearOptions(), XAxiEthernet_SetOptions(), and XAxiEthernet_Start().

#define XAE_TTAG_OFFSET 0x00000018

Tx VLAN TAG.

Referenced by XAxiEthernet_GetVTagValue(), and XAxiEthernet_SetVTagValue().

#define XAE_TX1024L_OFFSET 0x00000280

Count of 1024-MAX bytes frames transmitted, LSW.

#define XAE_TX1024U_OFFSET 0x00000284

Count of 1024-MAX bytes frames transmitted, MSW.

#define XAE_TX128B255L_OFFSET 0x00000268

Count of 128-255 bytes frames transmitted, LSW.

#define XAE_TX128B255U_OFFSET 0x0000026C

Count of 128-255 bytes frames transmitted, MSW.

#define XAE_TX256B511L_OFFSET 0x00000270

Count of 256-511 bytes frames transmitted, LSW.

#define XAE_TX256B511U_OFFSET 0x00000274

Count of 256-511 bytes frames transmitted, MSW.

#define XAE_TX512B1023L_OFFSET 0x00000278

Count of 512-1023 bytes frames transmitted, LSW.

#define XAE_TX512B1023U_OFFSET 0x0000027C

Count of 512-1023 bytes frames transmitted, MSW.

#define XAE_TX64BL_OFFSET 0x00000258

Count of 64 bytes frames transmitted, LSW.

#define XAE_TX64BU_OFFSET 0x0000025C

Count of 64 bytes frames transmitted, MSW.

#define XAE_TX65B127L_OFFSET 0x00000260

Count of 65-127 bytes frames transmitted, LSW.

#define XAE_TX65B127U_OFFSET 0x00000264

Count of 65-127 bytes frames transmitted, MSW.

#define XAE_TX_TIMESTAMP_ADJ_OFFSET 0x0000041C

Transmitter time stamp adjust control Register.

#define XAE_TX_VLAN_DATA_OFFSET 0x00004000

TX VLAN data table address.

Referenced by XAxiEthernet_GetVidTable(), and XAxiEthernet_SetVidTable().

#define XAE_TXAECL_OFFSET 0x00000330

Frames aborted with excessive Collisions, LSW.

#define XAE_TXAECU_OFFSET 0x00000334

Frames aborted with excessive Collisions, MSW.

#define XAE_TXBCSTFL_OFFSET 0x000002E0

Count of broadcast frames transmitted OK, LSW.

#define XAE_TXBCSTFU_OFFSET 0x000002E4

Count of broadcast frames transmitted, MSW.

#define XAE_TXBL_OFFSET 0x00000208

Transmitted Bytes, LSW.

#define XAE_TXBU_OFFSET 0x0000020C

Transmitted Bytes, MSW.

#define XAE_TXCTRFL_OFFSET 0x000002F8

Count of control frames transmitted, LSW.

#define XAE_TXCTRFU_OFFSET 0x000002FC

Count of control frames, transmitted, MSW.

#define XAE_TXDEFL_OFFSET 0x00000320

Deferred Tx Frames, LSW.

#define XAE_TXDEFU_OFFSET 0x00000324

Deferred Tx Frames, MSW.

#define XAE_TXEDEFL_OFFSET 0x00000338

Transmit Frames with excessive Defferal, LSW.

#define XAE_TXEDEFU_OFFSET 0x0000033C

Transmit Frames with excessive Defferal, MSW.

#define XAE_TXFC_OFFSET 0x00000418

Tx Max Frm Config Register.

#define XAE_TXFL_OFFSET 0x000002D8

Count of frames transmitted OK, LSW.

#define XAE_TXFU_OFFSET 0x000002DC

Count of frames transmitted OK, MSW.

#define XAE_TXLTCL_OFFSET 0x00000328

Frames transmitted with late Collisions, LSW.

#define XAE_TXLTCU_OFFSET 0x0000032C

Frames transmitted with late Collisions, MSW.

#define XAE_TXMCL_OFFSET 0x00000318

Multiple Collision Frames Transmitted OK, LSW.

#define XAE_TXMCSTFL_OFFSET 0x000002E8

Count of multicast frames transmitted, LSW.

#define XAE_TXMCSTFU_OFFSET 0x000002EC

Count of multicast frames transmitted, MSW.

#define XAE_TXMCU_OFFSET 0x0000031C

Multiple Collision Frames Transmitted OK, MSW.

#define XAE_TXOVRL_OFFSET 0x00000288

Count of oversize frames transmitted, LSW.

#define XAE_TXOVRU_OFFSET 0x0000028C

Count of oversize frames transmitted, MSW.

#define XAE_TXPFL_OFFSET 0x00000308

Count of pause frames transmitted, LSW.

#define XAE_TXPFU_OFFSET 0x0000030C

Count of pause frames transmitted, MSW.

#define XAE_TXSCL_OFFSET 0x00000310

Single Collision Frames Transmitted OK, LSW.

#define XAE_TXSCU_OFFSET 0x00000314

Single Collision Frames Transmitted OK, MSW.

#define XAE_TXUNDRERL_OFFSET 0x000002F0

Count of frames transmitted underrun error, LSW.

#define XAE_TXUNDRERU_OFFSET 0x000002F4

Count of frames transmitted underrun error, MSW.

#define XAE_TXVLANFL_OFFSET 0x00000300

Count of VLAN tagged frames transmitted, LSW.

#define XAE_TXVLANFU_OFFSET 0x00000304

Count of VLAN tagged frames transmitted, MSW.

#define XAE_UAW0_OFFSET 0x00000700

Unicast address word 0.

Referenced by XAxiEthernet_GetMacAddress(), and XAxiEthernet_SetMacAddress().

#define XAE_UAW1_OFFSET 0x00000704

Unicast address word 1.

Referenced by XAxiEthernet_GetMacAddress(), and XAxiEthernet_SetMacAddress().

#define XAE_UAW1_UNICASTADDR_MASK 0x0000FFFF

Station address bits [47:32] Station address bits [31:0] are stored in register UAW0.

Referenced by XAxiEthernet_SetMacAddress().

#define XAE_UAWL_OFFSET 0x00000020

Unicast address word lower.

Referenced by XAxiEthernet_GetMacAddress(), and XAxiEthernet_SetMacAddress().

#define XAE_UAWU_OFFSET 0x00000024

Unicast address word upper.

Referenced by XAxiEthernet_GetMacAddress(), and XAxiEthernet_SetMacAddress().

#define XAE_VLAN_OPTION 0x00000004

XAE_FLOW_CONTROL_OPTION specifies the Axi Ethernet device to recognize received flow control frames.

This driver sets this option to enabled (set) by default.

Referenced by XAxiEthernet_ClearOptions(), and XAxiEthernet_SetOptions().

#define XAE_VLAN_TABL_STRP_ENTRY_MASK 0x01

Mask used to extract the the strip field from an entry in VLAN table.

Referenced by XAxiEthernet_GetVidTable().

#define XAE_VLAN_TABL_STRP_FLD_LEN 1

Strip field length in vlan table used for extended vlan features.

Referenced by XAxiEthernet_SetVidTable().

#define XAE_VLAN_TABL_STRP_STRT_OFFSET 1

Strip field start offset in each entry in the VLAN table.

Referenced by XAxiEthernet_GetVidTable(), and XAxiEthernet_SetVidTable().

#define XAE_VLAN_TABL_TAG_ENTRY_MASK 0x01

Mask used to extract the the tag field from an entry in VLAN table.

Referenced by XAxiEthernet_GetVidTable().

#define XAE_VLAN_TABL_TAG_FLD_LEN 1

Tag field length in vlan table used for extended vlan features.

Referenced by XAxiEthernet_SetVidTable().

#define XAE_VLAN_TABL_VID_START_OFFSET 2

VID field start offset in each entry in the VLAN table.

Referenced by XAxiEthernet_GetVidTable(), and XAxiEthernet_SetVidTable().

#define XAxiEthernet_AxiDevBaseAddress ( InstancePtr ) ((InstancePtr)->Config.AxiDevBaseAddress)

XAxiEthernet_AxiDevBaseAddress reports the base address of the core connected to the Axi Ethernet's Axi4 Stream interface.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: The base address of the core connected to the Axi Ethernet's streaming interface.

Note: C-style signature: u32 XAxiEthernet_AxiDevBaseAddress(XAxiEthernet *InstancePtr)

#define XAxiEthernet_GetIntStatus ( InstancePtr ) XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, XAE_IS_OFFSET)

XAxiEthernet_GetIntStatus returns a bit mask of the interrupt status register (ISR).

XAxiEthernet_GetIntStatus can be used to query the status without having to have interrupts enabled.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: Returns a bit mask of the interrupt status conditions. The mask will be a set of bit wise or'd values from the XAE_INT_*_MASK definitions in xaxitemac_hw.h file.

Note: C-style signature: u32 XAxiEthernet_GetIntStatus(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetPollForRxStatus().

#define XAxiEthernet_GetPhysicalInterface ( InstancePtr ) ((InstancePtr)->Config.PhyType)

XAxiEthernet_GetPhysicalInterface returns the type of PHY interface being used by the given instance, specified by InstancePtr.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: The Physical Interface type which is one of XAE_PHY_TYPE_x where x is MII, GMII, RGMII_1_3, RGMII_2_0, SGMII, or 1000BASE_X (defined in xaxiethernet.h).

Note: C-style signature: int XAxiEthernet_GetPhysicalInterface(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetExtVlanExample(), AxiEthernetFifoIntrExample(), AxiEthernetMcastExample(), AxiEthernetPolledExample(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaPollExample(), AxiEthernetUtilEnterLoopback(), XAxiEthernet_GetRgmiiStatus(), XAxiEthernet_GetSgmiiStatus(), and XAxiEthernet_SetOperatingSpeed().

#define XAxiEthernet_GetTemacType ( InstancePtr ) ((InstancePtr)->Config.TemacType)

XAxiEthernet_GetTemacType returns the Axi Ethernet type of the core.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

Returns the values of TemacType, which can be XAE_SOFT_TEMAC_10_100_MBPS (0) for Soft Temac Core with speed 10/100 Mbps. XAE_SOFT_TEMAC_10_100_1000_MBPS (1) for Soft Temac core with speed 10/100/1000 Mbps XAE_HARD_TEMC (2) for Hard Temac Core for Virtex-6

Note: C-style signature: u32 XAxiEthernet_GetTemacType(XAxiEthernet *InstancePtr)

Referenced by XAxiEthernet_SetOperatingSpeed().

#define XAxiEthernet_IntClear	(	InstancePtr,
		Mask
	)

Value:

XAxiEthernet_WriteReg((InstancePtr)->Config.BaseAddress, \

XAE_IS_OFFSET, ((Mask) & XAE_INT_ALL_MASK))

XAE_INT_ALL_MASK

#define XAE_INT_ALL_MASK

All the ints.

Definition: xaxiethernet_hw.h:672

XAE_IS_OFFSET

#define XAE_IS_OFFSET

Interrupt status.

Definition: xaxiethernet_hw.h:62

XAxiEthernet_WriteReg

#define XAxiEthernet_WriteReg(BaseAddress, RegOffset, Data)

XAxiEthernet_WriteReg, writes Data to the register specified by RegOffset.

Definition: xaxiethernet_hw.h:1199

XAxiEthernet_IntClear clears pending interrupts specified in Mask.

The corresponding pending interrupt for each bit set to 1 in Mask, will be cleared. In other words, XAxiEthernet_IntClear uses the "set a bit to clear it" scheme.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Mask	contains a bit mask of the pending interrupts to clear. The mask can be formed using a set of bit wise or'd values from the `XAE_INT_*_MASK` definitions in xaxitemac_hw.h file.

Note: C-style signature: void XAxiEthernet_IntClear(XAxiEthernet *InstancePtr, u32 Mask)

Referenced by AxiEthernetSgDmaIntrExample().

#define XAxiEthernet_IntDisable	(	InstancePtr,
		Mask
	)

Value:

XAxiEthernet_WriteReg((InstancePtr)->Config.BaseAddress,         \
                XAE_IE_OFFSET,                                           \
                XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \
                                XAE_IE_OFFSET) & ~((Mask) & XAE_INT_ALL_MASK));

XAxiEthernet_IntDisable disables the interrupts specified in Mask.

The corresponding interrupt for each bit set to 1 in Mask, will be disabled. In other words, XAxiEthernet_IntDisable uses the "set a bit to clear it" scheme.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Mask	contains a bit mask of the interrupts to disable. The mask can be formed using a set of bit wise or'd values from the `XAE_INT_*_MASK` definitions in xaxitemac_hw.h file

Returns: None.

Note: C-style signature: void XAxiEthernet_IntDisable(XAxiEthernet *InstancePtr, u32 Mask)

#define XAxiEthernet_IntEnable	(	InstancePtr,
		Mask
	)

Value:

XAxiEthernet_WriteReg((InstancePtr)->Config.BaseAddress,        \
                XAE_IE_OFFSET,                                          \
                XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \
                                XAE_IE_OFFSET) | ((Mask) & XAE_INT_ALL_MASK));

XAxiEthernet_IntEnable enables the interrupts specified in Mask.

The corresponding interrupt for each bit set to 1 in Mask, will be enabled.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Mask	contains a bit mask of the interrupts to enable. The mask can be formed using a set of bit wise or'd values from the `XAE_INT_*_MASK` definitions in xaxitemac_hw.h file.

Returns: None.

Note: C-style signature: void XAxiEthernet_IntEnable(XAxiEthernet *InstancePtr, u32 Mask)

Referenced by AxiEthernetSgDmaFullChecksumOffloadExample(), AxiEthernetSgDmaIntrExtMulticastExample(), AxiEthernetSgDmaIntrExtVlanExample(), AxiEthernetSgDmaIntrSingleFrameExample(), AxiEthernetSgDmaPartialChecksumOffloadExample(), and AxiEthernetSingleFrameIntrExample().

#define XAxiEthernet_IntPending ( InstancePtr ) XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, XAE_IP_OFFSET)

XAxiEthernet_IntPending returns a bit mask of the pending interrupts.

Each bit set to 1 in the return value represents a pending interrupt.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: Returns a bit mask of the interrupts that are pending. The mask will be a set of bit wise or'd values from the XAE_INT_*_MASK definitions in xaxitemac_hw.h file.

Note: C-style signature: u32 XAxiEthernet_IntPending(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetSgDmaIntrExample().

#define XAxiEthernet_IsAvbConfigured ( InstancePtr ) (((InstancePtr)->Config.Avb) ? TRUE : FALSE)

XAxiEthernet_IsAvbConfigured returns determines if Ethernet AVB.is configured in the harwdare or not.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with Ethernet AVB.
FALSE if the device is NOT configured with Ethernet AVB.

Note: C-style signature: u32 XAxiEthernet_IsAvbConfigured(XAxiEthernet *InstancePtr)

#define XAxiEthernet_IsDma ( InstancePtr ) (((InstancePtr)->Config.AxiDevType == XPAR_AXI_DMA) ? TRUE: FALSE)

XAxiEthernet_IsDma reports if the device is currently connected to DMA.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the Axi Ethernet device is connected DMA.
FALSE.if the Axi Ethernet device is NOT connected to DMA

Note: C-style signature: u32 XAxiEthernet_IsDma(XAxiEthernet *InstancePtr)

#define XAxiEthernet_IsExtFuncCap ( InstancePtr )

Value:

((XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \
                        XAE_RAF_OFFSET) & XAE_RAF_NEWFNCENBL_MASK) ?  \
                                TRUE : FALSE)

XAxiEthernet_IsExtFuncCap determines if the device is capable of the new/extend VLAN and multicast features.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is capable and configured with extended Multicast and VLAN Tagging/Stripping and Translation.
TRUE if the device is NOT capable and NOT configured with extended Multicast and VLAN Tagging/Stripping and Translation.

Note: C-style signature: u32 XAxiEthernet_IsExtFuncCap(XAxiEthernet *InstancePtr)

Referenced by XAxiEthernet_AddExtMulticastGroup(), XAxiEthernet_ClearExtMulticastGroup(), XAxiEthernet_ClearTpid(), XAxiEthernet_GetMacAddress(), XAxiEthernet_SetMacAddress(), XAxiEthernet_SetTpid(), XAxiEthernet_SetVidTable(), XAxiEthernet_SetVStripMode(), XAxiEthernet_SetVTagMode(), and XAxiEthernet_SetVTagValue().

#define XAxiEthernet_IsExtMcast ( InstancePtr ) (((InstancePtr)->Config.ExtMcast) ? TRUE : FALSE)

XAxiEthernet_IsExtMcast determines if the device is built with new/extended multicast features.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is built with extended multicast features.
FALSE if the device is not built with the extended multicast features.

Note: This function indicates when hardware is built with extended Multicast feature.

C-style signature: u32 XAxiEthernet_IsExtMcast(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetMcastExample(), and AxiEthernetSgDmaIntrExtMulticastExample().

#define XAxiEthernet_IsExtMcastEnable ( InstancePtr )

Value:

((XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \
                        XAE_RAF_OFFSET) & XAE_RAF_EMULTIFLTRENBL_MASK) ? \
                                TRUE : FALSE)

XAxiEthernet_IsExtMcastEnable determines if the extended multicast features is enabled.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the extended multicast features are enabled.
FALSE if the extended multicast features are NOT enabled

Note: : This function indicates when extended Multicast is enabled in HW, extended multicast mode in wrapper can be tested.

C-style signature: u32 XAxiEthernet_IsExtMcastEnable(XAxiEthernet *InstancePtr)

Referenced by XAxiEthernet_AddExtMulticastGroup(), and XAxiEthernet_ClearExtMulticastGroup().

#define XAxiEthernet_IsFifo ( InstancePtr ) (((InstancePtr)->Config.AxiDevType == XPAR_AXI_FIFO) ? TRUE: FALSE)

XAxiEthernet_IsFifo reports if the device is currently connected to a fifo core.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the Axi Ethernet device is connected to a fifo
FALSE if the Axi Ethernet device is NOT connected to a fifo.

Note: C-style signature: u32 XAxiEthernet_IsFifo(XAxiEthernet *InstancePtr)

#define XAxiEthernet_IsMcDma ( InstancePtr ) (((InstancePtr)->Config.AxiDevType == XPAR_AXI_MCDMA) ? TRUE: FALSE)

XAxiEthernet_IsMcDma reports if the device is currently connected to MCDMA.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the Axi Ethernet device is connected MCDMA.
FALSE.if the Axi Ethernet device is NOT connected to MCDMA

Note: C-style signature: u32 XAxiEthernet_IsMcDma(XAxiEthernet *InstancePtr)

#define XAxiEthernet_IsRecvFrameDropped ( InstancePtr )

Value:

((XAxiEthernet_ReadReg((InstancePtr)->Config.BaseAddress, \

XAE_IS_OFFSET) & XAE_INT_RXRJECT_MASK) ? TRUE : FALSE)

XAE_INT_RXRJECT_MASK

#define XAE_INT_RXRJECT_MASK

Rx frame rejected.

Definition: xaxiethernet_hw.h:665

XAxiEthernet_ReadReg

#define XAxiEthernet_ReadReg(BaseAddress, RegOffset)

XAxiEthernet_ReadReg returns the value read from the register specified by RegOffset.

Definition: xaxiethernet_hw.h:1171

XAE_IS_OFFSET

#define XAE_IS_OFFSET

Interrupt status.

Definition: xaxiethernet_hw.h:62

XAxiEthernet_IsRecvFrameDropped determines if the device thinks it has dropped a receive frame.

The device interrupt status register is read to determine this.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if a frame has been dropped
FALSE if a frame has NOT been dropped.

Note: C-style signature: u32 XAxiEthernet_IsRecvFrameDropped(XAxiEthernet *InstancePtr)

#define XAxiEthernet_IsRxFullCsum ( InstancePtr ) ((((InstancePtr)->Config.RxCsum) == 0x02) ? TRUE : FALSE)

XAxiEthernet_IsRxFullCsum determines if the device is configured with full checksum offloading on the receive channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with full checksum offloading on the receive channel.
FALSE.if the device is not configured with full checksum offloading on the receive side.

Note: C-style signature: u32 XAxiEthernet_IsRxFullCsum(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetSgDmaIntrExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_IsRxPartialCsum ( InstancePtr ) ((((InstancePtr)->Config.RxCsum) == 0x01) ? TRUE : FALSE)

XAxiEthernet_IsRxPartialCsum determines if the device is configured with partial checksum offloading on the receive channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with partial checksum offloading on the receive channel.
FALSE.if the device is not configured with partial checksum offloading on the receive side.

Note: C-style signature: u32 XAxiEthernet_IsRxPartialCsum(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaPartialChecksumOffloadExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_IsRxVlanStrp ( InstancePtr ) (((InstancePtr)->Config.RxVlanStrp) ? TRUE : FALSE)

XAxiEthernet_IsRxVlanStrp determines if the device is configured with receive VLAN stripping on the receive channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with VLAN stripping on the Receive channel.
FALSE if the device is NOT configured with VLAN stripping on the Receive channel.

Note: C-style signature: u32 XAxiEthernet_IsRxVlanTran(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetExtVlanExample(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaIntrExtVlanExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_IsRxVlanTag ( InstancePtr ) (((InstancePtr)->Config.RxVlanTag) ? TRUE : FALSE)

XAxiEthernet_IsRxVlanTag determines if the device is configured with receive VLAN tagging on the receive channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with VLAN tagging on the Receive channel.
FALSE if the device is NOT configured with VLAN tagging on the Receive channel.

Note: C-style signature: u32 XAxiEthernet_IsRxVlanTag(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetExtVlanExample(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaIntrExtVlanExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_IsRxVlanTran ( InstancePtr ) (((InstancePtr)->Config.RxVlanTran) ? TRUE : FALSE)

XAxiEthernet_IsRxVlanTran determines if the device is configured with receive VLAN translation on the receive channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with VLAN translation on the Receive channel.
FALSE if the device is NOT configured with VLAN translation on the Receive channel.

Note: C-style signature: u32 XAxiEthernet_IsRxVlanTran(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetExtVlanExample(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaIntrExtVlanExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_IsSgmiiOverLvdsEnabled ( InstancePtr ) (((InstancePtr)->Config.EnableSgmiiOverLvds) ? TRUE : FALSE)

XAxiEthernet_IsSgmiiOverLvdsEnabled determines if SGMII over LVDS is enabled in the harwdare or not.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with SGMII over LVDS.
FALSE if the device is NOT configured with SGMII over LVDS.

Note: C-style signature: u32 XAxiEthernet_IsSgmiiOverLvdsEnabled(XAxiEthernet *InstancePtr)

#define XAxiEthernet_IsStarted ( InstancePtr ) (((InstancePtr)->IsStarted == XIL_COMPONENT_IS_STARTED) ? TRUE : FALSE)

XAxiEthernet_IsStarted reports if the device is in the started or stopped state.

To be in the started state, the calling code must have made a successful call to XAxiEthernet_Start. To be in the stopped state, XAxiEthernet_Stop or XAxiEthernet_CfgInitialize function must have been called.

Parameters

InstancePtr is a pointer to the of Axi Ethernet instance to be worked on.

Returns

TRUE if the device has been started.
FALSE.if the device has not been started

Note: C-style signature: u32 XAxiEthernet_IsStarted(XAxiEthernet *InstancePtr)

#define XAxiEthernet_IsStatsConfigured ( InstancePtr ) (((InstancePtr)->Config.Stats) ? TRUE : FALSE)

XAxiEthernet_IsStatsConfigured returns determines if Statistics gathering.

is configured in the harwdare or not.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with statistics gathering.
FALSE if the device is NOT configured with statistics gathering.

Note: C-style signature: u32 XAxiEthernet_IsStatsConfigured(XAxiEthernet *InstancePtr)

#define XAxiEthernet_IsTxFullCsum ( InstancePtr ) ((((InstancePtr)->Config.TxCsum) == 0x02) ? TRUE : FALSE)

XAxiEthernet_IsTxFullCsum determines if the device is configured with full checksum offloading on the transmit channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with full checksum offloading on the transmit side.
FALSE.if the device is not configured with full checksum offloading on the transmit side.

Note: C-style signature: u32 XAxiEthernet_IsTxFullCsum(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetSgDmaIntrExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_IsTxPartialCsum ( InstancePtr ) ((((InstancePtr)->Config.TxCsum) == 0x01) ? TRUE : FALSE)

XAxiEthernet_IsTxPartialCsum determines if the device is configured with partial checksum offloading on the transmit channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with partial checksum offloading on the transmit side.
FALSE.if the device is not configured with partial checksum offloading on the transmit side.

Note: C-style signature: u32 XAxiEthernet_IsTxPartialCsum(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaPartialChecksumOffloadExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_IsTxVlanStrp ( InstancePtr ) (((InstancePtr)->Config.TxVlanStrp) ? TRUE : FALSE)

XAxiEthernet_IsTxVlanStrp determines if the device is configured with transmit VLAN stripping on the transmit channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with VLAN stripping on the Transmit channel.
FALSE if the device is NOT configured with VLAN stripping on the Transmit channel.

Note: C-style signature: u32 XAxiEthernet_IsTxVlanStrp(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetExtVlanExample(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaIntrExtVlanExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_IsTxVlanTag ( InstancePtr ) (((InstancePtr)->Config.TxVlanTag) ? TRUE : FALSE)

XAxiEthernet_IsTxVlanTag determines if the device is configured with transmit VLAN tagging on the transmit channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with VLAN tagging on the Transmit channel.
FALSE if the device is NOT configured with VLAN tagging on the Transmit channel.

Note: C-style signature: u32 XAxiEthernet_IsTxVlanTag(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetExtVlanExample(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaIntrExtVlanExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_IsTxVlanTran ( InstancePtr ) (((InstancePtr)->Config.TxVlanTran) ? TRUE : FALSE)

XAxiEthernet_IsTxVlanTran determines if the device is configured with transmit VLAN translation on the transmit channel.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns

TRUE if the device is configured with VLAN translation on the Transmit channel.
FALSE if the device is NOT configured with VLAN translation on the Transmit channel.

Note: C-style signature: u32 XAxiEthernet_IsTxVlanTran(XAxiEthernet *InstancePtr)

Referenced by AxiEthernetExtVlanExample(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaIntrExtVlanExample(), and AxiEthernetSgDmaPollExample().

#define XAxiEthernet_ReadReg	(	BaseAddress,
		RegOffset
	)	(Xil_In32(((BaseAddress) + (RegOffset))))

XAxiEthernet_ReadReg returns the value read from the register specified by RegOffset.

Parameters

BaseAddress	is the base address of the Axi Ethernet device.
RegOffset	is the offset of the register to be read.

Returns: Returns the 32-bit value of the register.

Note: C-style signature: u32 XAxiEthernet_ReadReg(u32 BaseAddress, u32 RegOffset)

#define XAxiEthernet_WriteReg	(	BaseAddress,
		RegOffset,
		Data
	)	Xil_Out32(((BaseAddress) + (RegOffset)), (Data))

XAxiEthernet_WriteReg, writes Data to the register specified by RegOffset.

Parameters

BaseAddress	is the base address of the Axi Ethernet device.
RegOffset	is the offset of the register to be written.
Data	is the 32-bit value to write to the register.

Returns: None.

Note: C-style signature: void XAxiEthernet_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)

Typedef Documentation

typedef struct XAxiEthernet XAxiEthernet

struct XAxiEthernet is the type for Axi Ethernet driver instance data.

The calling code is required to use a unique instance of this structure for every Axi Ethernet device used in the system. A reference to a structure of this type is then passed to the driver API functions.

typedef struct XAxiEthernet_Config XAxiEthernet_Config

This typedef contains configuration information for a Axi Ethernet device.

Function Documentation

int XAxiEthernet_AddExtMulticastGroup	(	XAxiEthernet *	InstancePtr,
		void *	AddressPtr
	)

XAxiEthernet_AddExtMulticastGroup adds an entry to the multicast Ethernet address table.

The new entry, represents a group of MAC addresses based on the contents of AddressPtr. AddressPtr is one member of the MAC address set in the newly added entry.

The device must be stopped to use this function.

Once an Ethernet address is programmed, the Axi Ethernet device will begin receiving data sent from that address. The Axi Ethernet hardware does not have a control bit to disable multicast filtering. The only way to prevent the Axi Ethernet device from receiving messages from an Ethernet address in the multicast table is to clear it with XAxiEthernet_ClearExtMulticastGroup().

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
AddressPtr	is a pointer to the 6-byte Ethernet address to add.

Returns

XST_SUCCESS.on successful completion.
XST_DEVICE_IS_STARTED if the Axi Ethernet device is not stopped.
XST_INVALID_PARAM if the input MAC address is not between 01:00:5E:00:00:00 and 01:00:5E:7F:FF:FF per RFC1112.

Note

This routine consider all 2**23 possible multicast Ethernet addresses to be 8Mx1 bit or 1M bytes memory area. All defined multicast addresses are from 01.00.5E.00.00.00 to 01.00.5E.7F.FF.FF The most significant 25 bit out of 48 bit are static, so they will not be part of calculation.

The hardware requires to 'index' with bit 22-8, 15 bits in total. The least significant byte/8 bits are considered a group.

This API operates at a group (256 MAC addresses) for hardware to do the first layer address filtering. It is user's responsibility to provision this table appropriately.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_MCAST_TABLE_OFFSET, XAxiEthernet_IsExtFuncCap, XAxiEthernet_IsExtMcastEnable, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetSgDmaIntrExtMulticastExample().

int XAxiEthernet_CfgInitialize	(	XAxiEthernet *	InstancePtr,
		XAxiEthernet_Config *	CfgPtr,
		UINTPTR	EffectiveAddress
	)

XAxiEthernet_CfgInitialize initializes an AXI Ethernet device along with the InstancePtr that references it.

The PHY is setup independently from the Ethernet core. Use the MII or whatever other interface may be present for setup.

Parameters

InstancePtr	references the memory instance to be associated with the AXI Ethernet core instance upon initialization.
CfgPtr	references the structure holding the hardware configuration for the Axi Ethernet core to initialize.
EffectiveAddress	is the processor address used to access the base address of the AXI Ethernet instance. In systems with an MMU and virtual memory, EffectiveAddress is the virtual address mapped to the physical in `ConfigPtr->Config.BaseAddress`. In systems without an active MMU, EffectiveAddress should be set to the same value as `ConfigPtr->Config.BaseAddress`.

Returns: XST_SUCCESS.

Note: None.

References XAxiEthernet_Config::AxiDevBaseAddress, XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::PhyMode, XAxiEthernet_Config::PhyType, and XAxiEthernet_Reset().

Referenced by AxiEthernetExtVlanExample(), AxiEthernetFifoIntrExample(), AxiEthernetMcastExample(), AxiEthernetPingReqExample(), AxiEthernetPolledExample(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaPollExample(), and main().

void XAxiEthernet_ClearBadFrmRcvOption ( XAxiEthernet * InstancePtr )

XAxiEthernet_ClearBadFrmRcvOption is used to disable the bad frame receive option.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: None.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAE_RAF_OFFSET, XAE_RAF_RXBADFRMEN_MASK, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

int XAxiEthernet_ClearExtMulticastGroup	(	XAxiEthernet *	InstancePtr,
		void *	AddressPtr
	)

XAxiEthernet_ClearExtMulticastGroup clears input multicast Ethernet address group from table.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
AddressPtr	is a pointer to the 6-byte Ethernet address to clear.

Returns

XST_SUCCESS on successful completion, returns XST_SUCCESS.
XST_DEVICE_IS_STARTED if the Axi Ethernet device is not stopped
XST_INVALID_PARAM if input MAC address is not between 01:00:5E:00:00:00 and 01:00:5E:7F:FF:FF per RFC1112.

Note

Please reference XAxiEthernet_AddExtMulticastGroup for multicast address index and bit value calculation.

In table, hardware requires to 'index' with bit 22-8, 15 bits in total. The least significant byte/8 bits are considered a group.

There is a scenario that might introduce issues: When multicast tables are programmed initially to accept 01:00:5E:12:34:56 and 01:00:5E:12:34:78 but later decided to clear 01:00:5E:12:34:78. Without validating all possible combinations at the indexed entry, multicast table might be misconfigured and drop frames.

When clearing a multicast address table entry, note that a whole group of mac addresses will no longer be accepted - this because an entry in the table represents multiple(256) mac addresses.

The device must be stopped to use this function.

This API operates at a group (256 MAC addresses) level for hardware to perform the first layer address filtering. It is user's responsibility to provision this table appropriately.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_MCAST_TABLE_OFFSET, XAxiEthernet_IsExtFuncCap, XAxiEthernet_IsExtMcastEnable, and XAxiEthernet_WriteReg.

int XAxiEthernet_ClearOptions	(	XAxiEthernet *	InstancePtr,
		u32	Options
	)

XAxiEthernet_ClearOptions clears the options, Options for the Axi Ethernet, specified by InstancePtr.

Axi Ethernet should be stopped with XAxiEthernet_Stop() before changing options.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Options	is a bitmask of OR'd XAE_*_OPTION values for options to clear. Options not specified are not affected.

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED if the device has not been stopped.

Note: See xaxiethernet.h for a description of the available options.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAxiEthernet::Options, XAE_BROADCAST_OPTION, XAE_FCC_FCRX_MASK, XAE_FCC_OFFSET, XAE_FCS_INSERT_OPTION, XAE_FCS_STRIP_OPTION, XAE_FLOW_CONTROL_OPTION, XAE_FMI_OFFSET, XAE_FMI_PM_MASK, XAE_JUMBO_OPTION, XAE_LENTYPE_ERR_OPTION, XAE_MULTICAST_OPTION, XAE_PROMISC_OPTION, XAE_RAF_BCSTREJ_MASK, XAE_RAF_EMULTIFLTRENBL_MASK, XAE_RAF_MCSTREJ_MASK, XAE_RAF_NEWFNCENBL_MASK, XAE_RAF_OFFSET, XAE_RAF_RXVSTRPMODE_MASK, XAE_RAF_RXVTAGMODE_MASK, XAE_RAF_TXVSTRPMODE_MASK, XAE_RAF_TXVTAGMODE_MASK, XAE_RCW1_FCS_MASK, XAE_RCW1_JUM_MASK, XAE_RCW1_LT_DIS_MASK, XAE_RCW1_OFFSET, XAE_RCW1_RX_MASK, XAE_RCW1_VLAN_MASK, XAE_RECEIVER_ENABLE_OPTION, XAE_TC_FCS_MASK, XAE_TC_JUM_MASK, XAE_TC_OFFSET, XAE_TC_TX_MASK, XAE_TC_VLAN_MASK, XAE_TRANSMITTER_ENABLE_OPTION, XAE_VLAN_OPTION, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetResetDevice(), AxiEthernetSgDmaIntrCoalescingExample(), and AxiEthernetSgDmaIntrExtMulticastExample().

int XAxiEthernet_ClearTpid	(	XAxiEthernet *	InstancePtr,
		u8	Entry
	)

XAxiEthernet_ClearTpid clears the VLAN Tag Protocol Identifier(TPID).

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Entry	is the hardware storage location to program this address and must be between 0..XAE_TPID_MAX_ENTRIES.

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED if the Axi Ethernet device is not stopped.
XST_NO_FEATURE if the Axi Ethernet does not enable or have the VLAN tag capability.

Note: The device must be stopped to use this function.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_TPID0_OFFSET, XAE_TPID1_OFFSET, XAE_TPID_0_MASK, XAE_TPID_1_MASK, XAxiEthernet_IsExtFuncCap, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

void XAxiEthernet_DisableControlFrameLenCheck ( XAxiEthernet * InstancePtr )

XAxiEthernet_DisableControlFrameLenCheck is used to disable the length check for control frames (pause frames).

This means once the API is called, control frames larger than the minimum frame length are accepted.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: None.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAE_RCW1_CL_DIS_MASK, XAE_RCW1_OFFSET, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

void XAxiEthernet_DumpExtMulticastGroup ( XAxiEthernet * InstancePtr )

XAxiEthernet_DumpExtMulticastGroup dumps ALL provisioned acceptable multicast MAC in the Axi Ethernet device's multicast table.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: None.

Note

Hardware requires to 'index' with bit 22-8, 15 bits in total. The least significant byte/8 bits are considered a set.

This API operates at a set (256 MAC addresses) level.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAE_MCAST_TABLE_OFFSET, and XAxiEthernet_ReadReg.

void XAxiEthernet_EnableControlFrameLenCheck ( XAxiEthernet * InstancePtr )

XAxiEthernet_EnableControlFrameLenCheck is used to enable the length check for control frames (pause frames).

After calling the API, all control frames received will be checked for proper length (less than minimum frame length). By default, upon normal start up, control frame length check is enabled. Hence this API needs to be called only if previously the control frame length check has been disabled by calling the API XAxiEthernet_DisableControlFrameLenCheck.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: None.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAE_RCW1_CL_DIS_MASK, XAE_RCW1_OFFSET, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

int XAxiEthernet_GetExtMulticastGroup	(	XAxiEthernet *	InstancePtr,
		void *	AddressPtr
	)

XAxiEthernet_GetExtMulticastGroup returns whether the given Ethernet address group is stored in the table.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
AddressPtr	is a pointer to the 6-byte Ethernet address.

Returns

TRUE if it is an acceptable multicast MAC address and the group is present in the table.
FALSE if it is not a valid multicast MAC address or the group was not found in the table.

Note

In the table, hardware requires to 'index' with bit 22-8, 15 bits in total. The least significant byte/8 bits are considered a group. This API operates at a group (256 MAC addresses) level.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_MCAST_TABLE_OFFSET, and XAxiEthernet_ReadReg.

Referenced by AxiEthernetSgDmaIntrExtMulticastExample().

void XAxiEthernet_GetMacAddress	(	XAxiEthernet *	InstancePtr,
		void *	AddressPtr
	)

XAxiEthernet_GetMacAddress gets the MAC address for the Axi Ethernet, specified by InstancePtr into the memory buffer specified by AddressPtr.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
AddressPtr	references the memory buffer to store the retrieved MAC address. This memory buffer must be at least 6 bytes in length.

Returns: None.

Note

This routine also supports the extended/new VLAN and multicast mode. The XAE_RAF_NEWFNCENBL_MASK bit dictates which offset will be configured.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_UAW0_OFFSET, XAE_UAW1_OFFSET, XAE_UAWL_OFFSET, XAE_UAWU_OFFSET, XAxiEthernet_IsExtFuncCap, and XAxiEthernet_ReadReg.

Referenced by AxiEthernetResetDevice().

void XAxiEthernet_GetMacPauseAddress	(	XAxiEthernet *	InstancePtr,
		void *	AddressPtr
	)

XAxiEthernet_GetMacPauseAddress gets the MAC address used for pause frames for the Axi Ethernet device specified by InstancePtr.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
AddressPtr	references the memory buffer to store the retrieved MAC address. This memory buffer must be at least 6 bytes in length.

Returns: None.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_RCW0_OFFSET, XAE_RCW1_OFFSET, and XAxiEthernet_ReadReg.

u16 XAxiEthernet_GetOperatingSpeed ( XAxiEthernet * InstancePtr )

XAxiEthernet_GetOperatingSpeed gets the current operating link speed.

This may be the value set by XAxiEthernet_SetOperatingSpeed() or a hardware default.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: Returns the link speed in units of megabits per second (10 / 100 / 1000). Can return a value of 0, in case it does not get a valid speed from EMMC.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_EMMC_LINKSPD_10, XAE_EMMC_LINKSPD_100, XAE_EMMC_LINKSPD_1000, XAE_EMMC_LINKSPEED_MASK, XAE_EMMC_OFFSET, XAE_SPEED_1000_MBPS, XAE_SPEED_100_MBPS, XAE_SPEED_10_MBPS, and XAxiEthernet_ReadReg.

u32 XAxiEthernet_GetOptions ( XAxiEthernet * InstancePtr )

XAxiEthernet_GetOptions returns the current option settings.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: Returns a bitmask of XAE_*_OPTION constants, each bit specifying an option that is currently active.

Note: See xaxiethernet.h for a description of the available options.

References XAxiEthernet::IsReady, and XAxiEthernet::Options.

Referenced by AxiEthernetResetDevice().

int XAxiEthernet_GetRgmiiStatus	(	XAxiEthernet *	InstancePtr,
		u16 *	SpeedPtr,
		int *	IsFullDuplexPtr,
		int *	IsLinkUpPtr
	)

XAxiEthernet_GetRgmiiStatus get the state of the link when using the RGMII media interface.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
SpeedPtr	references the location to store the result, which is the auto negotiated link speed in units of Mbits/sec, either 0, 10, 100, or 1000.
IsFullDuplexPtr	references the value that is set by this function to indicate full duplex operation. IsFullDuplexPtr is set to TRUE when the RGMII link is operating in full duplex mode, otherwise it is set to FALSE.
IsLinkUpPtr	references the value that is set by this function to indicate the link status.IsLinkUpPtr is set to TRUE when the RGMII link up, otherwise it is set to FALSE.

Returns

XST_SUCCESS on successful completion.
XST_NO_FEATURE if the Axi Ethernet device is not using an RGMII interface,

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_PHYC_OFFSET, XAE_PHYC_RGLINKSPD_10, XAE_PHYC_RGLINKSPD_100, XAE_PHYC_RGLINKSPD_1000, XAE_PHYC_RGMIIHD_MASK, XAE_PHYC_RGMIILINK_MASK, XAE_PHYC_RGMIILINKSPEED_MASK, XAE_SPEED_1000_MBPS, XAE_SPEED_100_MBPS, XAE_SPEED_10_MBPS, XAxiEthernet_GetPhysicalInterface, and XAxiEthernet_ReadReg.

int XAxiEthernet_GetSgmiiStatus	(	XAxiEthernet *	InstancePtr,
		u16 *	SpeedPtr
	)

XAxiEthernet_GetSgmiiStatus get the state of the link when using the SGMII media interface.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
SpeedPtr	references the location to store the result, which is the auto negotiated link speed in units of Mbits/sec, either 0, 10, 100, or 1000.

Returns

XST_SUCCESS on successful completion.
XST_NO_FEATURE if the Axi Ethernet device is not using an SGMII interface,

Note: Currently SGMII PHY does not support half duplex mode.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_PHYC_OFFSET, XAE_PHYC_SGLINKSPD_10, XAE_PHYC_SGLINKSPD_100, XAE_PHYC_SGLINKSPD_1000, XAE_PHYC_SGMIILINKSPEED_MASK, XAE_SPEED_1000_MBPS, XAE_SPEED_100_MBPS, XAE_SPEED_10_MBPS, XAxiEthernet_GetPhysicalInterface, and XAxiEthernet_ReadReg.

void XAxiEthernet_GetTpid	(	XAxiEthernet *	InstancePtr,
		u16 *	TpidPtr,
		u8	Entry
	)

XAxiEthernet_GetTpid gets the VLAN Tag Protocol Identifier value (TPID).

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
TpidPtr	references the location to store the result.
Entry	is the hardware storage location to program this address and must be between 0..XAE_TPID_MAX_ENTRIES.

Returns: None.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_TPID0_OFFSET, XAE_TPID1_OFFSET, XAE_TPID_0_MASK, and XAxiEthernet_ReadReg.

void XAxiEthernet_GetVidTable	(	XAxiEthernet *	InstancePtr,
		u32	Entry,
		u32 *	VidPtr,
		u8 *	StripPtr,
		u8 *	TagPtr,
		int	Dir
	)

XAxiEthernet_GetVidTable gets VID table content includes new VLAN ID, strip and tag enable bits.

The device must be stopped to use this function.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Entry	is the hardware storage location/index to program updated VID value, strip, or tag value. The value must be between 0..0xFFF.
VidPtr	references the location to store the result. This function stores the Vid value indexed by Entry into this location.
StripPtr	references the location to store the result. This function stores the strip enable bit value indexed by Entry into this location.
TagPtr	references the location to store the result. This function stores the tag enable bit value indexed by Entry into this location.
Dir	must be either XAE_TX or XAE_RX.

Returns: None.

Note

The hardware requires the table to be 'indexed' with Entry and must be 0x000..0xFFF.

Bits layout is bbbb bbbb bbbb b b VLAN ID (12b), | | | VLAN double tag enable bit VLAN strip enable bit

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_MAX_VLAN_TABL_ENTRY, XAE_RX_VLAN_DATA_OFFSET, XAE_TX_VLAN_DATA_OFFSET, XAE_VLAN_TABL_STRP_ENTRY_MASK, XAE_VLAN_TABL_STRP_STRT_OFFSET, XAE_VLAN_TABL_TAG_ENTRY_MASK, XAE_VLAN_TABL_VID_START_OFFSET, and XAxiEthernet_ReadReg.

void XAxiEthernet_GetVStripMode	(	XAxiEthernet *	InstancePtr,
		u8 *	ModePtr,
		int	Dir
	)

XAxiEthernet_GetVStripMode gets the VLAN stripping mode.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
ModePtr	references the location to store the VLAN strip mode returned by this function. Value is b'00, b'01 or b'11. Refer XAE_VTSRAP_* in xaxiethernet.h file for the details.
Dir	must be either XAE_TX or XAE_RX.

Returns: None.

Note

Mode value shifting is handled in this function. No shifting is required to call this function.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_RAF_OFFSET, XAE_RAF_RXVSTRPMODE_MASK, XAE_RAF_RXVSTRPMODE_SHIFT, XAE_RAF_TXVSTRPMODE_MASK, XAE_RAF_TXVSTRPMODE_SHIFT, and XAxiEthernet_ReadReg.

void XAxiEthernet_GetVTagMode	(	XAxiEthernet *	InstancePtr,
		u8 *	ModePtr,
		int	Dir
	)

XAxiEthernet_GetVTagMode gets VLAN tagging mode.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
ModePtr	references the location to store the VLAN tag mode. Value is between b'00-b'11.
Dir	must be either XAE_TX or XAE_RX.

Returns: None.

Note

The device must be stopped to use this function.

Mode value shifting is handled in this function. No shifting is required to call this function.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_RAF_OFFSET, XAE_RAF_RXVTAGMODE_MASK, XAE_RAF_RXVTAGMODE_SHIFT, XAE_RAF_TXVTAGMODE_MASK, XAE_RAF_TXVTAGMODE_SHIFT, and XAxiEthernet_ReadReg.

void XAxiEthernet_GetVTagValue	(	XAxiEthernet *	InstancePtr,
		u32 *	VTagValuePtr,
		int	Dir
	)

XAxiEthernet_GetVTagValue gets the configured VLAN tagging value.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
VTagValuePtr	references the location to store the result. Format is TPID, one of the following 16 bit values, 0x8100, 0x88a8, 0x9100, 0x9200. Priority, 3 bits CFI, 1 bit VID, 12 bits
Dir	must be either XAE_TX or XAE_RX.

Returns: None.

Note

Ethernet VLAN frames' VLAN type/length(2B) and tag control information(2B). Bit layout : bbbb bbbb bbbb bbbb bbb b bbbb bbbb bbbb \ / | | \ VID (12b) / \ / | CFI bit (1b) TPID (16b) priority bit (3b)

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_RTAG_OFFSET, XAE_TTAG_OFFSET, and XAxiEthernet_ReadReg.

int XAxiEthernet_Initialize	(	XAxiEthernet *	InstancePtr,
		XAxiEthernet_Config *	CfgPtr,
		UINTPTR	EffectiveAddress
	)

XAxiEthernet_Initialize initializes an AXI Ethernet device along with the InstancePtr that references it.

The PHY is setup independently from the Ethernet core. Use the MII or whatever other interface may be present for setup.

Parameters

InstancePtr	references the memory instance to be associated with the AXI Ethernet core instance upon initialization.
CfgPtr	references the structure holding the hardware configuration for the Axi Ethernet core to initialize.
EffectiveAddress	is the processor address used to access the base address of the AXI Ethernet instance. In systems with an MMU and virtual memory, EffectiveAddress is the virtual address mapped to the physical in `ConfigPtr->Config.BaseAddress`. In systems without an active MMU, EffectiveAddress should be set to the same value as `ConfigPtr->Config.BaseAddress`.

Returns: XST_SUCCESS.

Note: When user calls this function he should ensure the hardware is in a quiescent state by resetting all the hardware Configurations.

References XAxiEthernet_Config::AxiDevBaseAddress, XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, and XAxiEthernet::IsReady.

XAxiEthernet_Config * XAxiEthernet_LookupConfig ( u16 DeviceId )

XAxiEthernet_LookupConfig returns a reference to an XAxiEthernet_Config structure based on an unique device id, DeviceId.

The return value will refer to an entry in the device configuration table defined in the xaxiethernet_g.c file.

Parameters

DeviceId is the unique device ID of the device for the lookup operation.

Returns

Returns a reference to a config record in the configuration table (in xaxiethernet_g.c) corresponding to DeviceId, or NULL
NULL if no match is found.

Referenced by AxiEthernetExtVlanExample(), AxiEthernetFifoIntrExample(), AxiEthernetMcastExample(), AxiEthernetPingReqExample(), AxiEthernetPolledExample(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaPollExample(), and main().

int XAxiEthernet_MulticastAdd	(	XAxiEthernet *	InstancePtr,
		void *	AddressPtr,
		int	Entry
	)

XAxiEthernet_MulticastAdd adds the Ethernet address, AddressPtr to the Axi Ethernet device's multicast filter list, at list index Entry.

The address referenced by AddressPtr may be of any unicast, multicast, or broadcast address form. The hardware for the Axi Ethernet device can hold up to C_Number_of_Table_Entries addresses in this filter list.

The device must be stopped to use this function.

Once an Ethernet address is programmed, the Axi Ethernet device will begin receiving data sent from that address. The Axi Ethernet hardware does not have a control bit to disable multicast filtering. The only way to prevent the Axi Ethernet device from receiving messages from an Ethernet address in the Multicast Address Table (MAT) is to clear it with XAxiEthernet_MulticastClear().

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
AddressPtr	is a pointer to the 6-byte Ethernet address to set. The previous address at the location Entry (if any) is overwritten with the value at AddressPtr.
Entry	is the hardware storage location to program this address and must be between 0 to (C_Number_of_Table_Entries - 1).

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED.if the Axi Ethernet device is not stopped.

Note

This routine works only with normal multicast filtering feature. A maximum of 4 multicast addresses can be stored in the HW provided multicast table.

To use the extended multicast feature, extended multicast filtering must be enabled by using driver API XAxiEthernet_SetOptions with proper option fields set. Once extended multicast filtering is enabled, the APIs XAxiEthernet_[Add|Clear|Get]ExtMulticastGroup() must be used to manage multicast address groups.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_AF0_OFFSET, XAE_AF1_OFFSET, XAE_FMI_OFFSET, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

int XAxiEthernet_MulticastClear	(	XAxiEthernet *	InstancePtr,
		int	Entry
	)

XAxiEthernet_MulticastClear clears the Ethernet address stored at index Entry in the Axi Ethernet device's multicast filter list.

The device must be stopped to use this function.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Entry	is the HW storage location used when this address was added. It must be between 0 to (C_Number_of_Table_Entries - 1).

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED.if the Axi Ethernet device is not stopped.

Note

This routine works only with normal multicast filtering feature. A maximum of 4 multicast addresses can be stored in the HW provided multicast table.

To use the extended multicast feature, extended multicast filtering must be enabled by using driver API XAxiEthernet_SetOptions with proper option fields set. Once extended multicast filtering is enabled, the APIs XAxiEthernet_[Add|Clear|Get]ExtMulticastGroup() must be used to manage multicast address groups.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_AF0_OFFSET, XAE_AF1_OFFSET, XAE_FMI_OFFSET, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

void XAxiEthernet_MulticastGet	(	XAxiEthernet *	InstancePtr,
		void *	AddressPtr,
		int	Entry
	)

XAxiEthernet_MulticastGet gets the Ethernet address stored at index Entry in the Axi Ethernet device's multicast filter list.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
AddressPtr	references the memory buffer to store the retrieved Ethernet address. This memory buffer must be at least 6 bytes in length.
Entry	is the hardware storage location from which to retrieve the address and must be between 0 to (C_Number_of_Table_Entries - 1)

Returns: None.

Note

This routine works only with normal multicast filtering feature. A maximum of 4 multicast addresses can be stored in the HW provided multicast table.

To use the extended multicast feature, extended multicast filtering must be enabled by using driver API XAxiEthernet_SetOptions with proper option fields set. Once extended multicast filtering is enabled, the APIs XAxiEthernet_[Add|Clear|Get]ExtMulticastGroup() must be used to manage multicast address groups.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_AF0_OFFSET, XAE_AF1_OFFSET, XAE_FMI_OFFSET, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

void XAxiEthernet_PhySetMdioDivisor	(	XAxiEthernet *	InstancePtr,
		u8	Divisor
	)

XAxiEthernet_PhySetMdioDivisor sets the MDIO clock divisor in the Axi Ethernet,specified by InstancePtr to the value, Divisor.

This function must be called once after each reset prior to accessing MII PHY registers.

From the Virtex-6(TM) and Spartan-6 (TM) Embedded Tri-Mode Ethernet MAC User's Guide, the following equation governs the MDIO clock to the PHY:

                        f[HOSTCLK]
      f[MDC] = -----------------------
                (1 + Divisor) * 2

where f[HOSTCLK] is the bus clock frequency in MHz, and f[MDC] is the MDIO clock frequency in MHz to the PHY. Typically, f[MDC] should not exceed 2.5 MHz. Some PHYs can tolerate faster speeds which means faster access.

Parameters

InstancePtr	references the Axi Ethernet instance on which to operate.
Divisor	is the divisor value to set within the range of 0 to XAE_MDIO_MC_CLK_DVD_MAX.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_MDIO_MC_CLOCK_DIVIDE_MAX, XAE_MDIO_MC_MDIOEN_MASK, XAE_MDIO_MC_OFFSET, and XAxiEthernet_WriteReg.

void XAxiEthernet_Reset ( XAxiEthernet * InstancePtr )

XAxiEthernet_Reset does not perform a soft reset of the AxiEthernet core.

AxiEthernet hardware is reset by the device connected to the AXI4-Stream interface. This function inserts some delay before proceeding to check for MgtRdy bit. The delay is necessary to be at a safe side. It takes a while for the reset process to complete and for any of the AxiEthernet registers to be accessed. It then checks for MgtRdy bit in IS register to know if AxiEthernet reset is completed or not. Subsequently it calls one more driver function to complete the AxiEthernet hardware initialization.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Note: It is the responsibility of the user to reset the AxiEthernet hardware before using it. AxiEthernet hardware should be reset through the device connected to the AXI4-Stream interface of AxiEthernet.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::Options, XAE_DEFAULT_OPTIONS, XAE_INT_MGTRDY_MASK, XAE_IS_OFFSET, XAE_RST_DEFAULT_TIMEOUT_VAL, and XAxiEthernet_Stop().

Referenced by AxiEthernetResetDevice(), and XAxiEthernet_CfgInitialize().

int XAxiEthernet_SendPausePacket	(	XAxiEthernet *	InstancePtr,
		u16	PauseValue
	)

XAxiEthernet_SendPausePacket sends a pause packet with the value of PauseValue.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
PauseValue	is the pause value in units of 512 bit times.

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED if the Axi Ethernet device is not stopped.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_TPF_OFFSET, XAE_TPF_TPFV_MASK, and XAxiEthernet_WriteReg.

void XAxiEthernet_SetBadFrmRcvOption ( XAxiEthernet * InstancePtr )

XAxiEthernet_SetBadFrmRcvOption is used to enable the bad frame receive option.

If enabled, this option ensures that bad receive frames are allowed and passed to the AXI4-Stream interface as if they are good frames.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: None.

Note: None

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAE_RAF_OFFSET, XAE_RAF_RXBADFRMEN_MASK, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

int XAxiEthernet_SetMacAddress	(	XAxiEthernet *	InstancePtr,
		void *	AddressPtr
	)

XAxiEthernet_SetMacAddress sets the MAC address for the Axi Ethernet device, specified by InstancePtr to the MAC address specified by AddressPtr.

The Axi Ethernet device must be stopped before calling this function.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
AddressPtr	is a reference to the 6-byte MAC address to set.

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED if the Axi Ethernet device has not stopped,

Note: This routine also supports the extended/new VLAN and multicast mode. The XAE_RAF_NEWFNCENBL_MASK bit dictates which offset will be configured.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_UAW0_OFFSET, XAE_UAW1_OFFSET, XAE_UAW1_UNICASTADDR_MASK, XAE_UAWL_OFFSET, XAE_UAWU_OFFSET, XAxiEthernet_IsExtFuncCap, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetExtVlanExample(), AxiEthernetFifoIntrExample(), AxiEthernetMcastExample(), AxiEthernetPingReqExample(), AxiEthernetPolledExample(), AxiEthernetResetDevice(), AxiEthernetSgDmaIntrExample(), AxiEthernetSgDmaIntrExtMulticastExample(), AxiEthernetSgDmaIntrMultiFrameExample(), AxiEthernetSgDmaIntrSingleFrameExample(), and AxiEthernetSgDmaSingleFrameExample().

int XAxiEthernet_SetMacPauseAddress	(	XAxiEthernet *	InstancePtr,
		void *	AddressPtr
	)

XAxiEthernet_SetMacPauseAddress sets the MAC address used for pause frames to AddressPtr.

AddressPtr will be the address the Axi Ethernet device will recognize as being for pause frames. Pause frames transmitted with XAxiEthernet_SendPausePacket() will also use this address.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
AddressPtr	is a pointer to the 6-byte Ethernet address to set.

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED if the Axi Ethernet device is not stopped.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_RCW0_OFFSET, XAE_RCW1_OFFSET, XAE_RCW1_PAUSEADDR_MASK, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

int XAxiEthernet_SetOperatingSpeed	(	XAxiEthernet *	InstancePtr,
		u16	Speed
	)

XAxiEthernet_SetOperatingSpeed sets the current operating link speed.

For any traffic to be passed, this speed must match the current MII/GMII/SGMII/RGMII link speed.

Parameters

InstancePtr	references the Axi Ethernet on which to operate.
Speed	is the speed to set in units of Mbps. Valid values are 10, 100, or 1000.

Returns

- XST_SUCCESS on successful setting of speed.

XST_FAILURE, if the speed cannot be set for the present harwdare configuration.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAE_EMMC_LINKSPD_100, XAE_EMMC_LINKSPD_1000, XAE_EMMC_LINKSPEED_MASK, XAE_EMMC_OFFSET, XAE_SPEED_1000_MBPS, XAE_SPEED_100_MBPS, XAE_SPEED_10_MBPS, XAE_SPEED_2500_MBPS, XAxiEthernet_GetPhysicalInterface, XAxiEthernet_GetTemacType, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetExtVlanExample(), AxiEthernetFifoIntrExample(), AxiEthernetMcastExample(), AxiEthernetPolledExample(), AxiEthernetSgDmaIntrExample(), and AxiEthernetSgDmaPollExample().

int XAxiEthernet_SetOptions	(	XAxiEthernet *	InstancePtr,
		u32	Options
	)

XAxiEthernet_SetOptions enables the options, Options for the Axi Ethernet, specified by InstancePtr.

Axi Ethernet should be stopped with XAxiEthernet_Stop() before changing options.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Options	is a bitmask of OR'd XAE_*_OPTION values for options to set. Options not specified are not affected.

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED if the device has not been stopped.

Note: See xaxiethernet.h for a description of the available options.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAxiEthernet::Options, XAE_BROADCAST_OPTION, XAE_DEFAULT_OPTIONS, XAE_FCC_FCRX_MASK, XAE_FCC_OFFSET, XAE_FCS_INSERT_OPTION, XAE_FCS_STRIP_OPTION, XAE_FLOW_CONTROL_OPTION, XAE_FMI_OFFSET, XAE_FMI_PM_MASK, XAE_JUMBO_OPTION, XAE_LENTYPE_ERR_OPTION, XAE_MULTICAST_OPTION, XAE_PROMISC_OPTION, XAE_RAF_BCSTREJ_MASK, XAE_RAF_EMULTIFLTRENBL_MASK, XAE_RAF_MCSTREJ_MASK, XAE_RAF_NEWFNCENBL_MASK, XAE_RAF_OFFSET, XAE_RAF_RXVSTRPMODE_MASK, XAE_RAF_RXVSTRPMODE_SHIFT, XAE_RAF_RXVTAGMODE_MASK, XAE_RAF_RXVTAGMODE_SHIFT, XAE_RAF_TXVSTRPMODE_MASK, XAE_RAF_TXVSTRPMODE_SHIFT, XAE_RAF_TXVTAGMODE_MASK, XAE_RAF_TXVTAGMODE_SHIFT, XAE_RCW1_FCS_MASK, XAE_RCW1_JUM_MASK, XAE_RCW1_LT_DIS_MASK, XAE_RCW1_OFFSET, XAE_RCW1_RX_MASK, XAE_RCW1_VLAN_MASK, XAE_RECEIVER_ENABLE_OPTION, XAE_TC_FCS_MASK, XAE_TC_JUM_MASK, XAE_TC_OFFSET, XAE_TC_TX_MASK, XAE_TC_VLAN_MASK, XAE_TRANSMITTER_ENABLE_OPTION, XAE_VLAN_OPTION, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetPingReqExample(), AxiEthernetResetDevice(), AxiEthernetSgDmaFullChecksumOffloadExample(), AxiEthernetSgDmaIntrCoalescingExample(), AxiEthernetSgDmaIntrExtMulticastExample(), AxiEthernetSgDmaIntrExtVlanExample(), AxiEthernetSgDmaIntrMultiFrameExample(), AxiEthernetSgDmaIntrSingleFrameExample(), AxiEthernetSgDmaMultiFrameExample(), AxiEthernetSgDmaPartialChecksumOffloadExample(), and AxiEthernetSgDmaSingleFrameExample().

int XAxiEthernet_SetTpid	(	XAxiEthernet *	InstancePtr,
		u16	Tpid,
		u8	Entry
	)

XAxiEthernet_SetTpid sets the VLAN Tag Protocol Identifier(TPID).

Four values can be configured - 0x8100, 0x9100, 0x9200, 0x88A8.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Tpid	is a hex value to be added to the TPID table. The four values that can be added are 0x8100, 0x9100, 0x9200, 0x88A8.
Entry	is the hardware storage location to program this address and must be between 0..XAE_TPID_MAX_ENTRIES.

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED, if the Axi Ethernet device is not stopped.
XST_NO_FEATURE if the Axi Ethernet does not enable or have the VLAN tag capability.
XST_INVALID_PARAM if Tpid is not one of supported values.

Note: The device must be stopped to use this function.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_TPID0_OFFSET, XAE_TPID1_OFFSET, XAE_TPID_0_MASK, XAE_TPID_1_MASK, XAxiEthernet_IsExtFuncCap, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetSgDmaIntrExtVlanExample().

int XAxiEthernet_SetVidTable	(	XAxiEthernet *	InstancePtr,
		u32	Entry,
		u32	Vid,
		u8	Strip,
		u8	Tag,
		int	Dir
	)

XAxiEthernet_SetVidTable sets VID table includes new VLAN ID, strip and tag enable bits.

The device must be stopped to use this function.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Entry	is the hardware storage location/index to program updated VID value, strip, or tag value. The value must be between 0..0xFFF.
Vid	is updated/translated Vid value to be programmed.
Strip	is strip enable indication for Vid.
Tag	is tag enable indication for Vid.
Dir	must be either XAE_TX or XAE_RX.

Returns

XST_SUCCESS on successful completion.
XST_DEVICE_IS_STARTED if the Axi Ethernet device is not stopped.
XST_NO_FEATURE if the Axi Ethernet does not enable/have extended functionalities.

Note

The hardware requires the table to be 'indexed' with Entry and must be 0x000..0xFFF.

Bits layout is bbbb bbbb bbbb b b VLAN ID (12b), | | | VLAN double tag enable bit VLAN strip enable bit

To disable translation indexed by Entry, Set Vid = Entry.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_MAX_VLAN_TABL_ENTRY, XAE_RX_VLAN_DATA_OFFSET, XAE_TX_VLAN_DATA_OFFSET, XAE_VLAN_TABL_STRP_FLD_LEN, XAE_VLAN_TABL_STRP_STRT_OFFSET, XAE_VLAN_TABL_TAG_FLD_LEN, XAE_VLAN_TABL_VID_START_OFFSET, XAxiEthernet_IsExtFuncCap, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetSgDmaIntrExtVlanExample().

int XAxiEthernet_SetVStripMode	(	XAxiEthernet *	InstancePtr,
		u32	Mode,
		int	Dir
	)

XAxiEthernet_SetVStripMode configures the VLAN strip mode.

Three modes can be configured :

XAE_VSTRP_NONE for no stripping.
XAE_VSTRP_ALL to strip one tag from all frames.
XAE_VSTRP_SELECT to strip one tag from already selected tagged frames based on VID value.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Mode	is the VLAN strip mode. Value must be b'00, b'01, or b'11.
Dir	must be either XAE_TX or XAE_RX.

Returns

XST_SUCCESS on successful completion., returns XST_SUCCESS.
XST_DEVICE_IS_STARTED if the Axi Ethernet device is not stopped.
XST_NO_FEATURE if the Axi Ethernet does not enable or have the TX VLAN strip capability.
XST_INVALID_PARAM if Mode is not one of supported modes.

Note

The device must be stopped to use this function.

The third mode (specified by XAE_VSTRP_SELECT) requires a method for specifying which tagged frames should be stripped. The VLAN translation table 'stripped enabled' is referenced. That configuration is handled in XAxiEthernet_SetVidTable().

Mode value shifting is handled in this function. No shifting is required to call this function.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_RAF_OFFSET, XAE_RAF_RXVSTRPMODE_MASK, XAE_RAF_RXVSTRPMODE_SHIFT, XAE_RAF_TXVSTRPMODE_MASK, XAE_RAF_TXVSTRPMODE_SHIFT, XAxiEthernet_IsExtFuncCap, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetSgDmaIntrExtVlanExample().

int XAxiEthernet_SetVTagMode	(	XAxiEthernet *	InstancePtr,
		u32	Mode,
		int	Dir
	)

XAxiEthernet_SetVTagMode configures the VLAN tagging mode.

Four modes can be configured,

XAE_VTAG_NONE for no tagging.
XAE_VTAG_ALL to tag all frames.
XAE_VTAG_EXISTED to tag already tagged frames.
XAE_VTAG_SELECT to tag selected already tagged frames based on VID value.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
Mode	is the VLAN tag mode. Value must be between b'00-b'11.
Dir	must be either XAE_TX or XAE_RX.

Returns

XST_SUCCESS. on successful completion.
XST_DEVICE_IS_STARTED if the Axi Ethernet device is not stopped.
XST_NO_FEATURE if the Axi Ethernet does not enable or have the TX VLAN tag capability.
XST_INVALID_PARAM if Mode is not one of supported modes.

Note

The device must be stopped to use this function.

The fourth mode (specified by XAE_VTAG_SELECT) requires a method for specifying which tagged frames should receive an additional VLAN tag. The VLAN translation table 'tag enabled' is referenced. That configuration is handled in XAxiEthernet_SetVidTable().

Mode value shifting is handled in this function. No shifting is required to call this function.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_RAF_OFFSET, XAE_RAF_RXVTAGMODE_MASK, XAE_RAF_RXVTAGMODE_SHIFT, XAE_RAF_TXVTAGMODE_MASK, XAE_RAF_TXVTAGMODE_SHIFT, XAxiEthernet_IsExtFuncCap, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetSgDmaIntrExtVlanExample().

int XAxiEthernet_SetVTagValue	(	XAxiEthernet *	InstancePtr,
		u32	VTagValue,
		int	Dir
	)

XAxiEthernet_SetVTagValue configures the VLAN tagging value.

The device must be stopped to use this function.

Parameters

InstancePtr	is a pointer to the Axi Ethernet instance to be worked on.
VTagValue	is the VLAN tag value to be configured. A 32bit value. TPID, one of the following 16 bit values, 0x8100, 0x88a8, 0x9100, 0x9200. Priority, 3 bits CFI, 1 bit VID, 12 bits
Dir	must be either XAE_TX or XAE_RX.

Returns

XST_SUCCESS on successful completion, returns .
XST_DEVICE_IS_STARTED if the Axi Ethernet device is not stopped.
XST_NO_FEATURE if the Axi Ethernet does not enable/have TX VLAN tag capability.
XST_INVALID_PARAM, if the TPID is not one the four supported values.

Note

The four supported TPID values are 0x8100, 0x88a8, 0x9100, 0x9200. XAxiEthernet_SetVTagValue performs verification on TPID only.

Ethernet VLAN frames' VLAN type/length(2B) and tag control information(2B). Bit layout : bbbb bbbb bbbb bbbb bbb b bbbb bbbb bbbb \ / | | \ VID (12b) / \ / | CFI bit (1b) TPID (16b) priority bit (3b)

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_RTAG_OFFSET, XAE_TTAG_OFFSET, XAxiEthernet_IsExtFuncCap, and XAxiEthernet_WriteReg.

Referenced by AxiEthernetSgDmaIntrExtVlanExample().

void XAxiEthernet_Start ( XAxiEthernet * InstancePtr )

XAxiEthernet_Start starts the Axi Ethernet device as follows:

  - Enable transmitter if XAE_TRANSMIT_ENABLE_OPTION is set
  - Enable receiver if XAE_RECEIVER_ENABLE_OPTION is set

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: None.

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAxiEthernet::Options, XAE_RCW1_OFFSET, XAE_RCW1_RX_MASK, XAE_RECEIVER_ENABLE_OPTION, XAE_TC_OFFSET, XAE_TC_TX_MASK, XAE_TRANSMITTER_ENABLE_OPTION, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

void XAxiEthernet_Stop ( XAxiEthernet * InstancePtr )

XAxiEthernet_Stop gracefully stops the Axi Ethernet device as follows:

  - Disable all interrupts from this device
  - Disable the receiver

XAxiEthernet_Stop does not modify any of the current device options.

Since the transmitter is not disabled, frames currently in internal buffers or in process by a DMA engine are allowed to be transmitted.

Parameters

InstancePtr is a pointer to the Axi Ethernet instance to be worked on.

Returns: None

Note: None.

References XAxiEthernet_Config::BaseAddress, XAxiEthernet::Config, XAxiEthernet::IsReady, XAxiEthernet::IsStarted, XAE_IE_OFFSET, XAE_INT_RXRJECT_MASK, XAE_IP_OFFSET, XAE_IS_OFFSET, XAE_RCW1_OFFSET, XAE_RCW1_RX_MASK, XAxiEthernet_ReadReg, and XAxiEthernet_WriteReg.

Data Structures

Macros

Typedefs

Functions

Configuration options

Axi Ethernet registers offset

Reset and Address Filter (RAF) Register bit definitions.

Transmit Pause Frame Register (TPF) bit definitions

Transmit Inter-Frame Gap Adjustment Register (TFGP) bit definitions

Interrupt Status/Enable/Mask Registers bit definitions

TPID Register (TPID) bit definitions

Receive Configuration Word 1 (RCW1) Register bit definitions

Transmitter Configuration (TC) Register bit definitions

Flow Control Configuration (FCC) Register Bit definitions

Ethernet MAC Mode Configuration (EMMC) Register bit definitions

RGMII/SGMII Configuration (PHYC) Register bit definitions

MDIO Management Configuration (MC) Register bit definitions

MDIO Management Control Register (MCR) Register bit definitions

MDIO Interrupt Enable/Mask/Status Registers bit definitions

Axi Ethernet Unicast Address Register Word 1 (UAW1) Register Bit

Filter Mask Index (FMI) Register bit definitions

Extended multicast buffer descriptor bit mask

Axi Ethernet Multicast Address Register Word 1 (MAW1)

Other Constant definitions used in the driver

Macro Definition Documentation

Typedef Documentation

Function Documentation