Data Structures
struct	XBram_Config
	This typedef contains configuration information for the device. More...

struct	XBram
	The XBram driver instance data. More...

Macros
#define	XBram_WriteReg(BaseAddress, RegOffset, Data) XBram_Out32((BaseAddress) + (RegOffset), (u32)(Data))
	Write a value to a BRAM register. More...

#define	XBram_ReadReg(BaseAddress, RegOffset) XBram_In32((BaseAddress) + (RegOffset))
	Read a value from a BRAM register. More...

Functions
int	XBram_CfgInitialize (XBram InstancePtr, XBram_Config Config, UINTPTR EffectiveAddr)
	Initialize the XBram instance provided by the caller based on the given configuration data. More...

XBram_Config *	XBram_LookupConfig (u16 DeviceId)
	Lookup the device configuration based on the unique device ID. More...

int	XBram_SelfTest (XBram *InstancePtr, u8 IntMask)
	Run a self-test on the driver/device. More...

void	XBram_InterruptEnable (XBram *InstancePtr, u32 Mask)
	Enable interrupts. More...

void	XBram_InterruptDisable (XBram *InstancePtr, u32 Mask)
	Disable interrupts. More...

void	XBram_InterruptClear (XBram *InstancePtr, u32 Mask)
	Clear pending interrupts with the provided mask. More...

u32	XBram_InterruptGetEnabled (XBram *InstancePtr)
	Returns the interrupt enable mask. More...

u32	XBram_InterruptGetStatus (XBram *InstancePtr)
	Returns the status of interrupt signals. More...

Variables
XBram_Config	XBram_ConfigTable []
	This table contains configuration information for each BRAM device in the system. More...

XBram_Config	XBram_ConfigTable []
	This table contains configuration information for each BRAM device in the system. More...

Registers
Register offsets for this device.
#define	XBRAM_ECC_STATUS_OFFSET 0x0
	ECC status Register. More...

#define	XBRAM_ECC_EN_IRQ_OFFSET 0x4
	ECC interrupt enable Register. More...

#define	XBRAM_ECC_ON_OFF_OFFSET 0x8
	ECC on/off register. More...

#define	XBRAM_CE_CNT_OFFSET 0xC
	Correctable error counter Register. More...

#define	XBRAM_CE_FFD_0_OFFSET 0x100
	Correctable error first failing data Register, 31-0. More...

#define	XBRAM_CE_FFD_1_OFFSET 0x104
	Correctable error first failing data Register, 63-32. More...

#define	XBRAM_CE_FFD_2_OFFSET 0x108
	Correctable error first failing data Register, 95-64. More...

#define	XBRAM_CE_FFD_3_OFFSET 0x10C
	Correctable error first failing data Register, 127-96. More...

#define	XBRAM_CE_FFD_4_OFFSET 0x110
	Correctable error first failing data Register, 159-128. More...

#define	XBRAM_CE_FFD_5_OFFSET 0x114
	Correctable error first failing data Register, 191-160. More...

#define	XBRAM_CE_FFD_6_OFFSET 0x118
	Correctable error first failing data Register, 223-192. More...

#define	XBRAM_CE_FFD_7_OFFSET 0x11C
	Correctable error first failing data Register, 255-224. More...

#define	XBRAM_CE_FFD_8_OFFSET 0x120
	Correctable error first failing data Register, 287-256. More...

#define	XBRAM_CE_FFD_9_OFFSET 0x124
	Correctable error first failing data Register, 319-288. More...

#define	XBRAM_CE_FFD_10_OFFSET 0x128
	Correctable error first failing data Register, 351-320. More...

#define	XBRAM_CE_FFD_11_OFFSET 0x12C
	Correctable error first failing data Register, 383-352. More...

#define	XBRAM_CE_FFD_12_OFFSET 0x130
	Correctable error first failing data Register, 415-384. More...

#define	XBRAM_CE_FFD_13_OFFSET 0x134
	Correctable error first failing data Register, 447-416. More...

#define	XBRAM_CE_FFD_14_OFFSET 0x138
	Correctable error first failing data Register, 479-448. More...

#define	XBRAM_CE_FFD_15_OFFSET 0x13C
	Correctable error first failing data Register, 511-480. More...

#define	XBRAM_CE_FFD_16_OFFSET 0x140
	Correctable error first failing data Register, 543-512. More...

#define	XBRAM_CE_FFD_17_OFFSET 0x144
	Correctable error first failing data Register, 575-544. More...

#define	XBRAM_CE_FFD_18_OFFSET 0x148
	Correctable error first failing data Register, 607-576. More...

#define	XBRAM_CE_FFD_19_OFFSET 0x14C
	Correctable error first failing data Register, 639-608. More...

#define	XBRAM_CE_FFD_20_OFFSET 0x150
	Correctable error first failing data Register, 671-640. More...

#define	XBRAM_CE_FFD_21_OFFSET 0x154
	Correctable error first failing data Register, 703-672. More...

#define	XBRAM_CE_FFD_22_OFFSET 0x158
	Correctable error first failing data Register, 735-704. More...

#define	XBRAM_CE_FFD_23_OFFSET 0x15C
	Correctable error first failing data Register, 767-736. More...

#define	XBRAM_CE_FFD_24_OFFSET 0x160
	Correctable error first failing data Register, 799-768. More...

#define	XBRAM_CE_FFD_25_OFFSET 0x164
	Correctable error first failing data Register, 831-800. More...

#define	XBRAM_CE_FFD_26_OFFSET 0x168
	Correctable error first failing data Register, 863-832. More...

#define	XBRAM_CE_FFD_27_OFFSET 0x16C
	Correctable error first failing data Register, 895-864. More...

#define	XBRAM_CE_FFD_28_OFFSET 0x170
	Correctable error first failing data Register, 927-896. More...

#define	XBRAM_CE_FFD_29_OFFSET 0x174
	Correctable error first failing data Register, 959-928. More...

#define	XBRAM_CE_FFD_30_OFFSET 0x178
	Correctable error first failing data Register, 991-960. More...

#define	XBRAM_CE_FFD_31_OFFSET 0x17C
	Correctable error first failing data Register, 1023-992. More...

#define	XBRAM_CE_FFE_0_OFFSET 0x180
	Correctable error first failing ECC Register, 31-0. More...

#define	XBRAM_CE_FFE_1_OFFSET 0x184
	Correctable error first failing ECC Register, 63-32. More...

#define	XBRAM_CE_FFE_2_OFFSET 0x188
	Correctable error first failing ECC Register, 95-64. More...

#define	XBRAM_CE_FFE_3_OFFSET 0x18C
	Correctable error first failing ECC Register, 127-96. More...

#define	XBRAM_CE_FFE_4_OFFSET 0x190
	Correctable error first failing ECC Register, 159-128. More...

#define	XBRAM_CE_FFE_5_OFFSET 0x194
	Correctable error first failing ECC Register, 191-160. More...

#define	XBRAM_CE_FFE_6_OFFSET 0x198
	Correctable error first failing ECC Register, 223-192. More...

#define	XBRAM_CE_FFE_7_OFFSET 0x19C
	Correctable error first failing ECC Register, 255-224. More...

#define	XBRAM_CE_FFA_0_OFFSET 0x1C0
	Correctable error first failing address Register 31-0. More...

#define	XBRAM_CE_FFA_1_OFFSET 0x1C4
	Correctable error first failing address Register 63-32. More...

#define	XBRAM_UE_FFD_0_OFFSET 0x200
	Uncorrectable error first failing data Register, 31-0. More...

#define	XBRAM_UE_FFD_1_OFFSET 0x204
	Uncorrectable error first failing data Register, 63-32. More...

#define	XBRAM_UE_FFD_2_OFFSET 0x208
	Uncorrectable error first failing data Register, 95-64. More...

#define	XBRAM_UE_FFD_3_OFFSET 0x20C
	Uncorrectable error first failing data Register, 127-96. More...

#define	XBRAM_UE_FFD_4_OFFSET 0x210
	Uncorrectable error first failing data Register, 159-128. More...

#define	XBRAM_UE_FFD_5_OFFSET 0x214
	Uncorrectable error first failing data Register, 191-160. More...

#define	XBRAM_UE_FFD_6_OFFSET 0x218
	Uncorrectable error first failing data Register, 223-192. More...

#define	XBRAM_UE_FFD_7_OFFSET 0x21C
	Uncorrectable error first failing data Register, 255-224. More...

#define	XBRAM_UE_FFD_8_OFFSET 0x220
	Uncorrectable error first failing data Register, 287-256. More...

#define	XBRAM_UE_FFD_9_OFFSET 0x224
	Uncorrectable error first failing data Register, 319-288. More...

#define	XBRAM_UE_FFD_10_OFFSET 0x228
	Uncorrectable error first failing data Register, 351-320. More...

#define	XBRAM_UE_FFD_11_OFFSET 0x22C
	Uncorrectable error first failing data Register, 383-352. More...

#define	XBRAM_UE_FFD_12_OFFSET 0x230
	Uncorrectable error first failing data Register, 415-384. More...

#define	XBRAM_UE_FFD_13_OFFSET 0x234
	Uncorrectable error first failing data Register, 447-416. More...

#define	XBRAM_UE_FFD_14_OFFSET 0x238
	Uncorrectable error first failing data Register, 479-448. More...

#define	XBRAM_UE_FFD_15_OFFSET 0x23C
	Uncorrectable error first failing data Register, 511-480. More...

#define	XBRAM_UE_FFD_16_OFFSET 0x240
	Uncorrectable error first failing data Register, 543-512. More...

#define	XBRAM_UE_FFD_17_OFFSET 0x244
	Uncorrectable error first failing data Register, 575-544. More...

#define	XBRAM_UE_FFD_18_OFFSET 0x248
	Uncorrectable error first failing data Register, 607-576. More...

#define	XBRAM_UE_FFD_19_OFFSET 0x24C
	Uncorrectable error first failing data Register, 639-608. More...

#define	XBRAM_UE_FFD_20_OFFSET 0x250
	Uncorrectable error first failing data Register, 671-640. More...

#define	XBRAM_UE_FFD_21_OFFSET 0x254
	Uncorrectable error first failing data Register, 703-672. More...

#define	XBRAM_UE_FFD_22_OFFSET 0x258
	Uncorrectable error first failing data Register, 735-704. More...

#define	XBRAM_UE_FFD_23_OFFSET 0x25C
	Uncorrectable error first failing data Register, 767-736. More...

#define	XBRAM_UE_FFD_24_OFFSET 0x260
	Uncorrectable error first failing data Register, 799-768. More...

#define	XBRAM_UE_FFD_25_OFFSET 0x264
	Uncorrectable error first failing data Register, 831-800. More...

#define	XBRAM_UE_FFD_26_OFFSET 0x268
	Uncorrectable error first failing data Register, 863-832. More...

#define	XBRAM_UE_FFD_27_OFFSET 0x26C
	Uncorrectable error first failing data Register, 895-864. More...

#define	XBRAM_UE_FFD_28_OFFSET 0x270
	Uncorrectable error first failing data Register, 927-896. More...

#define	XBRAM_UE_FFD_29_OFFSET 0x274
	Uncorrectable error first failing data Register, 959-928. More...

#define	XBRAM_UE_FFD_30_OFFSET 0x278
	Uncorrectable error first failing data Register, 991-960. More...

#define	XBRAM_UE_FFD_31_OFFSET 0x27C
	Uncorrectable error first failing data Register, 1023-992. More...

#define	XBRAM_UE_FFE_0_OFFSET 0x280
	Uncorrectable error first failing ECC Register, 31-0. More...

#define	XBRAM_UE_FFE_1_OFFSET 0x284
	Uncorrectable error first failing ECC Register, 63-32. More...

#define	XBRAM_UE_FFE_2_OFFSET 0x288
	Uncorrectable error first failing ECC Register, 95-64. More...

#define	XBRAM_UE_FFE_3_OFFSET 0x28C
	Uncorrectable error first failing ECC Register, 127-96. More...

#define	XBRAM_UE_FFE_4_OFFSET 0x290
	Uncorrectable error first failing ECC Register, 159-128. More...

#define	XBRAM_UE_FFE_5_OFFSET 0x294
	Uncorrectable error first failing ECC Register, 191-160. More...

#define	XBRAM_UE_FFE_6_OFFSET 0x298
	Uncorrectable error first failing ECC Register, 223-192. More...

#define	XBRAM_UE_FFE_7_OFFSET 0x29C
	Uncorrectable error first failing ECC Register, 255-224. More...

#define	XBRAM_UE_FFA_0_OFFSET 0x2C0
	Uncorrectable error first failing address Register 31-0. More...

#define	XBRAM_UE_FFA_1_OFFSET 0x2C4
	Uncorrectable error first failing address Register 63-32. More...

#define	XBRAM_FI_D_0_OFFSET 0x300
	Fault injection Data Register, 31-0. More...

#define	XBRAM_FI_D_1_OFFSET 0x304
	Fault injection Data Register, 63-32. More...

#define	XBRAM_FI_D_2_OFFSET 0x308
	Fault injection Data Register, 95-64. More...

#define	XBRAM_FI_D_3_OFFSET 0x30C
	Fault injection Data Register, 127-96. More...

#define	XBRAM_FI_D_4_OFFSET 0x310
	Fault injection Data Register, 159-128. More...

#define	XBRAM_FI_D_5_OFFSET 0x314
	Fault injection Data Register, 191-160. More...

#define	XBRAM_FI_D_6_OFFSET 0x318
	Fault injection Data Register, 223-192. More...

#define	XBRAM_FI_D_7_OFFSET 0x31C
	Fault injection Data Register, 255-224. More...

#define	XBRAM_FI_D_8_OFFSET 0x320
	Fault injection Data Register, 287-256. More...

#define	XBRAM_FI_D_9_OFFSET 0x324
	Fault injection Data Register, 319-288. More...

#define	XBRAM_FI_D_10_OFFSET 0x328
	Fault injection Data Register, 351-320. More...

#define	XBRAM_FI_D_11_OFFSET 0x32C
	Fault injection Data Register, 383-352. More...

#define	XBRAM_FI_D_12_OFFSET 0x330
	Fault injection Data Register, 415-384. More...

#define	XBRAM_FI_D_13_OFFSET 0x334
	Fault injection Data Register, 447-416. More...

#define	XBRAM_FI_D_14_OFFSET 0x338
	Fault injection Data Register, 479-448. More...

#define	XBRAM_FI_D_15_OFFSET 0x33C
	Fault injection Data Register, 511-480. More...

#define	XBRAM_FI_D_16_OFFSET 0x340
	Fault injection Data Register, 543-512. More...

#define	XBRAM_FI_D_17_OFFSET 0x344
	Fault injection Data Register, 575-544. More...

#define	XBRAM_FI_D_18_OFFSET 0x348
	Fault injection Data Register, 607-576. More...

#define	XBRAM_FI_D_19_OFFSET 0x34C
	Fault injection Data Register, 639-608. More...

#define	XBRAM_FI_D_20_OFFSET 0x350
	Fault injection Data Register, 671-640. More...

#define	XBRAM_FI_D_21_OFFSET 0x354
	Fault injection Data Register, 703-672. More...

#define	XBRAM_FI_D_22_OFFSET 0x358
	Fault injection Data Register, 735-704. More...

#define	XBRAM_FI_D_23_OFFSET 0x35C
	Fault injection Data Register, 767-736. More...

#define	XBRAM_FI_D_24_OFFSET 0x360
	Fault injection Data Register, 799-768. More...

#define	XBRAM_FI_D_25_OFFSET 0x364
	Fault injection Data Register, 831-800. More...

#define	XBRAM_FI_D_26_OFFSET 0x368
	Fault injection Data Register, 863-832. More...

#define	XBRAM_FI_D_27_OFFSET 0x36C
	Fault injection Data Register, 895-864. More...

#define	XBRAM_FI_D_28_OFFSET 0x370
	Fault injection Data Register, 927-896. More...

#define	XBRAM_FI_D_29_OFFSET 0x374
	Fault injection Data Register, 959-928. More...

#define	XBRAM_FI_D_30_OFFSET 0x378
	Fault injection Data Register, 991-960. More...

#define	XBRAM_FI_D_31_OFFSET 0x37C
	Fault injection Data Register, 1023-992. More...

#define	XBRAM_FI_ECC_0_OFFSET 0x380
	Fault injection ECC Register, 31-0. More...

#define	XBRAM_FI_ECC_1_OFFSET 0x384
	Fault injection ECC Register, 63-32. More...

#define	XBRAM_FI_ECC_2_OFFSET 0x388
	Fault injection ECC Register, 95-64. More...

#define	XBRAM_FI_ECC_3_OFFSET 0x38C
	Fault injection ECC Register, 127-96. More...

#define	XBRAM_FI_ECC_4_OFFSET 0x390
	Fault injection ECC Register, 159-128. More...

#define	XBRAM_FI_ECC_5_OFFSET 0x394
	Fault injection ECC Register, 191-160. More...

#define	XBRAM_FI_ECC_6_OFFSET 0x398
	Fault injection ECC Register, 223-192. More...

#define	XBRAM_FI_ECC_7_OFFSET 0x39C
	Fault injection ECC Register, 255-224. More...

Interrupt Status and Enable Register bitmaps and masks
Bit definitions for the ECC status register and ECC interrupt enable register.
#define	XBRAM_IR_CE_MASK 0x2
	Mask for the correctable error. More...

#define	XBRAM_IR_UE_MASK 0x1
	Mask for the uncorrectable error. More...

#define	XBRAM_IR_ALL_MASK 0x3
	Mask of all bits. More...

Macro Definition Documentation

#define XBRAM_CE_CNT_OFFSET 0xC

Correctable error counter Register.

#define XBRAM_CE_FFA_0_OFFSET 0x1C0

Correctable error first failing address Register 31-0.

#define XBRAM_CE_FFA_1_OFFSET 0x1C4

Correctable error first failing address Register 63-32.

#define XBRAM_CE_FFD_0_OFFSET 0x100

Correctable error first failing data Register, 31-0.

#define XBRAM_CE_FFD_10_OFFSET 0x128

Correctable error first failing data Register, 351-320.

#define XBRAM_CE_FFD_11_OFFSET 0x12C

Correctable error first failing data Register, 383-352.

#define XBRAM_CE_FFD_12_OFFSET 0x130

Correctable error first failing data Register, 415-384.

#define XBRAM_CE_FFD_13_OFFSET 0x134

Correctable error first failing data Register, 447-416.

#define XBRAM_CE_FFD_14_OFFSET 0x138

Correctable error first failing data Register, 479-448.

#define XBRAM_CE_FFD_15_OFFSET 0x13C

Correctable error first failing data Register, 511-480.

#define XBRAM_CE_FFD_16_OFFSET 0x140

Correctable error first failing data Register, 543-512.

#define XBRAM_CE_FFD_17_OFFSET 0x144

Correctable error first failing data Register, 575-544.

#define XBRAM_CE_FFD_18_OFFSET 0x148

Correctable error first failing data Register, 607-576.

#define XBRAM_CE_FFD_19_OFFSET 0x14C

Correctable error first failing data Register, 639-608.

#define XBRAM_CE_FFD_1_OFFSET 0x104

Correctable error first failing data Register, 63-32.

#define XBRAM_CE_FFD_20_OFFSET 0x150

Correctable error first failing data Register, 671-640.

#define XBRAM_CE_FFD_21_OFFSET 0x154

Correctable error first failing data Register, 703-672.

#define XBRAM_CE_FFD_22_OFFSET 0x158

Correctable error first failing data Register, 735-704.

#define XBRAM_CE_FFD_23_OFFSET 0x15C

Correctable error first failing data Register, 767-736.

#define XBRAM_CE_FFD_24_OFFSET 0x160

Correctable error first failing data Register, 799-768.

#define XBRAM_CE_FFD_25_OFFSET 0x164

Correctable error first failing data Register, 831-800.

#define XBRAM_CE_FFD_26_OFFSET 0x168

Correctable error first failing data Register, 863-832.

#define XBRAM_CE_FFD_27_OFFSET 0x16C

Correctable error first failing data Register, 895-864.

#define XBRAM_CE_FFD_28_OFFSET 0x170

Correctable error first failing data Register, 927-896.

#define XBRAM_CE_FFD_29_OFFSET 0x174

Correctable error first failing data Register, 959-928.

#define XBRAM_CE_FFD_2_OFFSET 0x108

Correctable error first failing data Register, 95-64.

#define XBRAM_CE_FFD_30_OFFSET 0x178

Correctable error first failing data Register, 991-960.

#define XBRAM_CE_FFD_31_OFFSET 0x17C

Correctable error first failing data Register, 1023-992.

#define XBRAM_CE_FFD_3_OFFSET 0x10C

Correctable error first failing data Register, 127-96.

#define XBRAM_CE_FFD_4_OFFSET 0x110

Correctable error first failing data Register, 159-128.

#define XBRAM_CE_FFD_5_OFFSET 0x114

Correctable error first failing data Register, 191-160.

#define XBRAM_CE_FFD_6_OFFSET 0x118

Correctable error first failing data Register, 223-192.

#define XBRAM_CE_FFD_7_OFFSET 0x11C

Correctable error first failing data Register, 255-224.

#define XBRAM_CE_FFD_8_OFFSET 0x120

Correctable error first failing data Register, 287-256.

#define XBRAM_CE_FFD_9_OFFSET 0x124

Correctable error first failing data Register, 319-288.

#define XBRAM_CE_FFE_0_OFFSET 0x180

Correctable error first failing ECC Register, 31-0.

#define XBRAM_CE_FFE_1_OFFSET 0x184

Correctable error first failing ECC Register, 63-32.

#define XBRAM_CE_FFE_2_OFFSET 0x188

Correctable error first failing ECC Register, 95-64.

#define XBRAM_CE_FFE_3_OFFSET 0x18C

Correctable error first failing ECC Register, 127-96.

#define XBRAM_CE_FFE_4_OFFSET 0x190

Correctable error first failing ECC Register, 159-128.

#define XBRAM_CE_FFE_5_OFFSET 0x194

Correctable error first failing ECC Register, 191-160.

#define XBRAM_CE_FFE_6_OFFSET 0x198

Correctable error first failing ECC Register, 223-192.

#define XBRAM_CE_FFE_7_OFFSET 0x19C

Correctable error first failing ECC Register, 255-224.

#define XBRAM_ECC_EN_IRQ_OFFSET 0x4

ECC interrupt enable Register.

Referenced by XBram_InterruptDisable(), XBram_InterruptEnable(), XBram_InterruptGetEnabled(), and XBram_InterruptGetStatus().

#define XBRAM_ECC_ON_OFF_OFFSET 0x8

ECC on/off register.

#define XBRAM_ECC_STATUS_OFFSET 0x0

ECC status Register.

Referenced by XBram_InterruptClear().

#define XBRAM_FI_D_0_OFFSET 0x300

Fault injection Data Register, 31-0.

#define XBRAM_FI_D_10_OFFSET 0x328

Fault injection Data Register, 351-320.

#define XBRAM_FI_D_11_OFFSET 0x32C

Fault injection Data Register, 383-352.

#define XBRAM_FI_D_12_OFFSET 0x330

Fault injection Data Register, 415-384.

#define XBRAM_FI_D_13_OFFSET 0x334

Fault injection Data Register, 447-416.

#define XBRAM_FI_D_14_OFFSET 0x338

Fault injection Data Register, 479-448.

#define XBRAM_FI_D_15_OFFSET 0x33C

Fault injection Data Register, 511-480.

#define XBRAM_FI_D_16_OFFSET 0x340

Fault injection Data Register, 543-512.

#define XBRAM_FI_D_17_OFFSET 0x344

Fault injection Data Register, 575-544.

#define XBRAM_FI_D_18_OFFSET 0x348

Fault injection Data Register, 607-576.

#define XBRAM_FI_D_19_OFFSET 0x34C

Fault injection Data Register, 639-608.

#define XBRAM_FI_D_1_OFFSET 0x304

Fault injection Data Register, 63-32.

#define XBRAM_FI_D_20_OFFSET 0x350

Fault injection Data Register, 671-640.

#define XBRAM_FI_D_21_OFFSET 0x354

Fault injection Data Register, 703-672.

#define XBRAM_FI_D_22_OFFSET 0x358

Fault injection Data Register, 735-704.

#define XBRAM_FI_D_23_OFFSET 0x35C

Fault injection Data Register, 767-736.

#define XBRAM_FI_D_24_OFFSET 0x360

Fault injection Data Register, 799-768.

#define XBRAM_FI_D_25_OFFSET 0x364

Fault injection Data Register, 831-800.

#define XBRAM_FI_D_26_OFFSET 0x368

Fault injection Data Register, 863-832.

#define XBRAM_FI_D_27_OFFSET 0x36C

Fault injection Data Register, 895-864.

#define XBRAM_FI_D_28_OFFSET 0x370

Fault injection Data Register, 927-896.

#define XBRAM_FI_D_29_OFFSET 0x374

Fault injection Data Register, 959-928.

#define XBRAM_FI_D_2_OFFSET 0x308

Fault injection Data Register, 95-64.

#define XBRAM_FI_D_30_OFFSET 0x378

Fault injection Data Register, 991-960.

#define XBRAM_FI_D_31_OFFSET 0x37C

Fault injection Data Register, 1023-992.

#define XBRAM_FI_D_3_OFFSET 0x30C

Fault injection Data Register, 127-96.

#define XBRAM_FI_D_4_OFFSET 0x310

Fault injection Data Register, 159-128.

#define XBRAM_FI_D_5_OFFSET 0x314

Fault injection Data Register, 191-160.

#define XBRAM_FI_D_6_OFFSET 0x318

Fault injection Data Register, 223-192.

#define XBRAM_FI_D_7_OFFSET 0x31C

Fault injection Data Register, 255-224.

#define XBRAM_FI_D_8_OFFSET 0x320

Fault injection Data Register, 287-256.

#define XBRAM_FI_D_9_OFFSET 0x324

Fault injection Data Register, 319-288.

#define XBRAM_FI_ECC_0_OFFSET 0x380

Fault injection ECC Register, 31-0.

#define XBRAM_FI_ECC_1_OFFSET 0x384

Fault injection ECC Register, 63-32.

#define XBRAM_FI_ECC_2_OFFSET 0x388

Fault injection ECC Register, 95-64.

#define XBRAM_FI_ECC_3_OFFSET 0x38C

Fault injection ECC Register, 127-96.

#define XBRAM_FI_ECC_4_OFFSET 0x390

Fault injection ECC Register, 159-128.

#define XBRAM_FI_ECC_5_OFFSET 0x394

Fault injection ECC Register, 191-160.

#define XBRAM_FI_ECC_6_OFFSET 0x398

Fault injection ECC Register, 223-192.

#define XBRAM_FI_ECC_7_OFFSET 0x39C

Fault injection ECC Register, 255-224.

#define XBRAM_IR_ALL_MASK 0x3

Mask of all bits.

Referenced by BramIntrExample(), and XBram_SelfTest().

#define XBRAM_IR_CE_MASK 0x2

Mask for the correctable error.

Referenced by XBram_SelfTest().

#define XBRAM_IR_UE_MASK 0x1

Mask for the uncorrectable error.

Referenced by XBram_SelfTest().

#define XBram_ReadReg	(	BaseAddress,
		RegOffset
	)	XBram_In32((BaseAddress) + (RegOffset))

Read a value from a BRAM register.

A 32 bit read is performed.

Parameters

BaseAddress	is the base address of the BRAM device registers.
RegOffset	is the register offset from the base to read from.

Returns: Data read from the register.

Note: C-style signature: u32 XBram_ReadReg(u32 BaseAddress, u32 RegOffset)

Referenced by XBram_InterruptClear(), XBram_InterruptDisable(), XBram_InterruptEnable(), XBram_InterruptGetEnabled(), and XBram_InterruptGetStatus().

#define XBRAM_UE_FFA_0_OFFSET 0x2C0

Uncorrectable error first failing address Register 31-0.

#define XBRAM_UE_FFA_1_OFFSET 0x2C4

Uncorrectable error first failing address Register 63-32.

#define XBRAM_UE_FFD_0_OFFSET 0x200

Uncorrectable error first failing data Register, 31-0.

#define XBRAM_UE_FFD_10_OFFSET 0x228

Uncorrectable error first failing data Register, 351-320.

#define XBRAM_UE_FFD_11_OFFSET 0x22C

Uncorrectable error first failing data Register, 383-352.

#define XBRAM_UE_FFD_12_OFFSET 0x230

Uncorrectable error first failing data Register, 415-384.

#define XBRAM_UE_FFD_13_OFFSET 0x234

Uncorrectable error first failing data Register, 447-416.

#define XBRAM_UE_FFD_14_OFFSET 0x238

Uncorrectable error first failing data Register, 479-448.

#define XBRAM_UE_FFD_15_OFFSET 0x23C

Uncorrectable error first failing data Register, 511-480.

#define XBRAM_UE_FFD_16_OFFSET 0x240

Uncorrectable error first failing data Register, 543-512.

#define XBRAM_UE_FFD_17_OFFSET 0x244

Uncorrectable error first failing data Register, 575-544.

#define XBRAM_UE_FFD_18_OFFSET 0x248

Uncorrectable error first failing data Register, 607-576.

#define XBRAM_UE_FFD_19_OFFSET 0x24C

Uncorrectable error first failing data Register, 639-608.

#define XBRAM_UE_FFD_1_OFFSET 0x204

Uncorrectable error first failing data Register, 63-32.

#define XBRAM_UE_FFD_20_OFFSET 0x250

Uncorrectable error first failing data Register, 671-640.

#define XBRAM_UE_FFD_21_OFFSET 0x254

Uncorrectable error first failing data Register, 703-672.

#define XBRAM_UE_FFD_22_OFFSET 0x258

Uncorrectable error first failing data Register, 735-704.

#define XBRAM_UE_FFD_23_OFFSET 0x25C

Uncorrectable error first failing data Register, 767-736.

#define XBRAM_UE_FFD_24_OFFSET 0x260

Uncorrectable error first failing data Register, 799-768.

#define XBRAM_UE_FFD_25_OFFSET 0x264

Uncorrectable error first failing data Register, 831-800.

#define XBRAM_UE_FFD_26_OFFSET 0x268

Uncorrectable error first failing data Register, 863-832.

#define XBRAM_UE_FFD_27_OFFSET 0x26C

Uncorrectable error first failing data Register, 895-864.

#define XBRAM_UE_FFD_28_OFFSET 0x270

Uncorrectable error first failing data Register, 927-896.

#define XBRAM_UE_FFD_29_OFFSET 0x274

Uncorrectable error first failing data Register, 959-928.

#define XBRAM_UE_FFD_2_OFFSET 0x208

Uncorrectable error first failing data Register, 95-64.

#define XBRAM_UE_FFD_30_OFFSET 0x278

Uncorrectable error first failing data Register, 991-960.

#define XBRAM_UE_FFD_31_OFFSET 0x27C

Uncorrectable error first failing data Register, 1023-992.

#define XBRAM_UE_FFD_3_OFFSET 0x20C

Uncorrectable error first failing data Register, 127-96.

#define XBRAM_UE_FFD_4_OFFSET 0x210

Uncorrectable error first failing data Register, 159-128.

#define XBRAM_UE_FFD_5_OFFSET 0x214

Uncorrectable error first failing data Register, 191-160.

#define XBRAM_UE_FFD_6_OFFSET 0x218

Uncorrectable error first failing data Register, 223-192.

#define XBRAM_UE_FFD_7_OFFSET 0x21C

Uncorrectable error first failing data Register, 255-224.

#define XBRAM_UE_FFD_8_OFFSET 0x220

Uncorrectable error first failing data Register, 287-256.

#define XBRAM_UE_FFD_9_OFFSET 0x224

Uncorrectable error first failing data Register, 319-288.

#define XBRAM_UE_FFE_0_OFFSET 0x280

Uncorrectable error first failing ECC Register, 31-0.

#define XBRAM_UE_FFE_1_OFFSET 0x284

Uncorrectable error first failing ECC Register, 63-32.

#define XBRAM_UE_FFE_2_OFFSET 0x288

Uncorrectable error first failing ECC Register, 95-64.

#define XBRAM_UE_FFE_3_OFFSET 0x28C

Uncorrectable error first failing ECC Register, 127-96.

#define XBRAM_UE_FFE_4_OFFSET 0x290

Uncorrectable error first failing ECC Register, 159-128.

#define XBRAM_UE_FFE_5_OFFSET 0x294

Uncorrectable error first failing ECC Register, 191-160.

#define XBRAM_UE_FFE_6_OFFSET 0x298

Uncorrectable error first failing ECC Register, 223-192.

#define XBRAM_UE_FFE_7_OFFSET 0x29C

Uncorrectable error first failing ECC Register, 255-224.

#define XBram_WriteReg	(	BaseAddress,
		RegOffset,
		Data
	)	XBram_Out32((BaseAddress) + (RegOffset), (u32)(Data))

Write a value to a BRAM register.

A 32 bit write is performed.

Parameters

BaseAddress	is the base address of the BRAM device register.
RegOffset	is the register offset from the base to write to.
Data	is the data written to the register.

Returns: None.

Note: C-style signature: void XBram_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)

Referenced by XBram_InterruptClear(), XBram_InterruptDisable(), and XBram_InterruptEnable().

Function Documentation

int XBram_CfgInitialize	(	XBram *	InstancePtr,
		XBram_Config *	Config,
		UINTPTR	EffectiveAddr
	)

Initialize the XBram instance provided by the caller based on the given configuration data.

Nothing is done except to initialize the InstancePtr.

Parameters

InstancePtr	is a pointer to an XBram instance. The memory the pointer references must be pre-allocated by the caller. Further calls to manipulate the driver through the XBram API must be made with this pointer.
Config	is a reference to a structure containing information about a specific BRAM device. This function initializes an InstancePtr object for a specific device specified by the contents of Config. This function can initialize multiple instance objects with the use of multiple calls giving different Config information on each call.
EffectiveAddr	is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.

Returns

XST_SUCCESS Initialization was successful.

Note: None.

References XBram_Config::CorrectableCounterBits, XBram_Config::CorrectableFailingDataRegs, XBram_Config::CorrectableFailingRegisters, XBram_Config::CtrlBaseAddress, XBram_Config::DataWidth, XBram_Config::EccPresent, XBram_Config::EccStatusInterruptPresent, XBram_Config::FaultInjectionPresent, XBram_Config::MemBaseAddress, XBram_Config::MemHighAddress, XBram_Config::UncorrectableFailingDataRegs, XBram_Config::UncorrectableFailingRegisters, and XBram_Config::WriteAccess.

Referenced by BramExample(), and BramIntrExample().

void XBram_InterruptClear	(	XBram *	InstancePtr,
		u32	Mask
	)

Clear pending interrupts with the provided mask.

This function should be called after the software has serviced the interrupts that are pending. This function will assert if the hardware device has not been built with interrupt capabilities.

Parameters

InstancePtr	is the BRAM instance to operate on.
Mask	is the mask to clear pending interrupts for. Bit positions of 1 are cleared. This mask is formed by OR'ing bits from XBRAM_IR* bits which are contained in xbram_hw.h.

Returns: None.

Note: None.

References XBram_Config::CtrlBaseAddress, XBRAM_ECC_STATUS_OFFSET, XBram_ReadReg, and XBram_WriteReg.

void XBram_InterruptDisable	(	XBram *	InstancePtr,
		u32	Mask
	)

Disable interrupts.

This function allows each specific interrupt to be disabled. This function will assert if the hardware device has not been built with interrupt capabilities.

Parameters

InstancePtr	is the BRAM instance to operate on.
Mask	is the mask to disable. Bits set to 1 are disabled. This mask is formed by OR'ing bits from XBRAM_IR* bits which are contained in xbram_hw.h.

Returns: None.

Note: None.

References XBram_Config::CtrlBaseAddress, XBRAM_ECC_EN_IRQ_OFFSET, XBram_ReadReg, and XBram_WriteReg.

void XBram_InterruptEnable	(	XBram *	InstancePtr,
		u32	Mask
	)

Enable interrupts.

This function will assert if the hardware device has not been built with interrupt capabilities.

Parameters

InstancePtr	is the BRAM instance to operate on.
Mask	is the mask to enable. Bit positions of 1 are enabled. This mask is formed by OR'ing bits from XBRAM_IR* bits which are contained in xbram_hw.h.

Returns: None.

Note: None.

References XBram_Config::CtrlBaseAddress, XBRAM_ECC_EN_IRQ_OFFSET, XBram_ReadReg, and XBram_WriteReg.

u32 XBram_InterruptGetEnabled ( XBram * InstancePtr )

Returns the interrupt enable mask.

This function will assert if the hardware device has not been built with interrupt capabilities.

Parameters

InstancePtr is the BRAM instance to operate on.

Returns: A mask of bits made from XBRAM_IR* bits which are contained in xbram_hw.h.; None.

Note: None.

References XBram_Config::CtrlBaseAddress, XBRAM_ECC_EN_IRQ_OFFSET, and XBram_ReadReg.

u32 XBram_InterruptGetStatus ( XBram * InstancePtr )

Returns the status of interrupt signals.

Any bit in the mask set to 1 indicates that the channel associated with the bit has asserted an interrupt condition. This function will assert if the hardware device has not been built with interrupt capabilities.

Parameters

InstancePtr is the BRAM instance to operate on.

Returns: A pointer to a mask of bits made from XBRAM_IR* bits which are contained in xbram_hw.h.

Note

The interrupt status indicates the status of the device regardless if the interrupts from the devices have been enabled or not through XBram_InterruptEnable().

References XBram_Config::CtrlBaseAddress, XBRAM_ECC_EN_IRQ_OFFSET, and XBram_ReadReg.

XBram_Config * XBram_LookupConfig ( u16 DeviceId )

Lookup the device configuration based on the unique device ID.

The table ConfigTable contains the configuration info for each device in the system.

Parameters

DeviceId is the device identifier to lookup.

Returns

A pointer of data type XBram_Config which points to the device configuration if DeviceID is found.
- NULL if DeviceID is not found.

Note: None.

Referenced by BramExample(), and BramIntrExample().

int XBram_SelfTest	(	XBram *	InstancePtr,
		u8	IntMask
	)

Run a self-test on the driver/device.

Unless fault injection is implemented in hardware, this function only does a minimal test in which available registers (if any) are written and read.

With fault injection, all possible single-bit and double-bit errors are injected, and checked to the extent possible, given the implemented hardware.

Parameters

InstancePtr	is a pointer to the XBram instance.
IntMask	is the interrupt mask to use. When testing with interrupts, this should be set to allow interrupt generation, otherwise it should be 0.

Returns

XST_SUCCESS if fault injection/detection is working properly OR if ECC is Not Enabled in the HW.
XST_FAILURE if the injected fault is not correctly detected or the Control Base Address is Zero when ECC is enabled.

If the BRAM device is not present in the hardware a bus error could be generated. Other indicators of a bus error, such as registers in bridges or buses, may be necessary to determine if this function caused a bus error.

Note: None.

References XBram_Config::CorrectableCounterBits, XBram_Config::CorrectableFailingDataRegs, XBram_Config::CorrectableFailingRegisters, XBram_Config::CtrlBaseAddress, XBram_Config::DataWidth, XBram_Config::EccPresent, XBram_Config::EccStatusInterruptPresent, XBram_Config::FaultInjectionPresent, XBram_Config::MemBaseAddress, XBram_Config::MemHighAddress, XBram_Config::UncorrectableFailingDataRegs, XBram_Config::UncorrectableFailingRegisters, XBram_Config::WriteAccess, XBRAM_IR_ALL_MASK, XBRAM_IR_CE_MASK, and XBRAM_IR_UE_MASK.

Referenced by BramExample(), and BramIntrExample().

Variable Documentation

XBram_Config XBram_ConfigTable[]

This table contains configuration information for each BRAM device in the system.

The order must match the XBram_Config definition.

XBram_Config XBram_ConfigTable[]

Initial value:

= {
        {
                XPAR_BRAM_0_DEVICE_ID,
                XPAR_BRAM_0_ECC,
                XPAR_BRAM_0_FAULT_INJECT,
                XPAR_BRAM_0_CE_FAILING_REGISTERS,
                XPAR_BRAM_0_CE_FAILING_DATA_REGISTERS,
                XPAR_BRAM_0_UE_FAILING_REGISTERS,
                XPAR_BRAM_0_UE_FAILING_DATA_REGISTERS,
                XPAR_BRAM_0_ECC_STATUS_REGISTERS,
                XPAR_BRAM_0_CE_COUNTER_WIDTH,
                XPAR_BRAM_0_ECC_ONOFF_REGISTER,
                XPAR_BRAM_0_ECC_ONOFF_RESET_VALUE,
                XPAR_BRAM_0_WRITE_ACCESS,
                XPAR_BRAM_0_BASEADDR,
                XPAR_BRAM_0_HIGHADDR,
                XPAR_BRAM_0_CTRL_BASEADDR,
                XPAR_BRAM_0_CTRL_HIGHADDR,
        }
}

This table contains configuration information for each BRAM device in the system.

The order must match the XBram_Config definition.

Data Structures

Macros

Functions

Variables

Registers

Interrupt Status and Enable Register bitmaps and masks

Macro Definition Documentation

Function Documentation

Variable Documentation