Data Structures
struct	XCanFd_Config
	This typedef contains configuration information for a device. More...

struct	XCanFd
	The XCanFd driver instance data. More...

Macros
#define	XCANFD_H
	by using protection macros More...

#define	XCanFd_IsTxDone(InstancePtr)
	This macro checks if the transmission is complete. More...

#define	XCanFd_CreateIdValue(StandardId, SubRemoteTransReq, IdExtension, ExtendedId, RemoteTransReq)
	This macro calculates CAN message identifier value given identifier field values. More...

#define	XCanFd_Create_CanFD_DlcValue(DataLengCode)
	This macro calculates value for Data Length Code register given Data Length Code value with EDL set to 1(Only Can FD frames). More...

#define	XCanFd_Create_CanFD_Dlc_BrsValue(DataLengCode)
	This macro calculates value for Data Length Code register given Data Length Code value with EDL set to 1(Only Can FD frames) and Setting the BRS. More...

#define	XCanFd_CreateDlcValue(DataLengCode) ((((DataLengCode) << XCANFD_DLCR_DLC_SHIFT) & XCANFD_DLCR_DLC_MASK))
	This macro calculates value for Data Length Code register given Data Length Code value i.e Only Stand. More...

#define	XCanFd_IsBufferTransmitted(InstancePtr, TxBuffer)
	This macro checks whether Particular Buffer is Transmitted or not. More...

#define	MAKE_CURRENTBUFFER_ZERO(InstancePtr)
	This macro initializes CurrentBuffer[32] to zeros. More...

#define	XCANFD_TXID_OFFSET(FreeBuffer) (XCANFD_TXFIFO_0_BASE_ID_OFFSET+((UINTPTR)FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the TXBUFFER ID Offset. More...

#define	XCANFD_TXDLC_OFFSET(FreeBuffer) (XCANFD_TXFIFO_0_BASE_DLC_OFFSET+((UINTPTR)FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the TXBUFFER DLC Offset. More...

#define	XCANFD_TXDW_OFFSET(FreeBuffer) (XCANFD_TXFIFO_0_BASE_DW0_OFFSET+((UINTPTR)FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the TXBUFFER DW Offset. More...

#define	XCANFD_TXEID_OFFSET(TXEVENTIndex) (XCANFD_TXEFIFO_0_BASE_ID_OFFSET+((UINTPTR)TXEVENTIndex*XCANFD_TXE_MESSAGE_SIZE))
	This macro Returns the TX Event Buffer ID Offset. More...

#define	XCANFD_TXEDLC_OFFSET(TXEVENTIndex) (XCANFD_TXEFIFO_0_BASE_DLC_OFFSET+((UINTPTR)TXEVENTIndex*XCANFD_TXE_MESSAGE_SIZE))
	This macro Returns the TX Event Buffer DLC Offset. More...

#define	XCANFD_RXID_OFFSET(ReadIndex) (XCANFD_RXFIFO_0_BASE_ID_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the RXBUFFER ID Offset. More...

#define	XCANFD_RXDLC_OFFSET(ReadIndex) (XCANFD_RXFIFO_0_BASE_DLC_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the RXBUFFER DLC Offset. More...

#define	XCANFD_RXDW_OFFSET(ReadIndex) (XCANFD_RXFIFO_0_BASE_DW0_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the RXBUFFER DW Offset. More...

#define	XCANFD_FIFO_1_RXID_OFFSET(ReadIndex) (XCANFD_RXFIFO_1_BUFFER_0_BASE_ID_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the RXBUFFER ID Offset for FIFO 1. More...

#define	XCANFD_FIFO_1_RXDLC_OFFSET(ReadIndex) (XCANFD_RXFIFO_1_BUFFER_0_BASE_DLC_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the RXBUFFER DLC Offset for FIFO 1. More...

#define	XCANFD_FIFO_1_RXDW_OFFSET(ReadIndex) (XCANFD_RXFIFO_1_BUFFER_0_BASE_DW0_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the RXBUFFER DW Offset for FIFO 1. More...

#define	XCANFD_RCS_OFFSET(NoCtrlStatus) (XCANFD_RCS0_OFFSET+((UINTPTR)NoCtrlStatus*4U))
	This macro Returns the RCS Register Offset. More...

#define	XCANFD_AFMR_OFFSET(FilterIndex)
	This macro Returns the AFMR Register Offset. More...

#define	XCANFD_AFIDR_OFFSET(FilterIndex)
	This macro Returns the AFIDR Registger Offset. More...

#define	XCANFD_MAILBOX_MASK_OFFSET(BufferNr) (XCANFD_MAILBOX_RB_MASK_BASE_OFFSET+((UINTPTR)BufferNr*4U))
	This macro Returns the MAILBOX MODE RXMASK Offset. More...

#define	XCANFD_MAILBOX_ID_OFFSET(BufferNr) (XCANFD_RXFIFO_0_BASE_ID_OFFSET+((UINTPTR)BufferNr*XCANFD_MAX_FRAME_SIZE))
	This macro Returns the MAILBOX MODE ID Offset. More...

#define	XCANFD_GET_RX_MODE(InstancePtr) ((InstancePtr)->CanFdConfig.Rx_Mode)
	This macro Returns Design mode 1- Mailbox 0- Sequential. More...

#define	XCanFd_Reset(InstancePtr)
	This function resets the CAN device. More...

#define	XCanFd_GetBusErrorStatus(InstancePtr) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ESR_OFFSET)
	This function reads Error Status value from Error Status Register (ESR). More...

#define	XCanFd_GetStatus(InstancePtr) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_SR_OFFSET)
	This function returns Status value from Status Register (SR). More...

#define	XCanFd_ClearBusErrorStatus(InstancePtr, Mask)
	This function clears Error Status bit(s) previously set in Error Status Register (ESR). More...

#define	XCanFd_Get_Tranceiver_Delay_CompensationOffset(InstancePtr)
	This function returns the Tranceive delay comensation Offset. More...

#define	XCanFd_ClearTImeStamp_Count(InstancePtr)
	This function Clears Time Stamp Counter Value. More...

#define	XCanFd_GetTImeStamp_Count(InstancePtr)
	This function returns Time Stamp Counter Value. More...

#define	XCanFd_GetRxIntrWatermark(InstancePtr)
	This routine returns the Rx water Mark threshold Value. More...

#define	XCanFd_InterruptGetEnabled(InstancePtr) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_IER_OFFSET)
	This routine returns enabled interrupt(s). More...

#define	XCanFd_InterruptGetStatus(InstancePtr) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ISR_OFFSET)
	This routine returns interrupt status read from Interrupt Status Register. More...

#define	XCanFd_Get_NofRxBuffers(InstancePtr)
	This routine returns Number of RCS registers to access because in Mail box mode user can configure 48,32,16 Rx Buffers. More...

#define	XCanFd_Get_RxBuffers(InstancePtr) InstancePtr->CanFdConfig.NumofRxMbBuf;
	This routine returns Number of RxBuffers user can Desing RxBuffers as 48,32,16. More...

#define	XCanFD_Check_TrrVal_Set_Bit(Var) ((Var)&(~(Var) + (u32)1))
	This routine returns Number with right most bit set from the target input value. More...

#define	XCANFD_HW_H
	by using protection macros More...

#define	XCanFd_ReadReg(BaseAddress, RegOffset) Xil_In32((BaseAddress) + (RegOffset))
	This macro reads the given register. More...

#define	XCanFd_WriteReg(BaseAddress, RegOffset, Data) Xil_Out32((BaseAddress) + (RegOffset), (Data))
	This macro writes the given register. More...

#define	XCANFD_MAX_FRAME_SIZE_IN_BYTES 72
	Maximum Frame size. More...

#define	TEST_MESSAGE_ID 1024
	Message id. More...

#define	TEST_CANFD_DLC 8
	DLC Value. More...

#define	TEST_MAIL_BOX_MASK 0xFFFFFFFFU
	Mailbox Fileter Index Value. More...

#define	TEST_BRPR_BAUD_PRESCALAR 29
	Baud Rate Prescalar. More...

#define	TEST_BTR_SYNCJUMPWIDTH 3
	Synchronization Jump Width. More...

#define	TEST_BTR_SECOND_TIMESEGMENT 2
	Time Segment 2. More...

#define	TEST_BTR_FIRST_TIMESEGMENT 15
	Time Segment 1. More...

#define	TEST_FBRPR_BAUD_PRESCALAR 29
	Baud Rate Prescalar for canfd. More...

#define	TEST_FBTR_SYNCJUMPWIDTH 3
	Synchronization Jump Width for Canfd. More...

#define	TEST_FBTR_SECOND_TIMESEGMENT 2
	Time Segment 2 for Canfd. More...

#define	TEST_FBTR_FIRST_TIMESEGMENT 15
	Time Segment 1 for Canfd. More...

Typedefs
typedef void(*	XCanFd_SendRecvHandler )(void *CallBackRef)
	Callback type for frame sending and reception interrupts. More...

typedef void(*	XCanFd_ErrorHandler )(void *CallBackRef, u32 ErrorMask)
	Callback type for error interrupt. More...

typedef void(*	XCanFd_EventHandler )(void *CallBackRef, u32 Mask)
	Callback type for all kinds of interrupts except sending frame interrupt, receiving frame interrupt, and error interrupt. More...

Functions
int	XCanFd_CfgInitialize (XCanFd InstancePtr, XCanFd_Config ConfigPtr, UINTPTR EffectiveAddr)
	This routine initializes a specific XCanFd instance/driver. More...

int	XCanFd_stop (XCanFd *InstancePtr)
	This routine releases resources of XCanFd instance/driver. More...

u32	XCanFd_AcceptFilterGetEnabled (XCanFd *InstancePtr)
	This function returns enabled acceptance filters. More...

u8	XCanFd_GetMode (XCanFd *InstancePtr)
	This routine returns current operation mode the CAN device is in. More...

void	XCanFd_EnterMode (XCanFd *InstancePtr, u8 OperationMode)
	This function allows the CAN device to enter one of the following operation modes: More...

void	XCanFd_GetBusErrorCounter (XCanFd InstancePtr, u8 RxErrorCount, u8 *TxErrorCount)
	This function reads Receive and Transmit error counters. More...

int	XCanFd_Send (XCanFd InstancePtr, u32 FramePtr, u32 *TxBufferNumber)
	This function sends a CAN/CANFD Frame. More...

int	XCanFd_Addto_Queue (XCanFd InstancePtr, u32 FramePtr, u32 *TxBufferNumber)
	This function writes the Data into specific Buffer.we have 32 TxBuffers we can Add data to each Buffer using this routine.This routine won't transmit the data. More...

u32	XCanFd_Recv_Sequential (XCanFd InstancePtr, u32 FramePtr)
	This function receives a CAN/CAN FD Frame. More...

u32	XCanFd_Recv_TXEvents_Sequential (XCanFd InstancePtr, u32 FramePtr)
	This function receives a CAN/CAN FD TX Events. More...

u32	XCanFd_Recv_Mailbox (XCanFd InstancePtr, u32 FramePtr)
	This function receives a CAN Frame in MAIL BOX Mode. More...

u32	XCanFd_RxBuff_MailBox_Active (XCanFd *InstancePtr, u32 RxBuffer)
	This function sets an RxBuffer to Active State.In Mailbox Mode configuration we can set each buffer to receive with specific Id and Mask.inorder compare we need to first Activate the Buffer.Maximum number of RxBuffers depends on Design.Range 48,32,16. More...

u32	XCanFd_Set_MailBox_IdMask (XCanFd *InstancePtr, u32 RxBuffer, u32 MaskValue, u32 IdValue)
	This function sets the Id and Mask for an RxBuffer to participate in Id match.if a packet is received with an id which is equal to id we configured, then it is stored in RxBuffer. More...

u32	XCanFd_RxBuff_MailBox_DeActive (XCanFd *InstancePtr, u32 RxBuffer)
	This function sets an RxBuffer to InActive State.if we change a buffer to InActive state, then Rx Packet won't store into that buffer, even the Id is matched. More...

int	XCanFd_TxBuffer_Cancel_Request (XCanFd *InstancePtr, u32 BufferNumber)
	This function Cancels a CAN/CAN FD Frame which was already initiated for transmission.This function first checks TRR Bit based on BufferNumber. More...

void	XCanFd_AcceptFilterEnable (XCanFd *InstancePtr, u32 FilterIndexMask)
	This routine enables the acceptance filters. More...

void	XCanFd_AcceptFilterDisable (XCanFd *InstancePtr, u32 FilterIndexMask)
	This routine disables the acceptance filters. More...

int	XCanFd_AcceptFilterSet (XCanFd *InstancePtr, u32 FilterIndex, u32 MaskValue, u32 IdValue)
	This function sets values to the Acceptance Filter Mask Register (AFMR) and Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter. More...

void	XCanFd_AcceptFilterGet (XCanFd InstancePtr, u32 FilterIndex, u32 MaskValue, u32 *IdValue)
	This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter. More...

XCanFd_Config *	XCanFd_GetConfig (unsigned int InstanceIndex)
	This function looks for the device configuration based on the device index. More...

int	XCanFd_GetDlc2len (u32 Dlc, u32 Edl)
	This function returns Data Length Code(in Bytes),we need to pass DLC Field value in DLC Register. More...

u8	XCanFd_GetLen2Dlc (int len)
	This function returns Data Length Code of 4bits,we need to pass length in bytes. More...

u32	XCanFd_GetFreeBuffer (XCanFd *InstancePtr)
	This Routine returns the Free Buffers count out of 32 Transmit Buffers. More...

int	XCanFd_Send_Queue (XCanFd *InstancePtr)
	This routine sends queue of buffers,when added to queue using Addto_Queue() Basically this will trigger the TRR Bit(s).This routine can be used when user want to send multiple packets at a time. More...

void	XCanFd_PollQueue_Buffer (XCanFd *InstancePtr)
	This function Polls the TxBuffer(s) whether it is transmitted or not. More...

int	XCanFd_GetNofMessages_Stored_Rx_Fifo (XCanFd *InstancePtr, u8 fifo_no)
	This function returns Number of messages Stored. More...

int	XCanFd_GetNofMessages_Stored_TXE_FIFO (XCanFd *InstancePtr)
	This function returns Number of messages Stored in TX Event FIFO The FSR Register has Field called FL. More...

void	XCanFd_Enable_Tranceiver_Delay_Compensation (XCanFd *InstancePtr)
	This function Enables the Transceiver delay compensation. More...

void	XCanFd_Set_Tranceiver_Delay_Compensation (XCanFd *InstancePtr, u32 TdcOffset)
	This function Sets the Transceiver delay compensation offset. More...

void	XCanFd_Disable_Tranceiver_Delay_Compensation (XCanFd *InstancePtr)
	This function Disables the Transceiver delay compensation. More...

void	XCanFd_Pee_BusOff_Handler (XCanFd *InstancePtr)
	This function recovers the CAN device from Protocol Exception Event & Busoff Event States. More...

XCanFd_Config *	XCanFd_LookupConfig (u16 DeviceId)
	This function looks for the device configuration based on the unique device ID. More...

int	XCanFd_SetBaudRatePrescaler (XCanFd *InstancePtr, u8 Prescaler)
	This routine sets Baud Rate Prescaler value in Arbitration Phse. More...

u8	XCanFd_GetBaudRatePrescaler (XCanFd *InstancePtr)
	This routine gets Baud Rate Prescaler value. More...

u8	XCanFd_GetFBaudRatePrescaler (XCanFd *InstancePtr)
	This routine gets Baud Rate Prescaler value in Data Phase. More...

int	XCanFd_SetBitTiming (XCanFd *InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u16 TimeSegment1)
	This routine sets Bit time. More...

void	XCanFd_GetBitTiming (XCanFd InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u8 TimeSegment1)
	This routine gets Bit time. More...

void	XCanFd_GetFBitTiming (XCanFd InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u8 TimeSegment1)
	This routine gets Bit time in Data Phase. More...

int	XCanFd_SetFBaudRatePrescaler (XCanFd *InstancePtr, u8 Prescaler)
	This routine sets Baud Rate Prescaler value in Data Phase. More...

int	XCanFd_SetFBitTiming (XCanFd *InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u8 TimeSegment1)
	This routine sets Bit time in Data Phase. More...

void	XCanFd_SetBitRateSwitch_DisableNominal (XCanFd *InstancePtr)
	This routine Disables the BRSD bit, so that Bit Rate Switch can be happen with Nominal or configured rate. More...

void	XCanFd_SetBitRateSwitch_EnableNominal (XCanFd *InstancePtr)
	This routine sets the Bit Rate Switch with nominal bit rate. More...

u32	XCanFd_SetRxIntrWatermark (XCanFd *InstancePtr, s8 Threshold)
	This routine sets the Rx Full threshold in the Watermark Interrupt Register. More...

u32	XCanFd_SetRxIntrWatermarkFifo1 (XCanFd *InstancePtr, s8 Threshold)
	This routine sets the Rx Full threshold in the Watermark Interrupt Register. More...

u32	XCanFd_SetTxEventIntrWatermark (XCanFd *InstancePtr, u8 Threshold)
	This routine sets the TX Events Full threshold in the Watermark Interrupt Register. More...

u32	XCanFd_SetRxFilterPartition (XCanFd *InstancePtr, u8 FilterPartition)
	This routine sets the Receive filter partition in the Watermark Interrupt Register. More...

int	XCanFd_SelfTest (XCanFd *InstancePtr)
	This function runs a self-test on the CAN driver/device. More...

void	XCanFd_InterruptEnable (XCanFd *InstancePtr, u32 Mask)
	This routine enables interrupt(s). More...

void	XCanFd_InterruptDisable (XCanFd *InstancePtr, u32 Mask)
	This routine disables interrupt(s). More...

void	XCanFd_InterruptClear (XCanFd *InstancePtr, u32 Mask)
	This function clears interrupt(s). More...

void	XCanFd_IntrHandler (void *InstancePtr)
	This routine is the interrupt handler for the CAN driver. More...

int	XCanFd_SetHandler (XCanFd InstancePtr, u32 HandlerType, void CallBackFunc, void *CallBackRef)
	This routine installs an asynchronous callback function for the given HandlerType: More...

void	XCanFd_InterruptEnable_ReadyRqt (XCanFd *InstancePtr, u32 Mask)
	This routine enables TxBuffer Ready Request interrupt(s). More...

void	XCanFd_InterruptEnable_CancelRqt (XCanFd *InstancePtr, u32 Mask)
	This routine enables TxBuffer Cancellation interrupt(s). More...

void	XCanFd_InterruptDisable_ReadyRqt (XCanFd *InstancePtr, u32 Mask)
	This routine disables TxBuffer Ready Request interrupt(s). More...

void	XCanFd_InterruptDisable_CancelRqt (XCanFd *InstancePtr, u32 Mask)
	This routine disables the TxBuffer Cancel Request interrupt(s). More...

void	XCanFd_InterruptEnable_RxBuffFull (XCanFd *InstancePtr, u32 Mask, u32 RxBuffNumber)
	This routine Enables the RxBuffer Full interrupt(s) in MailBox Mode. More...

void	XCanFd_InterruptDisable_RxBuffFull (XCanFd *InstancePtr, u32 Mask, u32 RxBuffNumber)
	This routine disables the RxBuffer Full interrupt(s) in MailBox Mode. More...

Variables
XCanFd_Config	XCanFd_ConfigTable []
	Config table. More...

CAN normal Bit rate fields
#define	XCANFD_MAX_SJW_VALUE 0x80
	Synchronization Jump Width. More...

#define	XCANFD_MAX_TS1_VALUE 0x100
	Time Segment 1. More...

#define	XCANFD_MAX_TS2_VALUE 0x80
	Time Segment 2. More...

CAN Fast Bit rate fields
#define	XCANFD_MAX_F_SJW_VALUE 0x10
	Synchronization Jump Width for Data Phase. More...

#define	XCANFD_MAX_F_TS1_VALUE 0x20
	Time Segment 1 for Data Phase. More...

#define	XCANFD_MAX_F_TS2_VALUE 0x10
	Time Segment 2 for Data Phase. More...

CAN operation modes
#define	XCANFD_MODE_CONFIG 0x00000001
	Configuration mode. More...

#define	XCANFD_MODE_NORMAL 0x00000002
	Normal mode. More...

#define	XCANFD_MODE_LOOPBACK 0x00000004
	Loop Back mode. More...

#define	XCANFD_MODE_SLEEP 0x00000008
	Sleep mode. More...

#define	XCANFD_MODE_SNOOP 0x00000010
	Snoop mode. More...

#define	XCANFD_MODE_ABR 0x00000020
	Auto Bus-Off Recovery. More...

#define	XCANFD_MODE_SBR 0x00000040
	Starut Bus-Off Recovery. More...

#define	XCANFD_MODE_PEE 0x00000080
	Protocol Exception mode. More...

#define	XCANFD_MODE_DAR 0x0000000A
	Disable Auto Retransmission mode. More...

#define	XCANFD_MODE_BR 0x0000000B
	Bus-Off Recovery Mode. More...

#define	XCANFD_RX_FIFO_0 0
	Selection for RX Fifo 0. More...

#define	XCANFD_RX_FIFO_1 1
	Selection for RX Fifo 1. More...

Callback identifiers used as parameters to XCanFd_SetHandler()
#define	XCANFD_HANDLER_SEND 1
	Handler type for frame sending interrupt. More...

#define	XCANFD_HANDLER_RECV 2
	Handler type for frame reception interrupt. More...

#define	XCANFD_HANDLER_ERROR 3
	Handler type for error interrupt. More...

#define	XCANFD_HANDLER_EVENT 4
	Handler type for all other interrupts. More...

Register offsets for the CAN. Each register is 32 bits.
#define	XCANFD_SRR_OFFSET 0x000U
	Software Reset Register. More...

#define	XCANFD_MSR_OFFSET 0x004U
	Mode Select Register. More...

#define	XCANFD_BRPR_OFFSET 0x008U
	Baud Rate Prescaler Register. More...

#define	XCANFD_BTR_OFFSET 0x00CU
	Bit Timing Register. More...

#define	XCANFD_ECR_OFFSET 0x010U
	Error Counter Register. More...

#define	XCANFD_ESR_OFFSET 0x014U
	Error Status Register. More...

#define	XCANFD_SR_OFFSET 0x018U
	Status Register. More...

#define	XCANFD_ISR_OFFSET 0x01CU
	Interrupt Status Register. More...

#define	XCANFD_IER_OFFSET 0x020U
	Interrupt Enable Register. More...

#define	XCANFD_ICR_OFFSET 0x024U
	Interrupt Clear Register. More...

#define	XCANFD_F_BRPR_OFFSET 0x088U
	Data Phase Baud Rate Prescalar Register. More...

#define	XCANFD_F_BTR_OFFSET 0x08CU
	Data Phase Bit Timing Register. More...

#define	XCANFD_TRR_OFFSET 0x090U
	Tx Buffer Ready Request Register. More...

#define	XCANFD_IETRS_OFFSET 0x094U
	Tx Buffer Ready Request Served Interrupt Enable Register. More...

#define	XCANFD_TCR_OFFSET 0x098U
	Tx Buffer Cancel Request Register. More...

#define	XCANFD_IETCS_OFFSET 0x09CU
	Tx Buffer Cancel Request Served Interrupt Enable Register. More...

#define	XCANFD_RSD0_OFFSET 0x0A0U
	Reserved. More...

#define	XCANFD_RSD1_OFFSET 0x0A4U
	Reserved. More...

#define	XCANFD_RSD2_OFFSET 0x0A8U
	Reserved. More...

#define	XCANFD_RSD3_OFFSET 0x0ACU
	Reserved. More...

Mail box mode registers
#define	XCANFD_RCS0_OFFSET 0x0B0U
	Rx Buffer Control Status 0 Register. More...

#define	XCANFD_RCS1_OFFSET 0x0B4U
	Rx Buffer Control Status 1 Register. More...

#define	XCANFD_RCS2_OFFSET 0x0B8U
	Rx Buffer Control Status 2 Register. More...

#define	XCANFD_RCS_HCB_MASK 0xFFFFU
	Rx Buffer Control Status Register Host Control Bit Mask. More...

#define	XCANFD_RXBFLL1_OFFSET 0x0C0U
	Rx Buffer Full Interrupt Enable Register. More...

#define	XCANFD_RXBFLL2_OFFSET 0x0C4U
	Rx Buffer Full Interrupt Enable Register. More...

#define	XCANFD_MAILBOX_RB_MASK_BASE_OFFSET 0x2F00U
	Mailbox RxBuffer Mask Register. More...

#define	XCANFD_MAILBOX_NXT_RB 4U
	Mailbox Next Buffer. More...

#define	XCANFD_MBRXBUF_MASK 0x0000FFFFU
	Mailbox Max Rx Buffer mask. More...

TxBuffer Element ID Registers
Tx Message Buffer Element Start Address - 0x0100 (2304 Bytes) End Address - 0x09FF
#define	XCANFD_DLCR_TIMESTAMP_MASK 0x0000FFFFU
	Dlc Register TimeStamp Mask. More...

#define	XCANFD_TXFIFO_0_BASE_ID_OFFSET 0x0100U
	Tx Message Buffer Element 0 ID Register. More...

TxBuffer Element DLC Registers
#define	XCANFD_TXFIFO_0_BASE_DLC_OFFSET 0x0104U
	Tx Message Buffer Element 0 DLC Register. More...

TxBuffer Element DW Registers
#define	XCANFD_TXFIFO_0_BASE_DW0_OFFSET 0x0108U
	Tx Message Buffer Element 0 DW Register. More...

TXEVENT Buffer Element ID Registers
#define	XCANFD_TXEFIFO_0_BASE_ID_OFFSET 0x2000U
	Tx Event Message Buffer Element 0 ID Register. More...

TXEVENT Buffer Element DLC Registers
#define	XCANFD_TXEFIFO_0_BASE_DLC_OFFSET 0x2004U
	Tx Event Message Buffer Element 0 DLC Register. More...

Rx Message Buffer Element ID Registers.
Start Address - 0x1100 (2304 Bytes) End Address - 0x19FF
#define	XCANFD_RXFIFO_0_BASE_ID_OFFSET 0x2100U
	Rx Message Buffer Element 0 ID Register. More...

Rx Message Buffer Element DLC Registers.
#define	XCANFD_RXFIFO_0_BASE_DLC_OFFSET 0x2104U
	Rx Message Buffer Element 0 DLC Register. More...

Rx Message Buffer Element DW Registers.
#define	XCANFD_RXFIFO_0_BASE_DW0_OFFSET 0x2108U
	Rx Message Buffer Element 0 DW Register. More...

Rx Message Buffer Element FIFO 1 ID Registers.
Start Address - 0x4100 End Address - 0x52b8
#define	XCANFD_RXFIFO_1_BUFFER_0_BASE_ID_OFFSET 0x4100U
	Rx Message Buffer Element 0 ID Register. More...

Rx Message Buffer Element FIFO 1 DLC Registers.
Start Address - 0x4104 End Address - 0x52bc
#define	XCANFD_RXFIFO_1_BUFFER_0_BASE_DLC_OFFSET 0x4104U
	Rx Message Buffer Element 0 DLC Register. More...

Rx Message Buffer Element FIFO 1 SW Registers.
Start Address - 0x4108 End Address - 0x52c0
#define	XCANFD_RXFIFO_1_BUFFER_0_BASE_DW0_OFFSET 0x4108U
	Rx Message Buffer Element 0 DW Register. More...

Rx Message Buffer Element ID,DLC,DW Sizes.
#define	XCANFD_RXFIFO_NEXTID_OFFSET 72U
	Rx Message Buffer Element Next ID AT Offset. More...

#define	XCANFD_RXFIFO_NEXTDLC_OFFSET 72U
	Rx Message Buffer Element Next DLC AT Offset. More...

#define	XCANFD_RXFIFO_NEXTDW_OFFSET 72U
	Rx Message Buffer Element Next DW AT Offset. More...

EDL and BRS Masks.
#define	XCANFD_DLCR_EDL_MASK 0x08000000U
	EDL Mask in DLC Register. More...

#define	XCANFD_DLCR_BRS_MASK 0x04000000U
	BRS Mask in DLC Register. More...

Acceptance Filter Mask Registers
#define	XCANFD_AFMR_BASE_OFFSET 0x0A00U
	Acceptance Filter Mask Register. More...

#define	XCANFD_AFIDR_BASE_OFFSET 0x0A04U
	Acceptance Filter ID Register. More...

#define	XCANFD_AFMR_NXT_OFFSET 8U
	Acceptance Filter Next Offset. More...

#define	XCANFD_AFIDR_NXT_OFFSET 8U
	Acceptance Filter ID Next Offset. More...

#define	XCANFD_AFR_OFFSET 0x0E0U
	Acceptance Filter Register. More...

#define	XCANFD_FSR_OFFSET 0x0E8U
	Receive FIFO Status Register. More...

#define	XCANFD_NOOF_AFR 32U
	Number Of Acceptance FIlter Registers. More...

#define	XCANFD_WIR_OFFSET 0x0ECU
	Rx FIFO Water Mark Register. More...

#define	XCANFD_WIR_MASK 0x0000003FU
	Rx FIFO Full watermark Mask. More...

#define	XCANFD_WM_FIFO0_THRESHOLD 63
	Watermark Threshold Value. More...

#define	XCANFD_WMR_RXFWM_1_SHIFT 8U
	RX FIFO 1 Full Watermark Mask. More...

#define	XCANFD_WMR_RXFP_MASK 0x001F0000U
	Receive filter partition Mask. More...

#define	XCANFD_WMR_RXFP_SHIFT 16U
	Receive filter partition Mask. More...

#define	XCANFD_TXEVENT_WIR_OFFSET 0x000000A4U
	TX FIFO Watermark Offset. More...

#define	XCANFD_TXEVENT_WIR_MASK 0x0FU
	TX Event Watermark Mask. More...

#define	XCANFD_TIMESTAMPR_OFFSET 0x0028U
	Time Stamp Register. More...

#define	XCANFD_CTS_MASK 0x00000001U
	Time Stamp Counter Clear. More...

#define	XCANFD_DAR_MASK 0x00000010U
	Disable AutoRetransmission. More...

Software Reset Register
#define	XCANFD_SRR_CEN_MASK 0x00000002U
	Can Enable Mask. More...

#define	XCANFD_SRR_SRST_MASK 0x00000001U
	Reset Mask. More...

Mode Select Register
#define	XCANFD_MSR_LBACK_MASK 0x00000002U
	Loop Back Mode Select Mask. More...

#define	XCANFD_MSR_SLEEP_MASK 0x00000001U
	Sleep Mode Select Mask. More...

#define	XCANFD_MSR_BRSD_MASK 0x00000008U
	Bit Rate Switch Select Mask. More...

#define	XCANFD_MSR_DAR_MASK 0x00000010U
	Disable Auto-Retransmission Select Mask. More...

#define	XCANFD_MSR_SNOOP_MASK 0x00000004U
	Snoop Mode Select Mask. More...

#define	XCANFD_MSR_DPEE_MASK 0x00000020U
	Protocol Exception Event Mask. More...

#define	XCANFD_MSR_SBR_MASK 0x00000040U
	Start Bus-Off Recovery Mask. More...

#define	XCANFD_MSR_ABR_MASK 0x00000080U
	Auto Bus-Off Recovery Mask. More...

#define	XCANFD_MSR_CONFIG_MASK 0x000000F8U
	Configuration Mode Mask. More...

Baud Rate Prescaler register
#define	XCANFD_BRPR_BRP_MASK 0x000000FFU
	Baud Rate Prescaler Mask. More...

Bit Timing Register
#define	XCANFD_BTR_SJW_MASK 0x007F0000U
	Sync Jump Width Mask. More...

#define	XCANFD_BTR_TS2_MASK 0x00007F00U
	Time Segment 2 Mask. More...

#define	XCANFD_BTR_TS1_MASK 0x000000FFU
	Time Segment 1 Mask. More...

#define	XCANFD_F_BRPR_TDCMASK 0x00003F00U
	Transceiver Delay compensation Offset Mask. More...

#define	XCANFD_BTR_TS2_SHIFT 8U
	Time Segment 2 Shift. More...

#define	XCANFD_BTR_SJW_SHIFT 16U
	Sync Jump Width Shift. More...

#define	XCANFD_F_BRPR_TDC_ENABLE_MASK 0x00010000U
	Transceiver Delay compensation Enable Maskk. More...

Fast Bit Timing Register
#define	XCANFD_F_BTR_SJW_MASK 0x000F0000U
	Sync Jump Width Mask. More...

#define	XCANFD_F_BTR_TS2_MASK 0x00000F00U
	Time Segment 2 Mask. More...

#define	XCANFD_F_BTR_TS1_MASK 0x0000001FU
	Time Segment 1 Mask. More...

#define	XCANFD_F_BTR_TS2_SHIFT 8U
	Time Segment 2 Shift. More...

#define	XCANFD_F_BTR_SJW_SHIFT 16U
	Sync Jump Width Shift. More...

Error Counter Register
#define	XCANFD_ECR_REC_MASK 0x0000FF00U
	Receive Error Counter Mask. More...

#define	XCANFD_ECR_REC_SHIFT 8U
	Receive Error Counter Shift. More...

#define	XCANFD_ECR_TEC_MASK 0x000000FFU
	Transmit Error Counter Mask. More...

Error Status Register
#define	XCANFD_ESR_ACKER_MASK 0x00000010U
	ACK Error Mask. More...

#define	XCANFD_ESR_BERR_MASK 0x00000008U
	Bit Error Mask. More...

#define	XCANFD_ESR_STER_MASK 0x00000004U
	Stuff Error Mask. More...

#define	XCANFD_ESR_FMER_MASK 0x00000002U
	Form Error Mask. More...

#define	XCANFD_ESR_CRCER_MASK 0x00000001U
	CRC Error Mask. More...

#define	XCANFD_ESR_F_BERR_MASK 0x00000800U
	F_Bit Error Mask. More...

#define	XCANFD_ESR_F_STER_MASK 0x00000400U
	F_Stuff Error Mask. More...

#define	XCANFD_ESR_F_FMER_MASK 0x00000200U
	F_Form Error Mask. More...

#define	XCANFD_ESR_F_CRCER_MASK 0x00000100U
	F_CRC Error Mask. More...

Status Register
#define	XCANFD_SR_TDCV_MASK 0x007F0000U
	Transceiver Dealy compensation Mask. More...

#define	XCANFD_SR_SNOOP_MASK 0x00001000U
	Snoop Mode Mask. More...

#define	XCANFD_SR_ESTAT_MASK 0x00000180U
	Error Status Mask. More...

#define	XCANFD_SR_ESTAT_SHIFT 7U
	Error Status Shift. More...

#define	XCANFD_SR_ERRWRN_MASK 0x00000040U
	Error Warning Mask. More...

#define	XCANFD_SR_BBSY_MASK 0x00000020U
	Bus Busy Mask. More...

#define	XCANFD_SR_BIDLE_MASK 0x00000010U
	Bus Idle Mask. More...

#define	XCANFD_SR_NORMAL_MASK 0x00000008U
	Normal Mode Mask. More...

#define	XCANFD_SR_SLEEP_MASK 0x00000004U
	Sleep Mode Mask. More...

#define	XCANFD_SR_LBACK_MASK 0x00000002U
	Loop Back Mode Mask. More...

#define	XCANFD_SR_CONFIG_MASK 0x00000001U
	Configuration Mode Mask. More...

#define	XCANFD_SR_PEE_CONFIG_MASK 0x00000200U
	Protocol Exception Mode Indicator Mask. More...

#define	XCANFD_SR_BSFR_CONFIG_MASK 0x00000400U
	Bus-Off recovery Mode Indicator Mask. More...

#define	XCANFD_SR_NISO_MASK 0x00000800U
	Non-ISO Core Mask. More...

Interrupt Status/Enable/Clear Register
#define	XCANFD_IXR_RXBOFLW_BI_MASK 0x3F000000U
	Rx Buffer index for Overflow (Mailbox Mode) More...

#define	XCANFD_IXR_RXLRM_BI_MASK 0x00FC0000U
	Rx Buffer index for Last Received Message (Mailbox Mode) More...

#define	XCANFD_RXLRM_BI_SHIFT 18U
	Rx Buffer Index Shift Value. More...

#define	XCANFD_CSB_SHIFT 16U
	Core Status Bit Shift Value. More...

#define	XCANFD_IXR_RXMNF_MASK 0x00020000U
	Rx Match Not Finished Intr Mask. More...

#define	XCANFD_IXR_RXBOFLW_MASK 0x00010000U
	Rx Buffer Overflow interrupt Mask (Mailbox mode) More...

#define	XCANFD_IXR_RXRBF_MASK 0x00008000U
	Rx Buffer Full Interrupt Mask (Mailbox mode) More...

#define	XCANFD_IXR_TXCRS_MASK 0x00004000U
	Tx Cancellation Request Served Interrupt Mask. More...

#define	XCANFD_IXR_TXRRS_MASK 0x00002000U
	Tx Buffer Ready Request Served Interrupt Mask. More...

#define	XCANFD_IXR_RXFWMFLL_MASK 0x00001000U
	Rx Watermark Full interrupt Mask (FIFO mode) More...

#define	XCANFD_IXR_WKUP_MASK 0x00000800U
	Wake up Interrupt Mask. More...

#define	XCANFD_IXR_SLP_MASK 0x00000400U
	Sleep Interrupt Mask. More...

#define	XCANFD_IXR_BSOFF_MASK 0x00000200U
	Bus Off Interrupt Mask. More...

#define	XCANFD_IXR_ERROR_MASK 0x00000100U
	Error Interrupt Mask. More...

#define	XCANFD_IXR_RXFOFLW_MASK 0x00000040U
	RX FIFO Overflow Intr Mask. More...

#define	XCANFD_IXR_RXOK_MASK 0x00000010U
	New Message Received Intr. More...

#define	XCANFD_IXR_TXOK_MASK 0x00000002U
	TX Successful Interrupt Mask. More...

#define	XCANFD_IXR_ARBLST_MASK 0x00000001U
	Arbitration Lost Intr Mask. More...

#define	XCANFD_IXR_PEE_MASK 0x00000004U
	Protocol Exception Intr Mask. More...

#define	XCANFD_IXR_BSRD_MASK 0x00000008U
	Bus-Off recovery done Intr Mask. More...

#define	XCANFD_IXR_TSCNT_OFLW_MASK 0x00000020U
	Timestamp overflow Mask. More...

#define	XCANFD_IXR_RXFOFLW_1_MASK 0x00008000U
	RX FIFO 1 Overflow Intr Mask. More...

#define	XCANFD_IXR_RXFWMFLL_1_MASK 0x00010000U
	Rx Watermark Full interrupt Mask for FIFO 1. More...

#define	XCANFD_IXR_TXEOFLW_MASK 0x40000000U
	TX Event FIFO Intr Mask. More...

#define	XCANFD_IXR_TXEWMFLL_MASK 0x80000000U
	TX Event FIFO Watermark Full Intr Mask. More...

#define	XCANFD_IXR_ALL
	Mask for Basic interrupts. More...

Transmit Ready request All Mask
#define	XCANFD_TRR_MASK 0xFFFFFFFFU
	Transmit Ready request All Mask. More...

CAN Frame Identifier (TX High Priority Buffer/TX/RX/Acceptance Filter
Mask/Acceptance Filter ID)
#define	XCANFD_IDR_ID1_MASK 0xFFE00000U
	Standard Messg Ident Mask. More...

#define	XCANFD_IDR_ID1_SHIFT 21U
	Standard Messg Ident Shift. More...

#define	XCANFD_IDR_SRR_MASK 0x00100000U
	Substitute Remote TX Req. More...

#define	XCANFD_IDR_SRR_SHIFT 20U
	Substitue Remote TX Shift. More...

#define	XCANFD_IDR_IDE_MASK 0x00080000U
	Identifier Extension Mask. More...

#define	XCANFD_IDR_IDE_SHIFT 19U
	Identifier Extension Shift. More...

#define	XCANFD_IDR_ID2_MASK 0x0007FFFEU
	Extended Message Ident Mask. More...

#define	XCANFD_IDR_ID2_SHIFT 1U
	Extended Message Ident Shift. More...

#define	XCANFD_IDR_RTR_MASK 0x00000001U
	Remote TX Request Mask. More...

CAN Frame Data Length Code (TX High Priority Buffer/TX/RX)
#define	XCANFD_DLCR_DLC_MASK 0xF0000000U
	Data Length Code Mask. More...

#define	XCANFD_DLCR_DLC_SHIFT 28U
	Data Length Code Shift. More...

#define	XCANFD_DLCR_MM_MASK 0x00FF0000U
	Message Marker Mask. More...

#define	XCANFD_DLCR_MM_SHIFT 16U
	Message Marker Shift. More...

#define	XCANFD_DLCR_EFC_MASK 0x01000000U
	Event FIFO Control Mask. More...

#define	XCANFD_DLCR_EFC_SHIFT 24U
	Event FIFO Control Shift. More...

#define	XCANFD_DLC1 0x10000000U
	Data Length Code 1. More...

#define	XCANFD_DLC2 0x20000000U
	Data Length Code 2. More...

#define	XCANFD_DLC3 0x30000000U
	Data Length Code 3. More...

#define	XCANFD_DLC4 0x40000000U
	Data Length Code 4. More...

#define	XCANFD_DLC5 0x50000000U
	Data Length Code 5. More...

#define	XCANFD_DLC6 0x60000000U
	Data Length Code 6. More...

#define	XCANFD_DLC7 0x70000000U
	Data Length Code 7. More...

#define	XCANFD_DLC8 0x80000000U
	Data Length Code 8. More...

#define	XCANFD_DLC9 0x90000000U
	Data Length Code 9. More...

#define	XCANFD_DLC10 0xA0000000U
	Data Length Code 10. More...

#define	XCANFD_DLC11 0xB0000000U
	Data Length Code 11. More...

#define	XCANFD_DLC12 0xC0000000U
	Data Length Code 12. More...

#define	XCANFD_DLC13 0xD0000000U
	Data Length Code 13. More...

#define	XCANFD_DLC14 0xE0000000U
	Data Length Code 14. More...

#define	XCANFD_DLC15 0xF0000000U
	Data Length Code 15. More...

Acceptance Filter Register
#define	XCANFD_AFR_UAF_ALL_MASK 0xFFFFFFFFU
	Acceptance Filter Register. More...

CAN Receive FIFO Status Register
#define	XCANFD_FSR_FL_MASK 0x00007F00U
	Fill Level Mask FIFO 0. More...

#define	XCANFD_FSR_RI_MASK 0x0000003FU
	Read Index Mask FIFO 0. More...

#define	XCANFD_FSR_FL_1_MASK 0x7F000000U
	Fill Level Mask FIFO 1. More...

#define	XCANFD_FSR_RI_1_MASK 0x003F0000U
	Read Index Mask FIFO 1. More...

#define	XCANFD_FSR_IRI_1_MASK 0x00800000U
	Increment Read Index Mask FIFO1. More...

#define	XCANFD_FSR_FL_0_SHIFT 8U
	Fill Level Mask FIFO 0. More...

#define	XCANFD_FSR_FL_1_SHIFT 24U
	Fill Level Mask FIFO 1. More...

#define	XCANFD_FSR_RI_1_SHIFT 16U
	Read Index Mask FIFO 1. More...

#define	XCANFD_FSR_IRI_MASK 0x00000080U
	Increment Read Index Mask. More...

CAN RX FIFO Watermark Register
#define	XCANFD_WMR_RXFWM_1_MASK 0x00003F00U
	RX FIFO 1 Full Watermark Mask. More...

#define	XCANFD_WMR_RXFWM_1_MASK 0x00003F00U
	RX FIFO 1 Full Watermark Mask. More...

#define	XCANFD_WMR_RXFWM_MASK 0x0000003FU
	RX FIFO 0 Full Watermark Mask. More...

TX Event FIFO Registers
#define	XCANFD_TXE_FWM_OFFSET 0x000000A4U
	TX Event FIFO watermark Offset. More...

#define	XCANFD_TXE_FWM_MASK 0x0000001FU
	TX Event FIFO watermark Mask. More...

#define	XCANFD_TXE_FSR_OFFSET 0x000000A0U
	TX Event FIFO Status Register Offset. More...

#define	XCANFD_TXE_RI_MASK 0x0000001FU
	TX Event FIFO Read Index Mask. More...

#define	XCANFD_TXE_IRI_MASK 0x00000080U
	TX Event FIFO Increment Read Index Mask. More...

#define	XCANFD_TXE_FL_MASK 0x00001F00U
	TX Event FIFO Fill Level Mask. More...

#define	XCANFD_TXE_FL_SHIFT 8U
	TX Event FIFO Fill Level Shift. More...

#define	XCANFD_TXE_IRI_SHIFT 7U
	TX Event FIFO Increment Read Index SHIFT. More...

CAN TxBuffer Ready Request Served Interrupt Enable Register Masks
#define	XCANFD_TXBUFFER0_RDY_RQT_MASK 0x00000001U
	TxBuffer0 Ready Request Mask. More...

#define	XCANFD_TXBUFFER1_RDY_RQT_MASK 0x00000002U
	TxBuffer1 Ready Request Mask. More...

#define	XCANFD_TXBUFFER2_RDY_RQT_MASK 0x00000004U
	TxBuffer2 Ready Request Mask. More...

#define	XCANFD_TXBUFFER3_RDY_RQT_MASK 0x00000008U
	TxBuffer3 Ready Request Mask. More...

#define	XCANFD_TXBUFFER4_RDY_RQT_MASK 0x00000010U
	TxBuffer4 Ready Request Mask. More...

#define	XCANFD_TXBUFFER5_RDY_RQT_MASK 0x00000020U
	TxBuffer5 Ready Request Mask. More...

#define	XCANFD_TXBUFFER6_RDY_RQT_MASK 0x00000040U
	TxBuffer6 Ready Request Mask. More...

#define	XCANFD_TXBUFFER7_RDY_RQT_MASK 0x00000080U
	TxBuffer7 Ready Request Mask. More...

#define	XCANFD_TXBUFFER8_RDY_RQT_MASK 0x00000100U
	TxBuffer8 Ready Request Mask. More...

#define	XCANFD_TXBUFFER9_RDY_RQT_MASK 0x00000200U
	TxBuffer9 Ready Request Mask. More...

#define	XCANFD_TXBUFFER10_RDY_RQT_MASK 0x00000400U
	TxBuffer10 Ready Request Mask. More...

#define	XCANFD_TXBUFFER11_RDY_RQT_MASK 0x00000800U
	TxBuffer11 Ready Request Mask. More...

#define	XCANFD_TXBUFFER12_RDY_RQT_MASK 0x00001000U
	TxBuffer12 Ready Request Mask. More...

#define	XCANFD_TXBUFFER13_RDY_RQT_MASK 0x00002000U
	TxBuffer13 Ready Request Mask. More...

#define	XCANFD_TXBUFFER14_RDY_RQT_MASK 0x00004000U
	TxBuffer14 Ready Request Mask. More...

#define	XCANFD_TXBUFFER15_RDY_RQT_MASK 0x00008000U
	TxBuffer15 Ready Request Mask. More...

#define	XCANFD_TXBUFFER16_RDY_RQT_MASK 0x00010000U
	TxBuffer16 Ready Request Mask. More...

#define	XCANFD_TXBUFFER17_RDY_RQT_MASK 0x00020000U
	TxBuffer17 Ready Request Mask. More...

#define	XCANFD_TXBUFFER18_RDY_RQT_MASK 0x00040000U
	TxBuffer18 Ready Request Mask. More...

#define	XCANFD_TXBUFFER19_RDY_RQT_MASK 0x00080000U
	TxBuffer19 Ready Request Mask. More...

#define	XCANFD_TXBUFFER20_RDY_RQT_MASK 0x00100000U
	TxBuffer20 Ready Request Mask. More...

#define	XCANFD_TXBUFFER21_RDY_RQT_MASK 0x00200000U
	TxBuffer21 Ready Request Mask. More...

#define	XCANFD_TXBUFFER22_RDY_RQT_MASK 0x00400000U
	TxBuffer22 Ready Request Mask. More...

#define	XCANFD_TXBUFFER23_RDY_RQT_MASK 0x00800000U
	TxBuffer23 Ready Request Mask. More...

#define	XCANFD_TXBUFFER24_RDY_RQT_MASK 0x01000000U
	TxBuffer24 Ready Request Mask. More...

#define	XCANFD_TXBUFFER25_RDY_RQT_MASK 0x02000000U
	TxBuffer25 Ready Request Mask. More...

#define	XCANFD_TXBUFFER26_RDY_RQT_MASK 0x04000000U
	TxBuffer26 Ready Request Mask. More...

#define	XCANFD_TXBUFFER27_RDY_RQT_MASK 0x08000000U
	TxBuffer27 Ready Request Mask. More...

#define	XCANFD_TXBUFFER28_RDY_RQT_MASK 0x10000000U
	TxBuffer28 Ready Request Mask. More...

#define	XCANFD_TXBUFFER29_RDY_RQT_MASK 0x20000000U
	TxBuffer29 Ready Request Mask. More...

#define	XCANFD_TXBUFFER30_RDY_RQT_MASK 0x40000000U
	TxBuffer30 Ready Request Mask. More...

#define	XCANFD_TXBUFFER31_RDY_RQT_MASK 0x80000000U
	TxBuffer31 Ready Request Mask. More...

#define	XCANFD_TXBUFFER_ALL_RDY_RQT_MASK 0xFFFFFFFFU
	TxBuffer Ready Request Mask for ALL More...

CAN TxBuffer Cancel Request Served Interrupt Enable Register Masks
#define	XCANFD_TXBUFFER0_CANCEL_RQT_MASK 0x00000001U
	TxBuffer0 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER1_CANCEL_RQT_MASK 0x00000002U
	TxBuffer1 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER2_CANCEL_RQT_MASK 0x00000004U
	TxBuffer2 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER3_CANCEL_RQT_MASK 0x00000008U
	TxBuffer3 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER4_CANCEL_RQT_MASK 0x00000010U
	TxBuffer4 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER5_CANCEL_RQT_MASK 0x00000020U
	TxBuffer5 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER6_CANCEL_RQT_MASK 0x00000040U
	TxBuffer6 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER7_CANCEL_RQT_MASK 0x00000080U
	TxBuffer7 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER8_CANCEL_RQT_MASK 0x00000100U
	TxBuffer8 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER9_CANCEL_RQT_MASK 0x00000200U
	TxBuffer9 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER10_CANCEL_RQT_MASK 0x00000400U
	TxBuffer10 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER11_CANCEL_RQT_MASK 0x00000800U
	TxBuffer11 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER12_CANCEL_RQT_MASK 0x00001000U
	TxBuffer12 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER13_CANCEL_RQT_MASK 0x00002000U
	TxBuffer13 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER14_CANCEL_RQT_MASK 0x00004000U
	TxBuffer14 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER15_CANCEL_RQT_MASK 0x00008000U
	TxBuffer15 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER16_CANCEL_RQT_MASK 0x00010000U
	TxBuffer16 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER17_CANCEL_RQT_MASK 0x00020000U
	TxBuffer17 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER18_CANCEL_RQT_MASK 0x00040000U
	TxBuffer18 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER19_CANCEL_RQT_MASK 0x00080000U
	TxBuffer19 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER20_CANCEL_RQT_MASK 0x00100000U
	TxBuffer20 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER21_CANCEL_RQT_MASK 0x00200000U
	TxBuffer21 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER22_CANCEL_RQT_MASK 0x00400000U
	TxBuffer22 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER23_CANCEL_RQT_MASK 0x00800000U
	TxBuffer23 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER24_CANCEL_RQT_MASK 0x01000000U
	TxBuffer24 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER25_CANCEL_RQT_MASK 0x02000000U
	TxBuffer25 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER26_CANCEL_RQT_MASK 0x04000000U
	TxBuffer26 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER27_CANCEL_RQT_MASK 0x08000000U
	TxBuffer27 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER28_CANCEL_RQT_MASK 0x10000000U
	TxBuffer28 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER29_CANCEL_RQT_MASK 0x20000000U
	TxBuffer29 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER30_CANCEL_RQT_MASK 0x40000000U
	TxBuffer30 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER31_CANCEL_RQT_MASK 0x80000000U
	TxBuffer31 Cancel Request Mask. More...

#define	XCANFD_TXBUFFER_CANCEL_RQT_ALL_MASK 0xFFFFFFFFU
	TxBuffer Cancel Request Mask for ALL. More...

CAN RxBuffer Full Register
#define	XCANFD_RXBUFFER0_FULL_MASK 0x00000001U
	RxBuffer0 Full Mask. More...

#define	XCANFD_RXBUFFER1_FULL_MASK 0x00000002U
	RxBuffer1 Full Mask. More...

#define	XCANFD_RXBUFFER2_FULL_MASK 0x00000004U
	RxBuffer2 Full Mask. More...

#define	XCANFD_RXBUFFER3_FULL_MASK 0x00000008U
	RxBuffer3 Full Mask. More...

#define	XCANFD_RXBUFFER4_FULL_MASK 0x00000010U
	RxBuffer4 Full Mask. More...

#define	XCANFD_RXBUFFER5_FULL_MASK 0x00000020U
	RxBuffer5 Full Mask. More...

#define	XCANFD_RXBUFFER6_FULL_MASK 0x00000040U
	RxBuffer6 Full Mask. More...

#define	XCANFD_RXBUFFER7_FULL_MASK 0x00000080U
	RxBuffer7 Full Mask. More...

#define	XCANFD_RXBUFFER8_FULL_MASK 0x00000100U
	RxBuffer8 Full Mask. More...

#define	XCANFD_RXBUFFER9_FULL_MASK 0x00000200U
	RxBuffer9 Full Mask. More...

#define	XCANFD_RXBUFFER10_FULL_MASK 0x00000400U
	RxBuffer10 Full Mask. More...

#define	XCANFD_RXBUFFER11_FULL_MASK 0x00000800U
	RxBuffer11 Full Mask. More...

#define	XCANFD_RXBUFFER12_FULL_MASK 0x00001000U
	RxBuffer12 Full Mask. More...

#define	XCANFD_RXBUFFER13_FULL_MASK 0x00002000U
	RxBuffer13 Full Mask. More...

#define	XCANFD_RXBUFFER14_FULL_MASK 0x00004000U
	RxBuffer14 Full Mask. More...

#define	XCANFD_RXBUFFER15_FULL_MASK 0x00008000U
	RxBuffer15 Full Mask. More...

#define	XCANFD_RXBUFFER16_FULL_MASK 0x00010000U
	RxBuffer16 Full Mask. More...

#define	XCANFD_RXBUFFER17_FULL_MASK 0x00020000U
	RxBuffer17 Full Mask. More...

#define	XCANFD_RXBUFFER18_FULL_MASK 0x00040000U
	RxBuffer18 Full Mask. More...

#define	XCANFD_RXBUFFER19_FULL_MASK 0x00080000U
	RxBuffer19 Full Mask. More...

#define	XCANFD_RXBUFFER20_FULL_MASK 0x00100000U
	RxBuffer20 Full Mask. More...

#define	XCANFD_RXBUFFER21_FULL_MASK 0x00200000U
	RxBuffer21 Full Mask. More...

#define	XCANFD_RXBUFFER22_FULL_MASK 0x00400000U
	RxBuffer22 Full Mask. More...

#define	XCANFD_RXBUFFER23_FULL_MASK 0x00800000U
	RxBuffer23 Full Mask. More...

#define	XCANFD_RXBUFFER24_FULL_MASK 0x01000000U
	RxBuffer24 Full Mask. More...

#define	XCANFD_RXBUFFER25_FULL_MASK 0x02000000U
	RxBuffer25 Full Mask. More...

#define	XCANFD_RXBUFFER26_FULL_MASK 0x04000000U
	RxBuffer26 Full Mask. More...

#define	XCANFD_RXBUFFER27_FULL_MASK 0x08000000U
	RxBuffer27 Full Mask. More...

#define	XCANFD_RXBUFFER28_FULL_MASK 0x10000000U
	RxBuffer28 Full Mask. More...

#define	XCANFD_RXBUFFER29_FULL_MASK 0x20000000U
	RxBuffer29 Full Mask. More...

#define	XCANFD_RXBUFFER30_FULL_MASK 0x40000000U
	RxBuffer30 Full Mask. More...

#define	XCANFD_RXBUFFER31_FULL_MASK 0x80000000U
	RxBuffer31 Full Mask. More...

#define	XCANFD_RXBUFFER32_FULL_MASK 0x00000001U
	RxBuffer32 Full Mask. More...

#define	XCANFD_RXBUFFER33_FULL_MASK 0x00000002U
	RxBuffer33 Full Mask. More...

#define	XCANFD_RXBUFFER34_FULL_MASK 0x00000004U
	RxBuffer34 Full Mask. More...

#define	XCANFD_RXBUFFER35_FULL_MASK 0x00000008U
	RxBuffer35 Full Mask. More...

#define	XCANFD_RXBUFFER36_FULL_MASK 0x00000010U
	RxBuffer36 Full Mask. More...

#define	XCANFD_RXBUFFER37_FULL_MASK 0x00000020U
	RxBuffer37 Full Mask. More...

#define	XCANFD_RXBUFFER38_FULL_MASK 0x00000040U
	RxBuffer38 Full Mask. More...

#define	XCANFD_RXBUFFER39_FULL_MASK 0x00000080U
	RxBuffer39 Full Mask. More...

#define	XCANFD_RXBUFFER40_FULL_MASK 0x00000100U
	RxBuffer40 Full Mask. More...

#define	XCANFD_RXBUFFER41_FULL_MASK 0x00000200U
	RxBuffer41 Full Mask. More...

#define	XCANFD_RXBUFFER42_FULL_MASK 0x00000400U
	RxBuffer42 Full Mask. More...

#define	XCANFD_RXBUFFER43_FULL_MASK 0x00000800U
	RxBuffer43 Full Mask. More...

#define	XCANFD_RXBUFFER44_FULL_MASK 0x00001000U
	RxBuffer44 Full Mask. More...

#define	XCANFD_RXBUFFER45_FULL_MASK 0x00002000U
	RxBuffer45 Full Mask. More...

#define	XCANFD_RXBUFFER46_FULL_MASK 0x00004000U
	RxBuffer46 Full Mask. More...

#define	XCANFD_RXBUFFER47_FULL_MASK 0x00008000U
	RxBuffer47 Full Mask. More...

CAN frame length constants
#define	XCANFD_MAX_FRAME_SIZE 72U
	Maximum CAN frame length in bytes. More...

#define	XCANFD_TXE_MESSAGE_SIZE 8U
	TX Message Size. More...

#define	XCANFD_DW_BYTES 4U
	Data Word Bytes. More...

#define	XST_NOBUFFER 33L
	All Buffers (32) are filled. More...

#define	XST_BUFFER_ALREADY_FILLED 34L
	Given Buffer is Already filled. More...

#define	XST_INVALID_DLC 16L
	Invalid Dlc code. More...

#define	TRR_POS_MASK 0x1U
	TRR Position Mask. More...

#define	MAX_BUFFER_VAL 32U
	Max Buffer Value. More...

#define	FAST_MATH_MASK1 0xDB6DB6DBU
	Fast Math Mask 1. More...

#define	FAST_MATH_MASK2 0x49249249U
	Fast Math Mask 2. More...

#define	FAST_MATH_MASK3 0xC71C71C7U
	Fast Math Mask 3. More...

#define	TRR_INIT_VAL 0x00000000U
	TRR Initial value. More...

#define	TRR_MASK_INIT_VAL 0xFFFFFFFFU
	TRR Mask Initial value. More...

#define	DESIGN_RANGE_1 15U
	Design Range 1. More...

#define	DESIGN_RANGE_2 31U
	Design Range 2. More...

#define	CONTROL_STATUS_1 0U
	Control Status 1. More...

#define	CONTROL_STATUS_2 1U
	Control Status 2. More...

#define	CONTROL_STATUS_3 2U
	Congrol Status 3. More...

#define	EXTRACTION_MASK 63U
	Extraction Mask. More...

#define	SHIFT1 1U
	Flag for Shift 1. More...

#define	SHIFT2 2U
	Flag for Shift 2. More...

#define	SHIFT3 3U
	Flag for Shift 3. More...

#define	TDC_MAX_OFFSET 32U
	TDC Max Offset. More...

#define	TDC_SHIFT 8U
	Shift Value for TDC. More...

#define	MAX_BUFFER_INDEX 32U
	Max Buffer Index. More...

#define	MIN_FILTER_INDEX 0U
	Minimum Filter Index. More...

#define	MAX_FILTER_INDEX 32U
	Maximum Filter Index. More...

#define	EDL_CANFD 1U
	Extended Data Length for CANFD. More...

#define	EDL_CAN 0U
	Extended Data Length for CAN. More...

Macro Definition Documentation

#define CONTROL_STATUS_1 0U

Control Status 1.

Referenced by XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), and XCanFd_Set_MailBox_IdMask().

#define CONTROL_STATUS_2 1U

Control Status 2.

Referenced by XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), and XCanFd_Set_MailBox_IdMask().

#define CONTROL_STATUS_3 2U

Congrol Status 3.

Referenced by XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), and XCanFd_Set_MailBox_IdMask().

#define DESIGN_RANGE_1 15U

Design Range 1.

Referenced by XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), and XCanFd_Set_MailBox_IdMask().

#define DESIGN_RANGE_2 31U

Design Range 2.

Referenced by XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), and XCanFd_Set_MailBox_IdMask().

#define EDL_CAN 0U

Extended Data Length for CAN.

#define EDL_CANFD 1U

Extended Data Length for CANFD.

Referenced by main(), and XCanFd_SelfTest().

#define EXTRACTION_MASK 63U

Extraction Mask.

#define FAST_MATH_MASK1 0xDB6DB6DBU

Fast Math Mask 1.

#define FAST_MATH_MASK2 0x49249249U

Fast Math Mask 2.

#define FAST_MATH_MASK3 0xC71C71C7U

Fast Math Mask 3.

#define MAKE_CURRENTBUFFER_ZERO ( InstancePtr )

Value:

for (BufferNr = 0;BufferNr <= 31; BufferNr++) \

InstancePtr->FreeBuffStatus[BufferNr] = 0

This macro initializes CurrentBuffer[32] to zeros.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: none

Note: makes bufferstatus to zero.

#define MAX_BUFFER_INDEX 32U

Max Buffer Index.

Referenced by XCanFd_GetFreeBuffer(), and XCanFd_TxBuffer_Cancel_Request().

#define MAX_BUFFER_VAL 32U

Max Buffer Value.

Referenced by XCanFd_PollQueue_Buffer(), and XCanFd_Send_Queue().

#define MAX_FILTER_INDEX 32U

Maximum Filter Index.

Referenced by XCanFd_AcceptFilterGet(), XCanFd_AcceptFilterSet(), and XCanFd_CfgInitialize().

#define MIN_FILTER_INDEX 0U

Minimum Filter Index.

Referenced by XCanFd_AcceptFilterGet(), and XCanFd_AcceptFilterSet().

#define SHIFT1 1U

Flag for Shift 1.

#define SHIFT2 2U

Flag for Shift 2.

#define SHIFT3 3U

Flag for Shift 3.

#define TDC_MAX_OFFSET 32U

TDC Max Offset.

Referenced by XCanFd_Set_Tranceiver_Delay_Compensation().

#define TDC_SHIFT 8U

Shift Value for TDC.

Referenced by XCanFd_Set_Tranceiver_Delay_Compensation().

#define TEST_BRPR_BAUD_PRESCALAR 29

Baud Rate Prescalar.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define TEST_BTR_FIRST_TIMESEGMENT 15

Time Segment 1.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define TEST_BTR_SECOND_TIMESEGMENT 2

Time Segment 2.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define TEST_BTR_SYNCJUMPWIDTH 3

Synchronization Jump Width.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define TEST_CANFD_DLC 8

DLC Value.

Referenced by main(), and XCanFd_SelfTest().

#define TEST_FBRPR_BAUD_PRESCALAR 29

Baud Rate Prescalar for canfd.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define TEST_FBTR_FIRST_TIMESEGMENT 15

Time Segment 1 for Canfd.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define TEST_FBTR_SECOND_TIMESEGMENT 2

Time Segment 2 for Canfd.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define TEST_FBTR_SYNCJUMPWIDTH 3

Synchronization Jump Width for Canfd.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define TEST_MAIL_BOX_MASK 0xFFFFFFFFU

Mailbox Fileter Index Value.

Referenced by XCanFd_SelfTest().

#define TEST_MESSAGE_ID 1024

Message id.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define TRR_INIT_VAL 0x00000000U

TRR Initial value.

Referenced by XCanFd_Send_Queue().

#define TRR_MASK_INIT_VAL 0xFFFFFFFFU

TRR Mask Initial value.

Referenced by XCanFd_Addto_Queue(), XCanFd_Send(), and XCanFd_Send_Queue().

#define TRR_POS_MASK 0x1U

TRR Position Mask.

Referenced by XCanFd_PollQueue_Buffer().

#define XCANFD_AFIDR_BASE_OFFSET 0x0A04U

Acceptance Filter ID Register.

#define XCANFD_AFIDR_NXT_OFFSET 8U

Acceptance Filter ID Next Offset.

#define XCANFD_AFIDR_OFFSET ( FilterIndex )

Value:

(XCANFD_AFIDR_BASE_OFFSET+\

((UINTPTR)FilterIndex*8U))

XCANFD_AFIDR_BASE_OFFSET

#define XCANFD_AFIDR_BASE_OFFSET

Acceptance Filter ID Register.

Definition: xcanfd_hw.h:272

This macro Returns the AFIDR Registger Offset.

Parameters

FilterIndex is the Index of Id Register

Note: none

Referenced by XCanFd_AcceptFilterGet(), and XCanFd_AcceptFilterSet().

#define XCANFD_AFMR_BASE_OFFSET 0x0A00U

Acceptance Filter Mask Register.

#define XCANFD_AFMR_NXT_OFFSET 8U

Acceptance Filter Next Offset.

#define XCANFD_AFMR_OFFSET ( FilterIndex )

Value:

(XCANFD_AFMR_BASE_OFFSET+\

((UINTPTR)FilterIndex*8U))

XCANFD_AFMR_BASE_OFFSET

#define XCANFD_AFMR_BASE_OFFSET

Acceptance Filter Mask Register.

Definition: xcanfd_hw.h:271

This macro Returns the AFMR Register Offset.

Parameters

FilterIndex is the Index number of Mask Register

Note: none

Referenced by XCanFd_AcceptFilterGet(), and XCanFd_AcceptFilterSet().

#define XCANFD_AFR_OFFSET 0x0E0U

Acceptance Filter Register.

Referenced by XCanFd_AcceptFilterDisable(), XCanFd_AcceptFilterEnable(), and XCanFd_AcceptFilterGetEnabled().

#define XCANFD_AFR_UAF_ALL_MASK 0xFFFFFFFFU

Acceptance Filter Register.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define XCANFD_BRPR_BRP_MASK 0x000000FFU

Baud Rate Prescaler Mask.

Referenced by XCanFd_GetFBaudRatePrescaler(), and XCanFd_SetFBaudRatePrescaler().

#define XCANFD_BRPR_OFFSET 0x008U

Baud Rate Prescaler Register.

Referenced by XCanFd_GetBaudRatePrescaler(), and XCanFd_SetBaudRatePrescaler().

#define XCANFD_BTR_OFFSET 0x00CU

Bit Timing Register.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_SJW_MASK 0x007F0000U

Sync Jump Width Mask.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_SJW_SHIFT 16U

Sync Jump Width Shift.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_TS1_MASK 0x000000FFU

Time Segment 1 Mask.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_TS2_MASK 0x00007F00U

Time Segment 2 Mask.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_TS2_SHIFT 8U

Time Segment 2 Shift.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCanFD_Check_TrrVal_Set_Bit ( Var ) ((Var)&(~(Var) + (u32)1))

This routine returns Number with right most bit set from the target input value.

Parameters

Var	is target value.

Returns: Number with right most bit set from the target value.

Note: None.

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

#define XCanFd_ClearBusErrorStatus	(	InstancePtr,
		Mask
	)

Value:

XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ESR_OFFSET, \

Mask)

XCanFd_WriteReg

#define XCanFd_WriteReg(BaseAddress, RegOffset, Data)

This macro writes the given register.

Definition: xcanfd_hw.h:1147

XCANFD_ESR_OFFSET

#define XCANFD_ESR_OFFSET

Error Status Register.

Definition: xcanfd_hw.h:69

This function clears Error Status bit(s) previously set in Error Status Register (ESR).

Use the XCANFD_ESR_* constants defined in xcanfd_hw.h to create the value to pass in. If a bit was cleared in Error Status Register before this function is called, it will not be touched.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is he 32-bit mask used to clear bits in Error Status Register. Multiple XCANFD_ESR_* values could be 'OR'ed to clear multiple bits

Note: None.

Referenced by XCanFd_IntrHandler().

#define XCanFd_ClearTImeStamp_Count ( InstancePtr )

Value:

XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, \

XCANFD_TIMESTAMPR_OFFSET,XCANFD_CTS_MASK)

XCanFd_WriteReg

#define XCanFd_WriteReg(BaseAddress, RegOffset, Data)

This macro writes the given register.

Definition: xcanfd_hw.h:1147

XCANFD_TIMESTAMPR_OFFSET

#define XCANFD_TIMESTAMPR_OFFSET

Time Stamp Register.

Definition: xcanfd_hw.h:304

XCANFD_CTS_MASK

#define XCANFD_CTS_MASK

Time Stamp Counter Clear.

Definition: xcanfd_hw.h:305

This function Clears Time Stamp Counter Value.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: none

Note: None.

#define XCanFd_Create_CanFD_Dlc_BrsValue ( DataLengCode )

Value:

((((DataLengCode) << (u32)XCANFD_DLCR_DLC_SHIFT) & (u32)XCANFD_DLCR_DLC_MASK) \

|(XCANFD_DLCR_EDL_MASK) |(XCANFD_DLCR_BRS_MASK))

XCANFD_DLCR_BRS_MASK

#define XCANFD_DLCR_BRS_MASK

BRS Mask in DLC Register.

Definition: xcanfd_hw.h:261

XCANFD_DLCR_EDL_MASK

#define XCANFD_DLCR_EDL_MASK

EDL Mask in DLC Register.

Definition: xcanfd_hw.h:260

XCANFD_DLCR_DLC_SHIFT

#define XCANFD_DLCR_DLC_SHIFT

Data Length Code Shift.

Definition: xcanfd_hw.h:559

XCANFD_DLCR_DLC_MASK

#define XCANFD_DLCR_DLC_MASK

Data Length Code Mask.

Definition: xcanfd_hw.h:558

This macro calculates value for Data Length Code register given Data Length Code value with EDL set to 1(Only Can FD frames) and Setting the BRS.

Parameters

DataLengCode indicates Data Length Code value.

Returns: Value that can be assigned to Data Length Code register.

Note: C-Style signature: u32 XCanFd_Create_CanFD_Dlc_BrsValue(u32 DataLengCode);

Read the CAN specification for meaning of Data Length Code.

Referenced by main(), and XCanFd_SelfTest().

#define XCanFd_Create_CanFD_DlcValue ( DataLengCode )

Value:

((((DataLengCode) << XCANFD_DLCR_DLC_SHIFT) & XCANFD_DLCR_DLC_MASK) \

|(XCANFD_DLCR_EDL_MASK))

XCANFD_DLCR_EDL_MASK

#define XCANFD_DLCR_EDL_MASK

EDL Mask in DLC Register.

Definition: xcanfd_hw.h:260

XCANFD_DLCR_DLC_SHIFT

#define XCANFD_DLCR_DLC_SHIFT

Data Length Code Shift.

Definition: xcanfd_hw.h:559

XCANFD_DLCR_DLC_MASK

#define XCANFD_DLCR_DLC_MASK

Data Length Code Mask.

Definition: xcanfd_hw.h:558

This macro calculates value for Data Length Code register given Data Length Code value with EDL set to 1(Only Can FD frames).

Parameters

DataLengCode indicates Data Length Code value.

Returns: Value that can be assigned to Data Length Code register.

Note

C-Style signature: u32 XCanFd_Create_CanFD_DlcValue(u32 DataLengCode);

    Read the CAN specification for meaning of Data Length Code.

#define XCanFd_CreateDlcValue ( DataLengCode ) ((((DataLengCode) << XCANFD_DLCR_DLC_SHIFT) & XCANFD_DLCR_DLC_MASK))

This macro calculates value for Data Length Code register given Data Length Code value i.e Only Stand.

. Can frames.

Parameters

DataLengCode indicates Data Length Code value.

Returns: Value that can be assigned to Data Length Code register.

Note: C-Style signature: u32 XCanFd_CreateDlcValue(u32 DataLengCode);

Read the CAN specification for meaning of Data Length Code.

#define XCanFd_CreateIdValue	(	StandardId,
		SubRemoteTransReq,
		IdExtension,
		ExtendedId,
		RemoteTransReq
	)

Value:

((((StandardId) << (u32)XCANFD_IDR_ID1_SHIFT) & (u32)XCANFD_IDR_ID1_MASK) | \
 (((SubRemoteTransReq) << (u32)XCANFD_IDR_SRR_SHIFT) & (u32)XCANFD_IDR_SRR_MASK) | \
 (((IdExtension) << (u32)XCANFD_IDR_IDE_SHIFT) & (u32)XCANFD_IDR_IDE_MASK) | \
 (((ExtendedId) << (u32)XCANFD_IDR_ID2_SHIFT) & (u32)XCANFD_IDR_ID2_MASK) | \
 ((RemoteTransReq) & (u32)XCANFD_IDR_RTR_MASK))

This macro calculates CAN message identifier value given identifier field values.

Parameters

StandardId	contains Standard Message ID value.
SubRemoteTransReq	contains Substitute Remote Transmission Request value.
IdExtension	contains Identifier Extension value.
ExtendedId	contains Extended Message ID value.
RemoteTransReq	contains Remote Transmission Request value.

Returns: Message Identifier value.

Note: C-Style signature: u32 XCanFd_CreateIdValue(u32 StandardId, u32 SubRemoteTransReq, u32 IdExtension, u32 ExtendedId, u32 RemoteTransReq);

Read the CAN specification for meaning of each parameter.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define XCANFD_CSB_SHIFT 16U

Core Status Bit Shift Value.

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_CTS_MASK 0x00000001U

Time Stamp Counter Clear.

#define XCANFD_DAR_MASK 0x00000010U

Disable AutoRetransmission.

#define XCANFD_DLC1 0x10000000U

Data Length Code 1.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC10 0xA0000000U

Data Length Code 10.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC11 0xB0000000U

Data Length Code 11.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC12 0xC0000000U

Data Length Code 12.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC13 0xD0000000U

Data Length Code 13.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC14 0xE0000000U

Data Length Code 14.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC15 0xF0000000U

Data Length Code 15.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC2 0x20000000U

Data Length Code 2.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC3 0x30000000U

Data Length Code 3.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC4 0x40000000U

Data Length Code 4.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC5 0x50000000U

Data Length Code 5.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC6 0x60000000U

Data Length Code 6.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC7 0x70000000U

Data Length Code 7.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC8 0x80000000U

Data Length Code 8.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC9 0x90000000U

Data Length Code 9.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLCR_BRS_MASK 0x04000000U

BRS Mask in DLC Register.

#define XCANFD_DLCR_DLC_MASK 0xF0000000U

Data Length Code Mask.

Referenced by main(), XCanFd_Addto_Queue(), XCanFd_Recv_Mailbox(), XCanFd_SelfTest(), and XCanFd_Send().

#define XCANFD_DLCR_DLC_SHIFT 28U

Data Length Code Shift.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLCR_EDL_MASK 0x08000000U

EDL Mask in DLC Register.

Referenced by XCanFd_Addto_Queue(), XCanFd_Recv_Mailbox(), and XCanFd_Send().

#define XCANFD_DLCR_EFC_MASK 0x01000000U

Event FIFO Control Mask.

#define XCANFD_DLCR_EFC_SHIFT 24U

Event FIFO Control Shift.

#define XCANFD_DLCR_MM_MASK 0x00FF0000U

Message Marker Mask.

#define XCANFD_DLCR_MM_SHIFT 16U

Message Marker Shift.

#define XCANFD_DLCR_TIMESTAMP_MASK 0x0000FFFFU

Dlc Register TimeStamp Mask.

#define XCANFD_DW_BYTES 4U

Data Word Bytes.

Referenced by XCanFd_Addto_Queue(), XCanFd_Recv_Mailbox(), and XCanFd_Send().

#define XCANFD_ECR_OFFSET 0x010U

Error Counter Register.

Referenced by XCanFd_GetBusErrorCounter().

#define XCANFD_ECR_REC_MASK 0x0000FF00U

Receive Error Counter Mask.

Referenced by XCanFd_GetBusErrorCounter().

#define XCANFD_ECR_REC_SHIFT 8U

Receive Error Counter Shift.

Referenced by XCanFd_GetBusErrorCounter().

#define XCANFD_ECR_TEC_MASK 0x000000FFU

Transmit Error Counter Mask.

Referenced by XCanFd_GetBusErrorCounter().

#define XCANFD_ESR_ACKER_MASK 0x00000010U

ACK Error Mask.

Referenced by main().

#define XCANFD_ESR_BERR_MASK 0x00000008U

Bit Error Mask.

Referenced by main().

#define XCANFD_ESR_CRCER_MASK 0x00000001U

CRC Error Mask.

Referenced by main().

#define XCANFD_ESR_F_BERR_MASK 0x00000800U

F_Bit Error Mask.

Referenced by main().

#define XCANFD_ESR_F_CRCER_MASK 0x00000100U

F_CRC Error Mask.

#define XCANFD_ESR_F_FMER_MASK 0x00000200U

F_Form Error Mask.

Referenced by main().

#define XCANFD_ESR_F_STER_MASK 0x00000400U

F_Stuff Error Mask.

Referenced by main().

#define XCANFD_ESR_FMER_MASK 0x00000002U

Form Error Mask.

Referenced by main().

#define XCANFD_ESR_OFFSET 0x014U

Error Status Register.

#define XCANFD_ESR_STER_MASK 0x00000004U

Stuff Error Mask.

Referenced by main().

#define XCANFD_F_BRPR_OFFSET 0x088U

Data Phase Baud Rate Prescalar Register.

Referenced by XCanFd_Disable_Tranceiver_Delay_Compensation(), XCanFd_Enable_Tranceiver_Delay_Compensation(), XCanFd_GetFBaudRatePrescaler(), XCanFd_Set_Tranceiver_Delay_Compensation(), and XCanFd_SetFBaudRatePrescaler().

#define XCANFD_F_BRPR_TDC_ENABLE_MASK 0x00010000U

Transceiver Delay compensation Enable Maskk.

Referenced by XCanFd_Disable_Tranceiver_Delay_Compensation(), and XCanFd_Enable_Tranceiver_Delay_Compensation().

#define XCANFD_F_BRPR_TDCMASK 0x00003F00U

Transceiver Delay compensation Offset Mask.

Referenced by XCanFd_Set_Tranceiver_Delay_Compensation().

#define XCANFD_F_BTR_OFFSET 0x08CU

Data Phase Bit Timing Register.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_SJW_MASK 0x000F0000U

Sync Jump Width Mask.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_SJW_SHIFT 16U

Sync Jump Width Shift.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_TS1_MASK 0x0000001FU

Time Segment 1 Mask.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_TS2_MASK 0x00000F00U

Time Segment 2 Mask.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_TS2_SHIFT 8U

Time Segment 2 Shift.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_FIFO_1_RXDLC_OFFSET ( ReadIndex ) (XCANFD_RXFIFO_1_BUFFER_0_BASE_DLC_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER DLC Offset for FIFO 1.

Parameters

ReadIndex is the Buffer number to locate the FIFO

Note: This API is meant to be used with IP with CanFD 2.0 spec support only.

#define XCANFD_FIFO_1_RXDW_OFFSET ( ReadIndex ) (XCANFD_RXFIFO_1_BUFFER_0_BASE_DW0_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER DW Offset for FIFO 1.

Parameters

ReadIndex is the Buffer number to locate the FIFO

Note: This API is meant to be used with IP with CanFD 2.0 spec support only.

#define XCANFD_FIFO_1_RXID_OFFSET ( ReadIndex ) (XCANFD_RXFIFO_1_BUFFER_0_BASE_ID_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER ID Offset for FIFO 1.

Parameters

ReadIndex is the Buffer number to locate the FIFO

Note: This API is meant to be used with IP with CanFD 2.0 spec support only.

#define XCANFD_FSR_FL_0_SHIFT 8U

Fill Level Mask FIFO 0.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo().

#define XCANFD_FSR_FL_1_MASK 0x7F000000U

Fill Level Mask FIFO 1.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo(), and XCanFd_Recv_Sequential().

#define XCANFD_FSR_FL_1_SHIFT 24U

Fill Level Mask FIFO 1.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo().

#define XCANFD_FSR_FL_MASK 0x00007F00U

Fill Level Mask FIFO 0.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo(), and XCanFd_Recv_Sequential().

#define XCANFD_FSR_IRI_1_MASK 0x00800000U

Increment Read Index Mask FIFO1.

#define XCANFD_FSR_IRI_MASK 0x00000080U

Increment Read Index Mask.

#define XCANFD_FSR_OFFSET 0x0E8U

Receive FIFO Status Register.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo(), and XCanFd_Recv_Sequential().

#define XCANFD_FSR_RI_1_MASK 0x003F0000U

Read Index Mask FIFO 1.

Referenced by XCanFd_Recv_Sequential().

#define XCANFD_FSR_RI_1_SHIFT 16U

Read Index Mask FIFO 1.

Referenced by XCanFd_Recv_Sequential().

#define XCANFD_FSR_RI_MASK 0x0000003FU

Read Index Mask FIFO 0.

Referenced by XCanFd_Recv_Sequential().

#define XCanFd_Get_NofRxBuffers ( InstancePtr )

Value:

((InstancePtr->CanFdConfig.NumofRxMbBuf == 48) ? (3) \
         :((InstancePtr->CanFdConfig.NumofRxMbBuf == 32) ? \
           (2) : (1)))

This routine returns Number of RCS registers to access because in Mail box mode user can configure 48,32,16 Rx Buffers.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: The value stored in Interrupt Status Register.

Note: None.

#define XCANFD_GET_RX_MODE ( InstancePtr ) ((InstancePtr)->CanFdConfig.Rx_Mode)

This macro Returns Design mode 1- Mailbox 0- Sequential.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Note: none

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define XCanFd_Get_RxBuffers ( InstancePtr ) InstancePtr->CanFdConfig.NumofRxMbBuf;

This routine returns Number of RxBuffers user can Desing RxBuffers as 48,32,16.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: The value stored in Interrupt Status Register.

Note: None.

Referenced by main(), and XCanFdPolledExample().

#define XCanFd_Get_Tranceiver_Delay_CompensationOffset ( InstancePtr )

Value:

((XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress,\

XCANFD_F_BRPR_OFFSET) & XCANFD_F_BRPR_TDCMASK) >> 8)

XCANFD_F_BRPR_TDCMASK

#define XCANFD_F_BRPR_TDCMASK

Transceiver Delay compensation Offset Mask.

Definition: xcanfd_hw.h:353

XCANFD_F_BRPR_OFFSET

#define XCANFD_F_BRPR_OFFSET

Data Phase Baud Rate Prescalar Register.

Definition: xcanfd_hw.h:76

XCanFd_ReadReg

#define XCanFd_ReadReg(BaseAddress, RegOffset)

This macro reads the given register.

Definition: xcanfd_hw.h:1129

This function returns the Tranceive delay comensation Offset.

This function can call when user sends multiple Buffers using Addto_Queue() and XCanFd_Send_Queue().

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: None.

Note: None.

#define XCanFd_GetBusErrorStatus ( InstancePtr ) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ESR_OFFSET)

This function reads Error Status value from Error Status Register (ESR).

Use the XCANFD_ESR_* constants defined in xcanfd_hw.h to interpret the returned value.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: The 32-bit value read from Error Status Register.

Note: None.

Referenced by XCanFd_IntrHandler().

#define XCanFd_GetRxIntrWatermark ( InstancePtr )

Value:

(XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, \

XCANFD_WIR_OFFSET) & XCANFD_WIR_MASK)

XCANFD_WIR_MASK

#define XCANFD_WIR_MASK

Rx FIFO Full watermark Mask.

Definition: xcanfd_hw.h:287

XCanFd_ReadReg

#define XCanFd_ReadReg(BaseAddress, RegOffset)

This macro reads the given register.

Definition: xcanfd_hw.h:1129

XCANFD_WIR_OFFSET

#define XCANFD_WIR_OFFSET

Rx FIFO Water Mark Register.

Definition: xcanfd_hw.h:282

This routine returns the Rx water Mark threshold Value.

Parameters

InstancePtr is a pointer to the XCanFd instance.

Returns: Threshold Value.

Note: none

#define XCanFd_GetStatus ( InstancePtr ) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_SR_OFFSET)

This function returns Status value from Status Register (SR).

Use the XCANFD_SR_* constants defined in xcanfd_hw.h to interpret the returned value.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: The 32-bit value read from Status Register.

Note: None.

Referenced by XCanFd_GetMode().

#define XCanFd_GetTImeStamp_Count ( InstancePtr )

Value:

(XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress,\

XCANFD_TIMESTAMPR_OFFSET) >> 16)

XCANFD_TIMESTAMPR_OFFSET

#define XCANFD_TIMESTAMPR_OFFSET

Time Stamp Register.

Definition: xcanfd_hw.h:304

XCanFd_ReadReg

#define XCanFd_ReadReg(BaseAddress, RegOffset)

This macro reads the given register.

Definition: xcanfd_hw.h:1129

This function returns Time Stamp Counter Value.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: TimeStampCount

Note: None.

#define XCANFD_H

by using protection macros

#define XCANFD_HANDLER_ERROR 3

Handler type for error interrupt.

Referenced by main(), and XCanFd_SetHandler().

#define XCANFD_HANDLER_EVENT 4

Handler type for all other interrupts.

Referenced by main(), and XCanFd_SetHandler().

#define XCANFD_HANDLER_RECV 2

Handler type for frame reception interrupt.

Referenced by main(), and XCanFd_SetHandler().

#define XCANFD_HANDLER_SEND 1

Handler type for frame sending interrupt.

Referenced by main(), and XCanFd_SetHandler().

#define XCANFD_HW_H

by using protection macros

#define XCANFD_ICR_OFFSET 0x024U

Interrupt Clear Register.

Referenced by XCanFd_InterruptClear().

#define XCANFD_IDR_ID1_MASK 0xFFE00000U

Standard Messg Ident Mask.

#define XCANFD_IDR_ID1_SHIFT 21U

Standard Messg Ident Shift.

#define XCANFD_IDR_ID2_MASK 0x0007FFFEU

Extended Message Ident Mask.

#define XCANFD_IDR_ID2_SHIFT 1U

Extended Message Ident Shift.

#define XCANFD_IDR_IDE_MASK 0x00080000U

Identifier Extension Mask.

#define XCANFD_IDR_IDE_SHIFT 19U

Identifier Extension Shift.

#define XCANFD_IDR_RTR_MASK 0x00000001U

Remote TX Request Mask.

#define XCANFD_IDR_SRR_MASK 0x00100000U

Substitute Remote TX Req.

#define XCANFD_IDR_SRR_SHIFT 20U

Substitue Remote TX Shift.

#define XCANFD_IER_OFFSET 0x020U

Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable(), and XCanFd_InterruptEnable().

#define XCANFD_IETCS_OFFSET 0x09CU

Tx Buffer Cancel Request Served Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable_CancelRqt(), and XCanFd_InterruptEnable_CancelRqt().

#define XCANFD_IETRS_OFFSET 0x094U

Tx Buffer Ready Request Served Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable_ReadyRqt(), and XCanFd_InterruptEnable_ReadyRqt().

#define XCanFd_InterruptGetEnabled ( InstancePtr ) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_IER_OFFSET)

This routine returns enabled interrupt(s).

Use the XCANFD_IXR_* constants defined in xcanfd_hw.h to interpret the returned value.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: Enabled interrupt(s) in a 32-bit format.

Note: None.

Referenced by XCanFd_InterruptDisable(), XCanFd_InterruptEnable(), and XCanFd_IntrHandler().

#define XCanFd_InterruptGetStatus ( InstancePtr ) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ISR_OFFSET)

This routine returns interrupt status read from Interrupt Status Register.

Use the XCANFD_IXR_* constants defined in xcanfd_hw.h to interpret the returned value.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: The value stored in Interrupt Status Register.

Note: None.

Referenced by XCanFd_InterruptClear(), and XCanFd_IntrHandler().

#define XCanFd_IsBufferTransmitted	(	InstancePtr,
		TxBuffer
	)

Value:

(((XCanFd_ReadReg((InstancePtr)->CanFdConfig.BaseAddress, \
                          XCANFD_TRR_OFFSET) & ((u32)1 << (TxBuffer))) \
          == (u32)1) ? FALSE : TRUE)

This macro checks whether Particular Buffer is Transmitted or not.

Transmit Ready Request Register gives which Buffer is transmitted if you trigger the Buffer1 then TRR Reg : 0x00000001 After transmission Core clears the bit TRR Reg : 0x00000000

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
TxBuffer	is the buffer where driver has written user data\

Returns

- TRUE if the device is busy and NOT ready to accept writes to AFIR and AFMR.

FALSE if the device is ready to accept writes to AFIR and AFMR.

Note: C-Style signature: int XCanFd_IsAcceptFilterBusy(XCanFd *InstancePtr);

Referenced by XCanFd_PollQueue_Buffer(), and XCanFd_SelfTest().

#define XCANFD_ISR_OFFSET 0x01CU

Interrupt Status Register.

Referenced by XCanFd_Recv_Mailbox().

#define XCanFd_IsTxDone ( InstancePtr )

Value:

((XCanFd_ReadReg(((InstancePtr)->CanFdConfig.BaseAddress), \

XCANFD_ISR_OFFSET) & XCANFD_IXR_TXOK_MASK) ? TRUE : FALSE)

XCanFd_ReadReg

#define XCanFd_ReadReg(BaseAddress, RegOffset)

This macro reads the given register.

Definition: xcanfd_hw.h:1129

XCANFD_IXR_TXOK_MASK

#define XCANFD_IXR_TXOK_MASK

TX Successful Interrupt Mask.

Definition: xcanfd_hw.h:468

XCANFD_ISR_OFFSET

#define XCANFD_ISR_OFFSET

Interrupt Status Register.

Definition: xcanfd_hw.h:72

This macro checks if the transmission is complete.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns

- TRUE if the transmission is done (completed).

FALSE if the transmission is not completed.

Note: C-Style signature: int XCanFd_IsTxDone(XCanFd *InstancePtr);

#define XCANFD_IXR_ALL

Value:

(XCANFD_IXR_PEE_MASK            | \
				 XCANFD_IXR_BSRD_MASK               | \
				 XCANFD_IXR_RXMNF_MASK              | \
				 XCANFD_IXR_RXBOFLW_MASK    | \
				 XCANFD_IXR_RXRBF_MASK              | \
				 XCANFD_IXR_TXCRS_MASK              | \
				 XCANFD_IXR_TXRRS_MASK              | \
				 XCANFD_IXR_RXFWMFLL_MASK   | \
				 XCANFD_IXR_WKUP_MASK               | \
				 XCANFD_IXR_SLP_MASK                | \
				 XCANFD_IXR_BSOFF_MASK              | \
				 XCANFD_IXR_ERROR_MASK              | \
				 XCANFD_IXR_RXFOFLW_MASK    | \
				 XCANFD_IXR_RXOK_MASK               | \
				 XCANFD_IXR_TXOK_MASK               | \
				 XCANFD_IXR_ARBLST_MASK      | \
				 XCANFD_IXR_TSCNT_OFLW_MASK  | \
				 XCANFD_IXR_RXFOFLW_1_MASK   | \
				 XCANFD_IXR_RXFWMFLL_1_MASK  | \
				 XCANFD_IXR_TXEOFLW_MASK     | \
				 XCANFD_IXR_TXEWMFLL_MASK)

Mask for Basic interrupts.

Referenced by main(), and XCanFd_InterruptEnable().

#define XCANFD_IXR_ARBLST_MASK 0x00000001U

Arbitration Lost Intr Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_BSOFF_MASK 0x00000200U

Bus Off Interrupt Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_BSRD_MASK 0x00000008U

Bus-Off recovery done Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_ERROR_MASK 0x00000100U

Error Interrupt Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_PEE_MASK 0x00000004U

Protocol Exception Intr Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_RXBOFLW_BI_MASK 0x3F000000U

Rx Buffer index for Overflow (Mailbox Mode)

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXBOFLW_MASK 0x00010000U

Rx Buffer Overflow interrupt Mask (Mailbox mode)

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_RXFOFLW_1_MASK 0x00008000U

RX FIFO 1 Overflow Intr Mask.

#define XCANFD_IXR_RXFOFLW_MASK 0x00000040U

RX FIFO Overflow Intr Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_RXFWMFLL_1_MASK 0x00010000U

Rx Watermark Full interrupt Mask for FIFO 1.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXFWMFLL_MASK 0x00001000U

Rx Watermark Full interrupt Mask (FIFO mode)

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXLRM_BI_MASK 0x00FC0000U

Rx Buffer index for Last Received Message (Mailbox Mode)

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_IXR_RXMNF_MASK 0x00020000U

Rx Match Not Finished Intr Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_RXOK_MASK 0x00000010U

New Message Received Intr.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXRBF_MASK 0x00008000U

Rx Buffer Full Interrupt Mask (Mailbox mode)

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_SLP_MASK 0x00000400U

Sleep Interrupt Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_TSCNT_OFLW_MASK 0x00000020U

Timestamp overflow Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_TXCRS_MASK 0x00004000U

Tx Cancellation Request Served Interrupt Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_TXEOFLW_MASK 0x40000000U

TX Event FIFO Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_TXEWMFLL_MASK 0x80000000U

TX Event FIFO Watermark Full Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_TXOK_MASK 0x00000002U

TX Successful Interrupt Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_TXRRS_MASK 0x00002000U

Tx Buffer Ready Request Served Interrupt Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_IXR_WKUP_MASK 0x00000800U

Wake up Interrupt Mask.

Referenced by main(), and XCanFd_IntrHandler().

#define XCANFD_MAILBOX_ID_OFFSET ( BufferNr ) (XCANFD_RXFIFO_0_BASE_ID_OFFSET+((UINTPTR)BufferNr*XCANFD_MAX_FRAME_SIZE))

This macro Returns the MAILBOX MODE ID Offset.

Parameters

BufferNr is the Buffer number to locate the FIFO

Note: none

Referenced by XCanFd_Set_MailBox_IdMask().

#define XCANFD_MAILBOX_MASK_OFFSET ( BufferNr ) (XCANFD_MAILBOX_RB_MASK_BASE_OFFSET+((UINTPTR)BufferNr*4U))

This macro Returns the MAILBOX MODE RXMASK Offset.

Parameters

BufferNr is the Buffer number to locate the FIFO

Note: none

Referenced by XCanFd_Set_MailBox_IdMask().

#define XCANFD_MAILBOX_NXT_RB 4U

Mailbox Next Buffer.

#define XCANFD_MAILBOX_RB_MASK_BASE_OFFSET 0x2F00U

Mailbox RxBuffer Mask Register.

#define XCANFD_MAX_F_SJW_VALUE 0x10

Synchronization Jump Width for Data Phase.

Referenced by XCanFd_SetFBitTiming().

#define XCANFD_MAX_F_TS1_VALUE 0x20

Time Segment 1 for Data Phase.

Referenced by XCanFd_SetFBitTiming().

#define XCANFD_MAX_F_TS2_VALUE 0x10

Time Segment 2 for Data Phase.

Referenced by XCanFd_SetFBitTiming().

#define XCANFD_MAX_FRAME_SIZE 72U

Maximum CAN frame length in bytes.

#define XCANFD_MAX_FRAME_SIZE_IN_BYTES 72

Maximum Frame size.

#define XCANFD_MAX_SJW_VALUE 0x80

Synchronization Jump Width.

Referenced by XCanFd_SetBitTiming().

#define XCANFD_MAX_TS1_VALUE 0x100

Time Segment 1.

Referenced by XCanFd_SetBitTiming().

#define XCANFD_MAX_TS2_VALUE 0x80

Time Segment 2.

Referenced by XCanFd_SetBitTiming().

#define XCANFD_MBRXBUF_MASK 0x0000FFFFU

Mailbox Max Rx Buffer mask.

Referenced by XCanFd_RxBuff_MailBox_DeActive().

#define XCANFD_MODE_ABR 0x00000020

Auto Bus-Off Recovery.

Referenced by XCanFd_EnterMode().

#define XCANFD_MODE_BR 0x0000000B

Bus-Off Recovery Mode.

#define XCANFD_MODE_CONFIG 0x00000001

Configuration mode.

Referenced by main(), XCanFd_EnterMode(), XCanFd_GetMode(), XCanFd_SelfTest(), XCanFd_SetBaudRatePrescaler(), XCanFd_SetBitTiming(), XCanFd_SetFBaudRatePrescaler(), XCanFd_SetFBitTiming(), XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), XCanFd_SetRxIntrWatermarkFifo1(), XCanFd_SetTxEventIntrWatermark(), and XCanFdPolledExample().

#define XCANFD_MODE_DAR 0x0000000A

Disable Auto Retransmission mode.

Referenced by XCanFd_EnterMode().

#define XCANFD_MODE_LOOPBACK 0x00000004

Loop Back mode.

Referenced by main(), XCanFd_EnterMode(), XCanFd_GetMode(), XCanFd_SelfTest(), and XCanFdPolledExample().

#define XCANFD_MODE_NORMAL 0x00000002

Normal mode.

Referenced by XCanFd_EnterMode(), and XCanFd_GetMode().

#define XCANFD_MODE_PEE 0x00000080

Protocol Exception mode.

Referenced by XCanFd_EnterMode(), and XCanFd_GetMode().

#define XCANFD_MODE_SBR 0x00000040

Starut Bus-Off Recovery.

Referenced by XCanFd_EnterMode().

#define XCANFD_MODE_SLEEP 0x00000008

Sleep mode.

Referenced by XCanFd_EnterMode(), and XCanFd_GetMode().

#define XCANFD_MODE_SNOOP 0x00000010

Snoop mode.

Referenced by XCanFd_EnterMode(), and XCanFd_GetMode().

#define XCANFD_MSR_ABR_MASK 0x00000080U

Auto Bus-Off Recovery Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_BRSD_MASK 0x00000008U

Bit Rate Switch Select Mask.

Referenced by XCanFd_SetBitRateSwitch_DisableNominal(), and XCanFd_SetBitRateSwitch_EnableNominal().

#define XCANFD_MSR_CONFIG_MASK 0x000000F8U

Configuration Mode Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_DAR_MASK 0x00000010U

Disable Auto-Retransmission Select Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_DPEE_MASK 0x00000020U

Protocol Exception Event Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_LBACK_MASK 0x00000002U

Loop Back Mode Select Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_OFFSET 0x004U

Mode Select Register.

Referenced by XCanFd_EnterMode(), XCanFd_SetBitRateSwitch_DisableNominal(), and XCanFd_SetBitRateSwitch_EnableNominal().

#define XCANFD_MSR_SBR_MASK 0x00000040U

Start Bus-Off Recovery Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_SLEEP_MASK 0x00000001U

Sleep Mode Select Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_SNOOP_MASK 0x00000004U

Snoop Mode Select Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_NOOF_AFR 32U

Number Of Acceptance FIlter Registers.

Referenced by XCanFd_AcceptFilterGet().

#define XCANFD_RCS0_OFFSET 0x0B0U

Rx Buffer Control Status 0 Register.

#define XCANFD_RCS1_OFFSET 0x0B4U

Rx Buffer Control Status 1 Register.

#define XCANFD_RCS2_OFFSET 0x0B8U

Rx Buffer Control Status 2 Register.

#define XCANFD_RCS_HCB_MASK 0xFFFFU

Rx Buffer Control Status Register Host Control Bit Mask.

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_RCS_OFFSET ( NoCtrlStatus ) (XCANFD_RCS0_OFFSET+((UINTPTR)NoCtrlStatus*4U))

This macro Returns the RCS Register Offset.

Parameters

NoCtrlStatus is to locate RCS Registers

Note: NoCtrlStatus = 0 -> RCS0 1 -> RCS1 2 -> RCS2

Referenced by XCanFd_Recv_Mailbox(), XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), and XCanFd_Set_MailBox_IdMask().

#define XCanFd_ReadReg	(	BaseAddress,
		RegOffset
	)	Xil_In32((BaseAddress) + (RegOffset))

This macro reads the given register.

Parameters

BaseAddress	is the base address of the device
RegOffset	is the register offset to be read

Returns: The 32-bit value of the register

Note: C-Style signature: u32 XCanFd_ReadReg(u32 BaseAddress, u32 RegOffset);

Referenced by XCanFd_AcceptFilterDisable(), XCanFd_AcceptFilterEnable(), XCanFd_AcceptFilterGet(), XCanFd_AcceptFilterGetEnabled(), XCanFd_Addto_Queue(), XCanFd_Disable_Tranceiver_Delay_Compensation(), XCanFd_Enable_Tranceiver_Delay_Compensation(), XCanFd_EnterMode(), XCanFd_GetBaudRatePrescaler(), XCanFd_GetBitTiming(), XCanFd_GetBusErrorCounter(), XCanFd_GetFBaudRatePrescaler(), XCanFd_GetFBitTiming(), XCanFd_GetFreeBuffer(), XCanFd_GetNofMessages_Stored_Rx_Fifo(), XCanFd_GetNofMessages_Stored_TXE_FIFO(), XCanFd_InterruptDisable_CancelRqt(), XCanFd_InterruptDisable_ReadyRqt(), XCanFd_InterruptDisable_RxBuffFull(), XCanFd_InterruptEnable_CancelRqt(), XCanFd_InterruptEnable_ReadyRqt(), XCanFd_InterruptEnable_RxBuffFull(), XCanFd_Pee_BusOff_Handler(), XCanFd_Recv_Mailbox(), XCanFd_Recv_Sequential(), XCanFd_Recv_TXEvents_Sequential(), XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), XCanFd_Send(), XCanFd_Set_MailBox_IdMask(), XCanFd_Set_Tranceiver_Delay_Compensation(), XCanFd_SetBitRateSwitch_DisableNominal(), XCanFd_SetBitRateSwitch_EnableNominal(), XCanFd_SetFBaudRatePrescaler(), XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), XCanFd_SetRxIntrWatermarkFifo1(), XCanFd_SetTxEventIntrWatermark(), and XCanFd_TxBuffer_Cancel_Request().

#define XCanFd_Reset ( InstancePtr )

Value:

XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_SRR_OFFSET,\

XCANFD_SRR_SRST_MASK)

XCanFd_WriteReg

#define XCanFd_WriteReg(BaseAddress, RegOffset, Data)

This macro writes the given register.

Definition: xcanfd_hw.h:1147

XCANFD_SRR_OFFSET

#define XCANFD_SRR_OFFSET

Software Reset Register.

Definition: xcanfd_hw.h:64

XCANFD_SRR_SRST_MASK

#define XCANFD_SRR_SRST_MASK

Reset Mask.

Definition: xcanfd_hw.h:313

This function resets the CAN device.

Calling this function resets the device immediately, and any pending transmission or reception is terminated at once. Both Object Layer and Transfer Layer are reset. This function does not reset the Physical Layer. All registers are reset to the default values, and no previous status will be restored. TX FIFO, RX FIFO and TX High Priority Buffer are also reset.

When a reset is required due to an internal error, the driver notifies the upper layer software of this need through the error status code or interrupts The upper layer software is responsible for calling this Reset function and then re-configuring the device.

The CAN device will be in Configuration Mode immediately after this function returns.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: None.

Note: None.

Referenced by XCanFd_CfgInitialize(), and XCanFd_SelfTest().

#define XCANFD_RSD0_OFFSET 0x0A0U

Reserved.

#define XCANFD_RSD1_OFFSET 0x0A4U

Reserved.

#define XCANFD_RSD2_OFFSET 0x0A8U

Reserved.

#define XCANFD_RSD3_OFFSET 0x0ACU

Reserved.

#define XCANFD_RX_FIFO_0 0

Selection for RX Fifo 0.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo(), and XCanFd_Recv_Sequential().

#define XCANFD_RX_FIFO_1 1

Selection for RX Fifo 1.

Referenced by XCanFd_Recv_Sequential().

#define XCANFD_RXBFLL1_OFFSET 0x0C0U

Rx Buffer Full Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable_RxBuffFull(), and XCanFd_InterruptEnable_RxBuffFull().

#define XCANFD_RXBFLL2_OFFSET 0x0C4U

Rx Buffer Full Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable_RxBuffFull(), and XCanFd_InterruptEnable_RxBuffFull().

#define XCANFD_RXBUFFER0_FULL_MASK 0x00000001U

RxBuffer0 Full Mask.

#define XCANFD_RXBUFFER10_FULL_MASK 0x00000400U

RxBuffer10 Full Mask.

#define XCANFD_RXBUFFER11_FULL_MASK 0x00000800U

RxBuffer11 Full Mask.

#define XCANFD_RXBUFFER12_FULL_MASK 0x00001000U

RxBuffer12 Full Mask.

#define XCANFD_RXBUFFER13_FULL_MASK 0x00002000U

RxBuffer13 Full Mask.

#define XCANFD_RXBUFFER14_FULL_MASK 0x00004000U

RxBuffer14 Full Mask.

#define XCANFD_RXBUFFER15_FULL_MASK 0x00008000U

RxBuffer15 Full Mask.

#define XCANFD_RXBUFFER16_FULL_MASK 0x00010000U

RxBuffer16 Full Mask.

#define XCANFD_RXBUFFER17_FULL_MASK 0x00020000U

RxBuffer17 Full Mask.

#define XCANFD_RXBUFFER18_FULL_MASK 0x00040000U

RxBuffer18 Full Mask.

#define XCANFD_RXBUFFER19_FULL_MASK 0x00080000U

RxBuffer19 Full Mask.

#define XCANFD_RXBUFFER1_FULL_MASK 0x00000002U

RxBuffer1 Full Mask.

#define XCANFD_RXBUFFER20_FULL_MASK 0x00100000U

RxBuffer20 Full Mask.

#define XCANFD_RXBUFFER21_FULL_MASK 0x00200000U

RxBuffer21 Full Mask.

#define XCANFD_RXBUFFER22_FULL_MASK 0x00400000U

RxBuffer22 Full Mask.

#define XCANFD_RXBUFFER23_FULL_MASK 0x00800000U

RxBuffer23 Full Mask.

#define XCANFD_RXBUFFER24_FULL_MASK 0x01000000U

RxBuffer24 Full Mask.

#define XCANFD_RXBUFFER25_FULL_MASK 0x02000000U

RxBuffer25 Full Mask.

#define XCANFD_RXBUFFER26_FULL_MASK 0x04000000U

RxBuffer26 Full Mask.

#define XCANFD_RXBUFFER27_FULL_MASK 0x08000000U

RxBuffer27 Full Mask.

#define XCANFD_RXBUFFER28_FULL_MASK 0x10000000U

RxBuffer28 Full Mask.

#define XCANFD_RXBUFFER29_FULL_MASK 0x20000000U

RxBuffer29 Full Mask.

#define XCANFD_RXBUFFER2_FULL_MASK 0x00000004U

RxBuffer2 Full Mask.

#define XCANFD_RXBUFFER30_FULL_MASK 0x40000000U

RxBuffer30 Full Mask.

#define XCANFD_RXBUFFER31_FULL_MASK 0x80000000U

RxBuffer31 Full Mask.

#define XCANFD_RXBUFFER32_FULL_MASK 0x00000001U

RxBuffer32 Full Mask.

#define XCANFD_RXBUFFER33_FULL_MASK 0x00000002U

RxBuffer33 Full Mask.

#define XCANFD_RXBUFFER34_FULL_MASK 0x00000004U

RxBuffer34 Full Mask.

#define XCANFD_RXBUFFER35_FULL_MASK 0x00000008U

RxBuffer35 Full Mask.

#define XCANFD_RXBUFFER36_FULL_MASK 0x00000010U

RxBuffer36 Full Mask.

#define XCANFD_RXBUFFER37_FULL_MASK 0x00000020U

RxBuffer37 Full Mask.

#define XCANFD_RXBUFFER38_FULL_MASK 0x00000040U

RxBuffer38 Full Mask.

#define XCANFD_RXBUFFER39_FULL_MASK 0x00000080U

RxBuffer39 Full Mask.

#define XCANFD_RXBUFFER3_FULL_MASK 0x00000008U

RxBuffer3 Full Mask.

#define XCANFD_RXBUFFER40_FULL_MASK 0x00000100U

RxBuffer40 Full Mask.

#define XCANFD_RXBUFFER41_FULL_MASK 0x00000200U

RxBuffer41 Full Mask.

#define XCANFD_RXBUFFER42_FULL_MASK 0x00000400U

RxBuffer42 Full Mask.

#define XCANFD_RXBUFFER43_FULL_MASK 0x00000800U

RxBuffer43 Full Mask.

#define XCANFD_RXBUFFER44_FULL_MASK 0x00001000U

RxBuffer44 Full Mask.

#define XCANFD_RXBUFFER45_FULL_MASK 0x00002000U

RxBuffer45 Full Mask.

#define XCANFD_RXBUFFER46_FULL_MASK 0x00004000U

RxBuffer46 Full Mask.

#define XCANFD_RXBUFFER47_FULL_MASK 0x00008000U

RxBuffer47 Full Mask.

#define XCANFD_RXBUFFER4_FULL_MASK 0x00000010U

RxBuffer4 Full Mask.

#define XCANFD_RXBUFFER5_FULL_MASK 0x00000020U

RxBuffer5 Full Mask.

#define XCANFD_RXBUFFER6_FULL_MASK 0x00000040U

RxBuffer6 Full Mask.

#define XCANFD_RXBUFFER7_FULL_MASK 0x00000080U

RxBuffer7 Full Mask.

#define XCANFD_RXBUFFER8_FULL_MASK 0x00000100U

RxBuffer8 Full Mask.

#define XCANFD_RXBUFFER9_FULL_MASK 0x00000200U

RxBuffer9 Full Mask.

#define XCANFD_RXDLC_OFFSET ( ReadIndex ) (XCANFD_RXFIFO_0_BASE_DLC_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER DLC Offset.

Parameters

ReadIndex is the Buffer number to locate the FIFO

Note: none

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_RXDW_OFFSET ( ReadIndex ) (XCANFD_RXFIFO_0_BASE_DW0_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER DW Offset.

Parameters

ReadIndex is the Buffer number to locate the FIFO

Note: none

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_RXFIFO_0_BASE_DLC_OFFSET 0x2104U

Rx Message Buffer Element 0 DLC Register.

#define XCANFD_RXFIFO_0_BASE_DW0_OFFSET 0x2108U

Rx Message Buffer Element 0 DW Register.

#define XCANFD_RXFIFO_0_BASE_ID_OFFSET 0x2100U

Rx Message Buffer Element 0 ID Register.

#define XCANFD_RXFIFO_1_BUFFER_0_BASE_DLC_OFFSET 0x4104U

Rx Message Buffer Element 0 DLC Register.

#define XCANFD_RXFIFO_1_BUFFER_0_BASE_DW0_OFFSET 0x4108U

Rx Message Buffer Element 0 DW Register.

#define XCANFD_RXFIFO_1_BUFFER_0_BASE_ID_OFFSET 0x4100U

Rx Message Buffer Element 0 ID Register.

#define XCANFD_RXFIFO_NEXTDLC_OFFSET 72U

Rx Message Buffer Element Next DLC AT Offset.

#define XCANFD_RXFIFO_NEXTDW_OFFSET 72U

Rx Message Buffer Element Next DW AT Offset.

#define XCANFD_RXFIFO_NEXTID_OFFSET 72U

Rx Message Buffer Element Next ID AT Offset.

#define XCANFD_RXID_OFFSET ( ReadIndex ) (XCANFD_RXFIFO_0_BASE_ID_OFFSET+((UINTPTR)ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER ID Offset.

Parameters

ReadIndex is the Buffer number to locate the FIFO

Note: none

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_RXLRM_BI_SHIFT 18U

Rx Buffer Index Shift Value.

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_SR_BBSY_MASK 0x00000020U

Bus Busy Mask.

#define XCANFD_SR_BIDLE_MASK 0x00000010U

Bus Idle Mask.

#define XCANFD_SR_BSFR_CONFIG_MASK 0x00000400U

Bus-Off recovery Mode Indicator Mask.

#define XCANFD_SR_CONFIG_MASK 0x00000001U

Configuration Mode Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_ERRWRN_MASK 0x00000040U

Error Warning Mask.

#define XCANFD_SR_ESTAT_MASK 0x00000180U

Error Status Mask.

#define XCANFD_SR_ESTAT_SHIFT 7U

Error Status Shift.

#define XCANFD_SR_LBACK_MASK 0x00000002U

Loop Back Mode Mask.

#define XCANFD_SR_NISO_MASK 0x00000800U

Non-ISO Core Mask.

#define XCANFD_SR_NORMAL_MASK 0x00000008U

Normal Mode Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_OFFSET 0x018U

Status Register.

#define XCANFD_SR_PEE_CONFIG_MASK 0x00000200U

Protocol Exception Mode Indicator Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_SLEEP_MASK 0x00000004U

Sleep Mode Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_SNOOP_MASK 0x00001000U

Snoop Mode Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_TDCV_MASK 0x007F0000U

Transceiver Dealy compensation Mask.

#define XCANFD_SRR_CEN_MASK 0x00000002U

Can Enable Mask.

Referenced by XCanFd_EnterMode(), XCanFd_SetBitRateSwitch_DisableNominal(), and XCanFd_SetBitRateSwitch_EnableNominal().

#define XCANFD_SRR_OFFSET 0x000U

Software Reset Register.

Referenced by XCanFd_EnterMode().

#define XCANFD_SRR_SRST_MASK 0x00000001U

Reset Mask.

#define XCANFD_TCR_OFFSET 0x098U

Tx Buffer Cancel Request Register.

Referenced by XCanFd_Pee_BusOff_Handler(), and XCanFd_TxBuffer_Cancel_Request().

#define XCANFD_TIMESTAMPR_OFFSET 0x0028U

Time Stamp Register.

#define XCANFD_TRR_MASK 0xFFFFFFFFU

Transmit Ready request All Mask.

#define XCANFD_TRR_OFFSET 0x090U

Tx Buffer Ready Request Register.

Referenced by XCanFd_Addto_Queue(), XCanFd_GetFreeBuffer(), XCanFd_Pee_BusOff_Handler(), XCanFd_Send(), XCanFd_Send_Queue(), and XCanFd_TxBuffer_Cancel_Request().

#define XCANFD_TXBUFFER0_CANCEL_RQT_MASK 0x00000001U

TxBuffer0 Cancel Request Mask.

#define XCANFD_TXBUFFER0_RDY_RQT_MASK 0x00000001U

TxBuffer0 Ready Request Mask.

#define XCANFD_TXBUFFER10_CANCEL_RQT_MASK 0x00000400U

TxBuffer10 Cancel Request Mask.

#define XCANFD_TXBUFFER10_RDY_RQT_MASK 0x00000400U

TxBuffer10 Ready Request Mask.

#define XCANFD_TXBUFFER11_CANCEL_RQT_MASK 0x00000800U

TxBuffer11 Cancel Request Mask.

#define XCANFD_TXBUFFER11_RDY_RQT_MASK 0x00000800U

TxBuffer11 Ready Request Mask.

#define XCANFD_TXBUFFER12_CANCEL_RQT_MASK 0x00001000U

TxBuffer12 Cancel Request Mask.

#define XCANFD_TXBUFFER12_RDY_RQT_MASK 0x00001000U

TxBuffer12 Ready Request Mask.

#define XCANFD_TXBUFFER13_CANCEL_RQT_MASK 0x00002000U

TxBuffer13 Cancel Request Mask.

#define XCANFD_TXBUFFER13_RDY_RQT_MASK 0x00002000U

TxBuffer13 Ready Request Mask.

#define XCANFD_TXBUFFER14_CANCEL_RQT_MASK 0x00004000U

TxBuffer14 Cancel Request Mask.

#define XCANFD_TXBUFFER14_RDY_RQT_MASK 0x00004000U

TxBuffer14 Ready Request Mask.

#define XCANFD_TXBUFFER15_CANCEL_RQT_MASK 0x00008000U

TxBuffer15 Cancel Request Mask.

#define XCANFD_TXBUFFER15_RDY_RQT_MASK 0x00008000U

TxBuffer15 Ready Request Mask.

#define XCANFD_TXBUFFER16_CANCEL_RQT_MASK 0x00010000U

TxBuffer16 Cancel Request Mask.

#define XCANFD_TXBUFFER16_RDY_RQT_MASK 0x00010000U

TxBuffer16 Ready Request Mask.

#define XCANFD_TXBUFFER17_CANCEL_RQT_MASK 0x00020000U

TxBuffer17 Cancel Request Mask.

#define XCANFD_TXBUFFER17_RDY_RQT_MASK 0x00020000U

TxBuffer17 Ready Request Mask.

#define XCANFD_TXBUFFER18_CANCEL_RQT_MASK 0x00040000U

TxBuffer18 Cancel Request Mask.

#define XCANFD_TXBUFFER18_RDY_RQT_MASK 0x00040000U

TxBuffer18 Ready Request Mask.

#define XCANFD_TXBUFFER19_CANCEL_RQT_MASK 0x00080000U

TxBuffer19 Cancel Request Mask.

#define XCANFD_TXBUFFER19_RDY_RQT_MASK 0x00080000U

TxBuffer19 Ready Request Mask.

#define XCANFD_TXBUFFER1_CANCEL_RQT_MASK 0x00000002U

TxBuffer1 Cancel Request Mask.

#define XCANFD_TXBUFFER1_RDY_RQT_MASK 0x00000002U

TxBuffer1 Ready Request Mask.

#define XCANFD_TXBUFFER20_CANCEL_RQT_MASK 0x00100000U

TxBuffer20 Cancel Request Mask.

#define XCANFD_TXBUFFER20_RDY_RQT_MASK 0x00100000U

TxBuffer20 Ready Request Mask.

#define XCANFD_TXBUFFER21_CANCEL_RQT_MASK 0x00200000U

TxBuffer21 Cancel Request Mask.

#define XCANFD_TXBUFFER21_RDY_RQT_MASK 0x00200000U

TxBuffer21 Ready Request Mask.

#define XCANFD_TXBUFFER22_CANCEL_RQT_MASK 0x00400000U

TxBuffer22 Cancel Request Mask.

#define XCANFD_TXBUFFER22_RDY_RQT_MASK 0x00400000U

TxBuffer22 Ready Request Mask.

#define XCANFD_TXBUFFER23_CANCEL_RQT_MASK 0x00800000U

TxBuffer23 Cancel Request Mask.

#define XCANFD_TXBUFFER23_RDY_RQT_MASK 0x00800000U

TxBuffer23 Ready Request Mask.

#define XCANFD_TXBUFFER24_CANCEL_RQT_MASK 0x01000000U

TxBuffer24 Cancel Request Mask.

#define XCANFD_TXBUFFER24_RDY_RQT_MASK 0x01000000U

TxBuffer24 Ready Request Mask.

#define XCANFD_TXBUFFER25_CANCEL_RQT_MASK 0x02000000U

TxBuffer25 Cancel Request Mask.

#define XCANFD_TXBUFFER25_RDY_RQT_MASK 0x02000000U

TxBuffer25 Ready Request Mask.

#define XCANFD_TXBUFFER26_CANCEL_RQT_MASK 0x04000000U

TxBuffer26 Cancel Request Mask.

#define XCANFD_TXBUFFER26_RDY_RQT_MASK 0x04000000U

TxBuffer26 Ready Request Mask.

#define XCANFD_TXBUFFER27_CANCEL_RQT_MASK 0x08000000U

TxBuffer27 Cancel Request Mask.

#define XCANFD_TXBUFFER27_RDY_RQT_MASK 0x08000000U

TxBuffer27 Ready Request Mask.

#define XCANFD_TXBUFFER28_CANCEL_RQT_MASK 0x10000000U

TxBuffer28 Cancel Request Mask.

#define XCANFD_TXBUFFER28_RDY_RQT_MASK 0x10000000U

TxBuffer28 Ready Request Mask.

#define XCANFD_TXBUFFER29_CANCEL_RQT_MASK 0x20000000U

TxBuffer29 Cancel Request Mask.

#define XCANFD_TXBUFFER29_RDY_RQT_MASK 0x20000000U

TxBuffer29 Ready Request Mask.

#define XCANFD_TXBUFFER2_CANCEL_RQT_MASK 0x00000004U

TxBuffer2 Cancel Request Mask.

#define XCANFD_TXBUFFER2_RDY_RQT_MASK 0x00000004U

TxBuffer2 Ready Request Mask.

#define XCANFD_TXBUFFER30_CANCEL_RQT_MASK 0x40000000U

TxBuffer30 Cancel Request Mask.

#define XCANFD_TXBUFFER30_RDY_RQT_MASK 0x40000000U

TxBuffer30 Ready Request Mask.

#define XCANFD_TXBUFFER31_CANCEL_RQT_MASK 0x80000000U

TxBuffer31 Cancel Request Mask.

#define XCANFD_TXBUFFER31_RDY_RQT_MASK 0x80000000U

TxBuffer31 Ready Request Mask.

#define XCANFD_TXBUFFER3_CANCEL_RQT_MASK 0x00000008U

TxBuffer3 Cancel Request Mask.

#define XCANFD_TXBUFFER3_RDY_RQT_MASK 0x00000008U

TxBuffer3 Ready Request Mask.

#define XCANFD_TXBUFFER4_CANCEL_RQT_MASK 0x00000010U

TxBuffer4 Cancel Request Mask.

#define XCANFD_TXBUFFER4_RDY_RQT_MASK 0x00000010U

TxBuffer4 Ready Request Mask.

#define XCANFD_TXBUFFER5_CANCEL_RQT_MASK 0x00000020U

TxBuffer5 Cancel Request Mask.

#define XCANFD_TXBUFFER5_RDY_RQT_MASK 0x00000020U

TxBuffer5 Ready Request Mask.

#define XCANFD_TXBUFFER6_CANCEL_RQT_MASK 0x00000040U

TxBuffer6 Cancel Request Mask.

#define XCANFD_TXBUFFER6_RDY_RQT_MASK 0x00000040U

TxBuffer6 Ready Request Mask.

#define XCANFD_TXBUFFER7_CANCEL_RQT_MASK 0x00000080U

TxBuffer7 Cancel Request Mask.

#define XCANFD_TXBUFFER7_RDY_RQT_MASK 0x00000080U

TxBuffer7 Ready Request Mask.

#define XCANFD_TXBUFFER8_CANCEL_RQT_MASK 0x00000100U

TxBuffer8 Cancel Request Mask.

#define XCANFD_TXBUFFER8_RDY_RQT_MASK 0x00000100U

TxBuffer8 Ready Request Mask.

#define XCANFD_TXBUFFER9_CANCEL_RQT_MASK 0x00000200U

TxBuffer9 Cancel Request Mask.

#define XCANFD_TXBUFFER9_RDY_RQT_MASK 0x00000200U

TxBuffer9 Ready Request Mask.

#define XCANFD_TXBUFFER_ALL_RDY_RQT_MASK 0xFFFFFFFFU

 TxBuffer Ready

Request Mask for ALL

#define XCANFD_TXBUFFER_CANCEL_RQT_ALL_MASK 0xFFFFFFFFU

TxBuffer Cancel Request Mask for ALL.

#define XCANFD_TXDLC_OFFSET ( FreeBuffer ) (XCANFD_TXFIFO_0_BASE_DLC_OFFSET+((UINTPTR)FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))

This macro Returns the TXBUFFER DLC Offset.

Parameters

FreeBuffer is the Buffer number to locate the FIFO

Note: none

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

#define XCANFD_TXDW_OFFSET ( FreeBuffer ) (XCANFD_TXFIFO_0_BASE_DW0_OFFSET+((UINTPTR)FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))

This macro Returns the TXBUFFER DW Offset.

Parameters

FreeBuffer is the Buffer number to locate the FIFO

Note: none

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

#define XCANFD_TXE_FL_MASK 0x00001F00U

TX Event FIFO Fill Level Mask.

Referenced by XCanFd_GetNofMessages_Stored_TXE_FIFO(), and XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXE_FL_SHIFT 8U

TX Event FIFO Fill Level Shift.

Referenced by XCanFd_GetNofMessages_Stored_TXE_FIFO().

#define XCANFD_TXE_FSR_OFFSET 0x000000A0U

TX Event FIFO Status Register Offset.

Referenced by XCanFd_GetNofMessages_Stored_TXE_FIFO(), and XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXE_FWM_MASK 0x0000001FU

TX Event FIFO watermark Mask.

#define XCANFD_TXE_FWM_OFFSET 0x000000A4U

TX Event FIFO watermark Offset.

#define XCANFD_TXE_IRI_MASK 0x00000080U

TX Event FIFO Increment Read Index Mask.

Referenced by XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXE_IRI_SHIFT 7U

TX Event FIFO Increment Read Index SHIFT.

#define XCANFD_TXE_MESSAGE_SIZE 8U

TX Message Size.

#define XCANFD_TXE_RI_MASK 0x0000001FU

TX Event FIFO Read Index Mask.

Referenced by XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXEDLC_OFFSET ( TXEVENTIndex ) (XCANFD_TXEFIFO_0_BASE_DLC_OFFSET+((UINTPTR)TXEVENTIndex*XCANFD_TXE_MESSAGE_SIZE))

This macro Returns the TX Event Buffer DLC Offset.

Parameters

TXEVENTIndex is the Buffer number to locate the FIFO

Note: This API is meant to be used with IP with CanFD 2.0 spec support only.

Referenced by XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXEFIFO_0_BASE_DLC_OFFSET 0x2004U

Tx Event Message Buffer Element 0 DLC Register.

#define XCANFD_TXEFIFO_0_BASE_ID_OFFSET 0x2000U

Tx Event Message Buffer Element 0 ID Register.

#define XCANFD_TXEID_OFFSET ( TXEVENTIndex ) (XCANFD_TXEFIFO_0_BASE_ID_OFFSET+((UINTPTR)TXEVENTIndex*XCANFD_TXE_MESSAGE_SIZE))

This macro Returns the TX Event Buffer ID Offset.

Parameters

TXEVENTIndex is the Buffer number to locate the TXE FIFO Index

Note: This API is meant to be used with IP with CanFD 2.0 spec support only.

Referenced by XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXEVENT_WIR_MASK 0x0FU

TX Event Watermark Mask.

Referenced by XCanFd_SetTxEventIntrWatermark().

#define XCANFD_TXEVENT_WIR_OFFSET 0x000000A4U

TX FIFO Watermark Offset.

Referenced by XCanFd_SetTxEventIntrWatermark().

#define XCANFD_TXFIFO_0_BASE_DLC_OFFSET 0x0104U

Tx Message Buffer Element 0 DLC Register.

#define XCANFD_TXFIFO_0_BASE_DW0_OFFSET 0x0108U

Tx Message Buffer Element 0 DW Register.

#define XCANFD_TXFIFO_0_BASE_ID_OFFSET 0x0100U

Tx Message Buffer Element 0 ID Register.

#define XCANFD_TXID_OFFSET ( FreeBuffer ) (XCANFD_TXFIFO_0_BASE_ID_OFFSET+((UINTPTR)FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))

This macro Returns the TXBUFFER ID Offset.

Parameters

FreeBuffer is the Buffer number to locate the FIFO Index

Note: none

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

#define XCANFD_WIR_MASK 0x0000003FU

Rx FIFO Full watermark Mask.

Referenced by XCanFd_SetRxIntrWatermark().

#define XCANFD_WIR_OFFSET 0x0ECU

Rx FIFO Water Mark Register.

Referenced by XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), and XCanFd_SetRxIntrWatermarkFifo1().

#define XCANFD_WM_FIFO0_THRESHOLD 63

Watermark Threshold Value.

Referenced by XCanFd_SetRxIntrWatermark().

#define XCANFD_WMR_RXFP_MASK 0x001F0000U

Receive filter partition Mask.

Referenced by XCanFd_SetRxFilterPartition().

#define XCANFD_WMR_RXFP_SHIFT 16U

Receive filter partition Mask.

Referenced by XCanFd_SetRxFilterPartition().

#define XCANFD_WMR_RXFWM_1_MASK 0x00003F00U

RX FIFO 1 Full Watermark Mask.

Referenced by XCanFd_SetRxIntrWatermarkFifo1().

#define XCANFD_WMR_RXFWM_1_MASK 0x00003F00U

RX FIFO 1 Full Watermark Mask.

#define XCANFD_WMR_RXFWM_1_SHIFT 8U

RX FIFO 1 Full Watermark Mask.

Referenced by XCanFd_SetRxIntrWatermarkFifo1().

#define XCANFD_WMR_RXFWM_MASK 0x0000003FU

RX FIFO 0 Full Watermark Mask.

#define XCanFd_WriteReg	(	BaseAddress,
		RegOffset,
		Data
	)	Xil_Out32((BaseAddress) + (RegOffset), (Data))

This macro writes the given register.

Parameters

BaseAddress	is the base address of the device
RegOffset	is the register offset to be written
Data	is the 32-bit value to write to the register

Returns: None.

Note: C-Style signature: u32 XCanFd_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data);

Referenced by XCanFd_AcceptFilterDisable(), XCanFd_AcceptFilterEnable(), XCanFd_AcceptFilterSet(), XCanFd_Addto_Queue(), XCanFd_Disable_Tranceiver_Delay_Compensation(), XCanFd_Enable_Tranceiver_Delay_Compensation(), XCanFd_EnterMode(), XCanFd_InterruptClear(), XCanFd_InterruptDisable(), XCanFd_InterruptDisable_CancelRqt(), XCanFd_InterruptDisable_ReadyRqt(), XCanFd_InterruptDisable_RxBuffFull(), XCanFd_InterruptEnable(), XCanFd_InterruptEnable_CancelRqt(), XCanFd_InterruptEnable_ReadyRqt(), XCanFd_InterruptEnable_RxBuffFull(), XCanFd_Pee_BusOff_Handler(), XCanFd_Recv_Mailbox(), XCanFd_Recv_TXEvents_Sequential(), XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), XCanFd_Send(), XCanFd_Send_Queue(), XCanFd_Set_MailBox_IdMask(), XCanFd_Set_Tranceiver_Delay_Compensation(), XCanFd_SetBaudRatePrescaler(), XCanFd_SetBitRateSwitch_DisableNominal(), XCanFd_SetBitRateSwitch_EnableNominal(), XCanFd_SetBitTiming(), XCanFd_SetFBaudRatePrescaler(), XCanFd_SetFBitTiming(), XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), XCanFd_SetRxIntrWatermarkFifo1(), XCanFd_SetTxEventIntrWatermark(), and XCanFd_TxBuffer_Cancel_Request().

#define XST_BUFFER_ALREADY_FILLED 34L

Given Buffer is Already filled.

#define XST_INVALID_DLC 16L

Invalid Dlc code.

Referenced by XCanFd_GetLen2Dlc().

#define XST_NOBUFFER 33L

All Buffers (32) are filled.

Typedef Documentation

typedef void(* XCanFd_ErrorHandler)(void *CallBackRef, u32 ErrorMask)

Callback type for error interrupt.

Parameters

CallBackRef	is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
ErrorMask	is a bit mask indicating the cause of the error. Its value equals 'OR'ing one or more XCANFD_ESR_* values defined in xcan_l.h

typedef void(* XCanFd_EventHandler)(void *CallBackRef, u32 Mask)

Callback type for all kinds of interrupts except sending frame interrupt, receiving frame interrupt, and error interrupt.

Parameters

CallBackRef	is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
Mask	is a bit mask indicating the pending interrupts. Its value equals 'OR'ing one or more XCANFD_IXR_* defined in xcanfd_hw.h

typedef void(* XCanFd_SendRecvHandler)(void *CallBackRef)

Callback type for frame sending and reception interrupts.

Parameters

CallBackRef is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.

Function Documentation

void XCanFd_AcceptFilterDisable	(	XCanFd *	InstancePtr,
		u32	FilterIndexMask
	)

This routine disables the acceptance filters.

32 filters can be disabled.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
FilterIndexMask	specifies which filter(s) to disable. Use any XCANFD_AFR_UAF_MASK to disable one filter, and "Or" multiple XCANFD_AFR_UAF_MASK values if multiple filters need to be disabled. Any filter not specified in this parameter will keep its previous enable/disable setting. If all acceptance filters are disabled then all received frames are stored in the RX FIFO.

Returns: None.

Note: None

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_AFR_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

void XCanFd_AcceptFilterEnable	(	XCanFd *	InstancePtr,
		u32	FilterIndexMask
	)

This routine enables the acceptance filters.

Up to 32 filters can be enabled.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
FilterIndexMask	specifies which filter(s) to enable. Use any XCANFD_AFR_UAF_MASK to enable one filter, and "Or" multiple XCANFD_AFR_UAF_MASK values if multiple filters need to be enabled. Any filter not specified in this parameter will keep its previous enable/disable setting.

Returns: None.

Note: In Sequential Mode, in order to receive data, we need to enable these filters. if we want to make filtration i.e Id match then we need to set the Id value in AFR Id register.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_AFR_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

void XCanFd_AcceptFilterGet	(	XCanFd *	InstancePtr,
		u32	FilterIndex,
		u32 *	MaskValue,
		u32 *	IdValue
	)

This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter.

Use XCANFD_IDR_* defined in xcanfd_hw.h to interpret the values. Read xcanfd.h and device specification for details.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
FilterIndex	defines which Acceptance Filter Mask Register to get Mask and ID from. Use any single XCANFD_FILTER_* value.
MaskValue	will store the Mask value read from the chosen Acceptance Filter Mask Register after this function returns.
IdValue	will store the ID value read from the chosen Acceptance Filter ID Register after this function returns.

Returns: None.

Note: Acceptance Filter Mask and ID Registers are optional registers in Xilinx CAN device. If they are NOT existing in the device, this function should NOT be used. Calling this function in this case will cause an assertion failure.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, MAX_FILTER_INDEX, MIN_FILTER_INDEX, XCANFD_AFIDR_OFFSET, XCANFD_AFMR_OFFSET, XCANFD_NOOF_AFR, and XCanFd_ReadReg.

u32 XCanFd_AcceptFilterGetEnabled ( XCanFd * InstancePtr )

This function returns enabled acceptance filters.

Use XCANFD_AFR_UAF*_MASK defined in xcanfd_hw.h to interpret the returned value. If no acceptance filters are enabled then all received frames are stored in the RX FIFO.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: The value stored in Acceptance Filter Register.

Note: Acceptance Filter Register is an optional register in Xilinx CAN device If it is NOT existing in the device, this function should NOT be used.Calling this function in this case will cause an assertion failure.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_AFR_OFFSET, and XCanFd_ReadReg.

Referenced by XCanFd_AcceptFilterSet().

int XCanFd_AcceptFilterSet	(	XCanFd *	InstancePtr,
		u32	FilterIndex,
		u32	MaskValue,
		u32	IdValue
	)

This function sets values to the Acceptance Filter Mask Register (AFMR) and Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter.

Use XCANFD_IDR_* defined in xcanfd_hw.h to create the values to set the filter. Read xcanfd.h and device specification for details.

This function should be called only after:

The given filter is disabled by calling XCanFd_AcceptFilterDisable();
And the CAN device is ready to accept writes to AFMR and AFIR, i.e., XCanFd_IsAcceptFilterBusy() returns FALSE.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
FilterIndex	defines which Acceptance Filter Mask and ID Register to set. Use any single XCANFD_AFR_UAF*_MASK value.ranges from 1 32
MaskValue	is the value to write to the chosen Acceptance Filter Mask Register.
IdValue	is the value to write to the chosen Acceptance Filter ID Register.

Returns

- XST_SUCCESS if the values were set successfully.

XST_FAILURE if the given filter was not disabled, or the CAN device was not ready to accept writes to AFMR and AFIR.

Note: Acceptance Filter Mask and ID Registers are optional registers in Xilinx XCanFd device.if they are not configured then device will receive data with any ID.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, MAX_FILTER_INDEX, MIN_FILTER_INDEX, XCanFd_AcceptFilterGetEnabled(), XCANFD_AFIDR_OFFSET, XCANFD_AFMR_OFFSET, and XCanFd_WriteReg.

Referenced by XCanFd_CfgInitialize().

int XCanFd_Addto_Queue	(	XCanFd *	InstancePtr,
		u32 *	FramePtr,
		u32 *	TxBufferNumber
	)

This function writes the Data into specific Buffer.we have 32 TxBuffers we can Add data to each Buffer using this routine.This routine won't transmit the data.

it only adds data to Buffers.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
FramePtr	is a pointer to a 32-bit aligned buffer containing the CAN frame to be sent.
TxBufferNumber	is Buffer Number where the data has written and is given back to user.

Returns

- XST_SUCCESS if TX FIFO was not full and the given frame was written into the FIFO;

XST_FIFO_NO_ROOM if there is no room in the TX FIFO for the given frame

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::GlobalTrrMask, XCanFd::GlobalTrrValue, XCanFd::IsReady, XCanFd::MultiBuffTrr, TRR_MASK_INIT_VAL, XCanFD_Check_TrrVal_Set_Bit, XCANFD_DLCR_DLC_MASK, XCANFD_DLCR_EDL_MASK, XCANFD_DW_BYTES, XCanFd_GetDlc2len(), XCanFd_GetFreeBuffer(), XCanFd_ReadReg, XCANFD_TRR_OFFSET, XCANFD_TXDLC_OFFSET, XCANFD_TXDW_OFFSET, XCANFD_TXID_OFFSET, and XCanFd_WriteReg.

int XCanFd_CfgInitialize	(	XCanFd *	InstancePtr,
		XCanFd_Config *	ConfigPtr,
		UINTPTR	EffectiveAddr
	)

This routine initializes a specific XCanFd instance/driver.

This function should only be used when no Virtual Memory support is needed.

This initialization entails:

Search for device configuration given the device ID.
Initialize Base Address field of the XCanFd structure using the device
address in the found device configuration.
Populate all other data fields in the XCanFd structure
Reset the device.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
ConfigPtr	is the pointer to XCanFd_Config instance
EffectiveAddr	is the base address of CANFD

Returns

- XST_SUCCESS if initialization was successful

XST_DEVICE_NOT_FOUND if device configuration information was not found for a device with the supplied device ID.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd_Config::DeviceId, XCanFd::ErrorHandler, XCanFd::EventHandler, XCanFd_Config::IsPl, XCanFd::IsReady, MAX_FILTER_INDEX, XCanFd_Config::NumofRxMbBuf, XCanFd_Config::NumofTxBuf, XCanFd::RecvHandler, XCanFd_Config::Rx_Mode, XCanFd::SendHandler, XCanFd_AcceptFilterSet(), and XCanFd_Reset.

Referenced by main(), and XCanFdPolledExample().

void XCanFd_Disable_Tranceiver_Delay_Compensation ( XCanFd * InstancePtr )

This function Disables the Transceiver delay compensation.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_F_BRPR_OFFSET, XCANFD_F_BRPR_TDC_ENABLE_MASK, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_Enable_Tranceiver_Delay_Compensation ( XCanFd * InstancePtr )

This function Enables the Transceiver delay compensation.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_F_BRPR_OFFSET, XCANFD_F_BRPR_TDC_ENABLE_MASK, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_EnterMode	(	XCanFd *	InstancePtr,
		u8	OperationMode
	)

This function allows the CAN device to enter one of the following operation modes:

Configuration Mode: Pass in parameter XCANFD_MODE_CONFIG
Sleep Mode: Pass in parameter XCANFD_MODE_SLEEP
Normal Mode: Pass in parameter XCANFD_MODE_NORMAL
Loop Back Mode: Pass in parameter XCANFD_MODE_LOOPBACK
Snoop Mode: Pass in Parameter XCANFD_MODE_SNOOP
Auto Bus-Off Recovery Mode: Pass in Parameter XCANFD_MODE_ABR
Start Bus-Off Recovery Mode: Pass in Parameter XCANFD_MODE_SBR
Protocol Exception Event Mode: Pass in Parameter XCANFD_MODE_PEE
Disable AutoRetransmission Mode: Pass in Parameter XCANFD_MODE_DAR

Read xcanfd.h and device specification for detailed description of each operation mode.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
OperationMode	specify which operation mode to enter.Valid value is any of XCANFD_MODE_* defined in xcanfd.h. Please note no multiple modes could be entered at the same time.

Returns: None.

Note: This function does NOT ensure CAN device enters the specified operation mode before returns the control to the caller. The caller is responsible for checking current operation mode using XCanFd_GetMode().

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_ABR, XCANFD_MODE_CONFIG, XCANFD_MODE_DAR, XCANFD_MODE_LOOPBACK, XCANFD_MODE_NORMAL, XCANFD_MODE_PEE, XCANFD_MODE_SBR, XCANFD_MODE_SLEEP, XCANFD_MODE_SNOOP, XCANFD_MSR_ABR_MASK, XCANFD_MSR_CONFIG_MASK, XCANFD_MSR_DAR_MASK, XCANFD_MSR_DPEE_MASK, XCANFD_MSR_LBACK_MASK, XCANFD_MSR_OFFSET, XCANFD_MSR_SBR_MASK, XCANFD_MSR_SLEEP_MASK, XCANFD_MSR_SNOOP_MASK, XCanFd_ReadReg, XCANFD_SRR_CEN_MASK, XCANFD_SRR_OFFSET, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

u8 XCanFd_GetBaudRatePrescaler ( XCanFd * InstancePtr )

This routine gets Baud Rate Prescaler value.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: Current used Baud Rate Prescaler value. The value's range is from 0 to 255.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BRPR_OFFSET, and XCanFd_ReadReg.

void XCanFd_GetBitTiming	(	XCanFd *	InstancePtr,
		u8 *	SyncJumpWidth,
		u8 *	TimeSegment2,
		u8 *	TimeSegment1
	)

This routine gets Bit time.

Time segment 1, Time segment 2 and Synchronization Jump Width values are read in this function. According to device specification, the actual value of each of these fields is one more than the value read. Read the device specification for details.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
SyncJumpWidth	will store the Synchronization Jump Width value after this function returns. Its value ranges from 0 to 3.
TimeSegment2	will store the Time Segment 2 value after this function returns. Its value ranges from 0 to 7.
TimeSegment1	will store the Time Segment 1 value after this function returns. Its value ranges from 0 to 15.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BTR_OFFSET, XCANFD_BTR_SJW_MASK, XCANFD_BTR_SJW_SHIFT, XCANFD_BTR_TS1_MASK, XCANFD_BTR_TS2_MASK, XCANFD_BTR_TS2_SHIFT, and XCanFd_ReadReg.

void XCanFd_GetBusErrorCounter	(	XCanFd *	InstancePtr,
		u8 *	RxErrorCount,
		u8 *	TxErrorCount
	)

This function reads Receive and Transmit error counters.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
RxErrorCount	will contain Receive Error Counter value after this function returns.
TxErrorCount	will contain Transmit Error Counter value after this function returns.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_ECR_OFFSET, XCANFD_ECR_REC_MASK, XCANFD_ECR_REC_SHIFT, XCANFD_ECR_TEC_MASK, and XCanFd_ReadReg.

XCanFd_Config * XCanFd_GetConfig ( unsigned int InstanceIndex )

This function looks for the device configuration based on the device index.

The table XCanFd_ConfigTable[] contains the configuration information for each device in the system.

Parameters

InstanceIndex is a 0-based integer indexing all CAN devices in the system.

Returns: A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.

Note: None.

References XCanFd_ConfigTable.

int XCanFd_GetDlc2len	(	u32	Dlc,
		u32	Edl
	)

This function returns Data Length Code(in Bytes),we need to pass DLC Field value in DLC Register.

Parameters

Dlc	Field in Data Length Code Register.
Edl	and Fdf Field in DLC register.

Returns: Total Number of Bytes stored in each Buffer.

Note: Refer CAN FD Spec about DLC.

References XCANFD_DLC1, XCANFD_DLC10, XCANFD_DLC11, XCANFD_DLC12, XCANFD_DLC13, XCANFD_DLC14, XCANFD_DLC15, XCANFD_DLC2, XCANFD_DLC3, XCANFD_DLC4, XCANFD_DLC5, XCANFD_DLC6, XCANFD_DLC7, XCANFD_DLC8, XCANFD_DLC9, and XCANFD_DLCR_DLC_SHIFT.

Referenced by main(), XCanFd_Addto_Queue(), XCanFd_Recv_Mailbox(), XCanFd_SelfTest(), and XCanFd_Send().

u8 XCanFd_GetFBaudRatePrescaler ( XCanFd * InstancePtr )

This routine gets Baud Rate Prescaler value in Data Phase.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: Current used Baud Rate Prescaler value. The value's range is from 1 to 256.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BRPR_BRP_MASK, XCANFD_F_BRPR_OFFSET, and XCanFd_ReadReg.

void XCanFd_GetFBitTiming	(	XCanFd *	InstancePtr,
		u8 *	SyncJumpWidth,
		u8 *	TimeSegment2,
		u8 *	TimeSegment1
	)

This routine gets Bit time in Data Phase.

Time segment 1, Time segment 2 and Synchronization Jump Width values are read in this function. According to device specification, the actual value of each of these fields is one more than the value read. Read the device specification for details.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
SyncJumpWidth	will store the Synchronization Jump Width value after this function returns. Its value ranges from 0 to 3.
TimeSegment2	will store the Time Segment 2 value after this function returns. Its value ranges from 0 to 7.
TimeSegment1	will store the Time Segment 1 value after this function returns. Its value ranges from 0 to 15.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_F_BTR_OFFSET, XCANFD_F_BTR_SJW_MASK, XCANFD_F_BTR_SJW_SHIFT, XCANFD_F_BTR_TS1_MASK, XCANFD_F_BTR_TS2_MASK, XCANFD_F_BTR_TS2_SHIFT, and XCanFd_ReadReg.

u32 XCanFd_GetFreeBuffer ( XCanFd * InstancePtr )

This Routine returns the Free Buffers count out of 32 Transmit Buffers.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: Returns number of Free buffers count.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, MAX_BUFFER_INDEX, XCanFd_ReadReg, and XCANFD_TRR_OFFSET.

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

u8 XCanFd_GetLen2Dlc ( int len )

This function returns Data Length Code of 4bits,we need to pass length in bytes.

Parameters

len	is the length in bytes.

Returns: Total Number of Bytes stored in each Buffer.

Note: Refer CAN FD Spec about DLC.

References XST_INVALID_DLC.

Referenced by main(), and XCanFd_SelfTest().

u8 XCanFd_GetMode ( XCanFd * InstancePtr )

This routine returns current operation mode the CAN device is in.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns

- XCANFD_MODE_CONFIG if the device is in Configuration Mode.

XCANFD_MODE_SLEEP if the device is in Sleep Mode.

XCANFD_MODE_NORMAL if the device is in Normal Mode.
XCANFD_MODE_LOOPBACK if the device is in Loop Back Mode.
XCANFD_MODE_SNOOP if the device is in Snoop Mode.
XCANFD_MODE_BR if the device is in Bus-Off recovery Mode.
XCANFD_MODE_PEE if the device is in Protocol Exception Event mode.
Note
None.

References XCanFd::IsReady, XCanFd_GetStatus, XCANFD_MODE_CONFIG, XCANFD_MODE_LOOPBACK, XCANFD_MODE_NORMAL, XCANFD_MODE_PEE, XCANFD_MODE_SLEEP, XCANFD_MODE_SNOOP, XCANFD_SR_CONFIG_MASK, XCANFD_SR_NORMAL_MASK, XCANFD_SR_PEE_CONFIG_MASK, XCANFD_SR_SLEEP_MASK, and XCANFD_SR_SNOOP_MASK.

Referenced by main(), XCanFd_EnterMode(), XCanFd_SelfTest(), XCanFd_SetBaudRatePrescaler(), XCanFd_SetBitTiming(), XCanFd_SetFBaudRatePrescaler(), XCanFd_SetFBitTiming(), XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), XCanFd_SetRxIntrWatermarkFifo1(), XCanFd_SetTxEventIntrWatermark(), and XCanFdPolledExample().

int XCanFd_GetNofMessages_Stored_Rx_Fifo	(	XCanFd *	InstancePtr,
		u8	fifo_no
	)

This function returns Number of messages Stored.

The FSR Register has Field called FL. this gives number of packets received.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
fifo_no	is fifo number.

Returns: Value is the number of messages stored in FSR Register.

Note: Selects either Rx Fifo 0 or Rx Fifo 1

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_FSR_FL_0_SHIFT, XCANFD_FSR_FL_1_MASK, XCANFD_FSR_FL_1_SHIFT, XCANFD_FSR_FL_MASK, XCANFD_FSR_OFFSET, XCanFd_ReadReg, and XCANFD_RX_FIFO_0.

int XCanFd_GetNofMessages_Stored_TXE_FIFO ( XCanFd * InstancePtr )

This function returns Number of messages Stored in TX Event FIFO The FSR Register has Field called FL.

this gives number of packets received.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: Value is the number of messages stored in FSR Register.

Note: This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_TXE_FL_MASK, XCANFD_TXE_FL_SHIFT, and XCANFD_TXE_FSR_OFFSET.

void XCanFd_InterruptClear	(	XCanFd *	InstancePtr,
		u32	Mask
	)

This function clears interrupt(s).

Every bit set in Interrupt Status Register indicates that a specific type of interrupt is occurring, and this function clears one or more interrupts by writing a bit mask to Interrupt Clear Register.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is the mask to clear. Bit positions of 1 will be cleared. Bit positions of 0 will not change the previous interrupt status. This mask is formed by OR'ing XCANFD_IXR_* bits defined in xcanfd_hw.h.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_ICR_OFFSET, XCanFd_InterruptGetStatus, and XCanFd_WriteReg.

Referenced by XCanFd_IntrHandler().

void XCanFd_InterruptDisable	(	XCanFd *	InstancePtr,
		u32	Mask
	)

This routine disables interrupt(s).

Use the XCANFD_IXR_* constants defined in xcanfd_hw.h to create the bit-mask to disable interrupt(s).

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANFD_IXR_* bits defined in xcanfd_hw.h.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IER_OFFSET, XCanFd_InterruptGetEnabled, and XCanFd_WriteReg.

void XCanFd_InterruptDisable_CancelRqt	(	XCanFd *	InstancePtr,
		u32	Mask
	)

This routine disables the TxBuffer Cancel Request interrupt(s).

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by AND'ing XCANFD_IETCS_OFFSET* bits defined in xcanfd_hw.h.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IETCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_InterruptDisable_ReadyRqt	(	XCanFd *	InstancePtr,
		u32	Mask
	)

This routine disables TxBuffer Ready Request interrupt(s).

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by AND'ing XCANFD_IETRS_OFFSET* bits defined in xcanfd_hw.h.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IETRS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_InterruptDisable_RxBuffFull	(	XCanFd *	InstancePtr,
		u32	Mask,
		u32	RxBuffNumber
	)

This routine disables the RxBuffer Full interrupt(s) in MailBox Mode.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by AND'ing XCANFD_RXBFLL*_OFFSET bits defined in xcanfd_hw.h.
RxBuffNumber	has two values if 0 -> Access RxBufferFull0 Reg. else -> Access RxBufferFull1 Reg.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_RXBFLL1_OFFSET, XCANFD_RXBFLL2_OFFSET, and XCanFd_WriteReg.

void XCanFd_InterruptEnable	(	XCanFd *	InstancePtr,
		u32	Mask
	)

This routine enables interrupt(s).

Use the XCANFD_IXR_* constants defined in xcanfd_hw.h to create the bit-mask to enable interrupts.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is the mask to enable. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANFD_IXR_* bits defined in xcanfd_hw.h.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IER_OFFSET, XCanFd_InterruptGetEnabled, XCANFD_IXR_ALL, and XCanFd_WriteReg.

Referenced by main().

void XCanFd_InterruptEnable_CancelRqt	(	XCanFd *	InstancePtr,
		u32	Mask
	)

This routine enables TxBuffer Cancellation interrupt(s).

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is the mask to enable. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANFD_IETCS_OFFSET* bits defined in xcanfd_hw.h.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IETCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_InterruptEnable_ReadyRqt	(	XCanFd *	InstancePtr,
		u32	Mask
	)

This routine enables TxBuffer Ready Request interrupt(s).

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is the mask to enable. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANFD_IETRS_OFFSET* bits defined in xcanfd_hw.h.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IETRS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_InterruptEnable_RxBuffFull	(	XCanFd *	InstancePtr,
		u32	Mask,
		u32	RxBuffNumber
	)

This routine Enables the RxBuffer Full interrupt(s) in MailBox Mode.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Mask	is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by AND'ing XCANFD_RXBFLL*_OFFSET bits defined in xcanfd_hw.h.
RxBuffNumber	has two values if 0 -> Access RxBufferFull0 Reg else -> Access RxBufferFull1 Reg

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_RXBFLL1_OFFSET, XCANFD_RXBFLL2_OFFSET, and XCanFd_WriteReg.

void XCanFd_IntrHandler ( void * InstancePtr )

This routine is the interrupt handler for the CAN driver.

This handler reads the interrupt status from the ISR, determines the source of the interrupts, calls according callbacks, and finally clears the interrupts.

Application beyond this driver is responsible for providing callbacks to handle interrupts and installing the callbacks using XCanFd_SetHandler() during initialization phase. An example delivered with this driver demonstrates how this could be done.

Parameters

InstancePtr is a pointer to the XCanFd instance that just interrupted.

Returns: None.

Note: None.

References XCanFd::ErrorHandler, XCanFd::ErrorRef, XCanFd::EventHandler, XCanFd::EventRef, XCanFd::IsReady, XCanFd::RecvHandler, XCanFd::RecvRef, XCanFd::SendHandler, XCanFd::SendRef, XCanFd_ClearBusErrorStatus, XCanFd_GetBusErrorStatus, XCanFd_InterruptClear(), XCanFd_InterruptGetEnabled, XCanFd_InterruptGetStatus, XCANFD_IXR_ARBLST_MASK, XCANFD_IXR_BSOFF_MASK, XCANFD_IXR_BSRD_MASK, XCANFD_IXR_ERROR_MASK, XCANFD_IXR_PEE_MASK, XCANFD_IXR_RXBOFLW_BI_MASK, XCANFD_IXR_RXBOFLW_MASK, XCANFD_IXR_RXFOFLW_MASK, XCANFD_IXR_RXFWMFLL_1_MASK, XCANFD_IXR_RXFWMFLL_MASK, XCANFD_IXR_RXMNF_MASK, XCANFD_IXR_RXOK_MASK, XCANFD_IXR_RXRBF_MASK, XCANFD_IXR_SLP_MASK, XCANFD_IXR_TSCNT_OFLW_MASK, XCANFD_IXR_TXCRS_MASK, XCANFD_IXR_TXEOFLW_MASK, XCANFD_IXR_TXEWMFLL_MASK, XCANFD_IXR_TXOK_MASK, XCANFD_IXR_TXRRS_MASK, and XCANFD_IXR_WKUP_MASK.

Referenced by main().

XCanFd_Config * XCanFd_LookupConfig ( u16 DeviceId )

This function looks for the device configuration based on the unique device ID.

The table XCanFd_ConfigTable[] contains the configuration information for each device in the system.

Parameters

DeviceId is the unique device ID of the device being looked up.

Returns: A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.

Note: None.

References XCanFd_ConfigTable.

Referenced by main(), and XCanFdPolledExample().

void XCanFd_Pee_BusOff_Handler ( XCanFd * InstancePtr )

This function recovers the CAN device from Protocol Exception Event & Busoff Event States.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd_ReadReg, XCANFD_TCR_OFFSET, XCANFD_TRR_OFFSET, and XCanFd_WriteReg.

Referenced by main().

void XCanFd_PollQueue_Buffer ( XCanFd * InstancePtr )

This function Polls the TxBuffer(s) whether it is transmitted or not.

This function can call when user sends multiple Buffers using Addto_Queue() and XCanFd_Send_Queue().

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: None.

Note: None.

References XCanFd::IsReady, MAX_BUFFER_VAL, XCanFd::MultiBuffTrr, TRR_POS_MASK, and XCanFd_IsBufferTransmitted.

u32 XCanFd_Recv_Mailbox	(	XCanFd *	InstancePtr,
		u32 *	FramePtr
	)

This function receives a CAN Frame in MAIL BOX Mode.

Read Rx Last Buffer Index from ISR Register. This tells which buffer is having data.then read and update the data to user buffer.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
FramePtr	is a pointer to a 32-bit aligned buffer where the CAN frame to be receive.

Returns

- XST_SUCCESS if RX FIFO was not empty and a frame was read from RX FIFO successfully and written into the given buffer;

XST_NO_DATA if there is no frame to be received from the FIFO

Note: This CANFD has two design modes. ->Sequential Mode - Core writes data sequentially to RxBuffers. ->MailBox Mode - Core writes data to RxBuffers when a ID match happened. This routine is useful for MailBox Mode.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_CSB_SHIFT, XCANFD_DLCR_DLC_MASK, XCANFD_DLCR_EDL_MASK, XCANFD_DW_BYTES, XCanFd_GetDlc2len(), XCANFD_ISR_OFFSET, XCANFD_IXR_RXLRM_BI_MASK, XCANFD_RCS_HCB_MASK, XCANFD_RCS_OFFSET, XCanFd_ReadReg, XCANFD_RXDLC_OFFSET, XCANFD_RXDW_OFFSET, XCANFD_RXID_OFFSET, XCANFD_RXLRM_BI_SHIFT, and XCanFd_WriteReg.

Referenced by main(), and XCanFd_SelfTest().

u32 XCanFd_Recv_Sequential	(	XCanFd *	InstancePtr,
		u32 *	FramePtr
	)

This function receives a CAN/CAN FD Frame.

This function first checks FSR Register.The FL bits tells the Number of Packets received. if FL is non Zero then Read the Packet and store it to user Buffer.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
FramePtr	is a pointer to a 32-bit aligned buffer where the CAN/CAN FD frame to be written.

Returns

- XST_SUCCESS if RX FIFO was not empty and a frame was read from RX FIFO successfully and written into the given buffer;

XST_NO_DATA if there is no frame to be received from the FIFO

Note: The CANFD has two design modes. ->Sequential Mode - Core writes data sequentially to RxBuffers. ->MailBox Mode - Core writes data to RxBuffers when a ID Match happened. This routine distinguishes receive checking as per the frame availability from either Fifo 0 or Fifo 1.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_FSR_FL_1_MASK, XCANFD_FSR_FL_MASK, XCANFD_FSR_OFFSET, XCANFD_FSR_RI_1_MASK, XCANFD_FSR_RI_1_SHIFT, XCANFD_FSR_RI_MASK, XCanFd_ReadReg, XCANFD_RX_FIFO_0, and XCANFD_RX_FIFO_1.

Referenced by main(), and XCanFd_SelfTest().

u32 XCanFd_Recv_TXEvents_Sequential	(	XCanFd *	InstancePtr,
		u32 *	FramePtr
	)

This function receives a CAN/CAN FD TX Events.

This function first checks FSR Register.The FL bits tells the Number of TX Event packets received. if FL is non Zero then Read the Packet and store it to user Buffer.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
FramePtr	is a pointer to a 32-bit aligned buffer where the CAN/CAN FD frame Event to be written.

Returns

- XST_SUCCESS if TXE FIFO was not empty and a frame was read from TX FIFO successfully and written into the given buffer;

XST_NO_DATA if there is no frame to be received from the TXE FIFO

Note: This CANFD has two design modes. ->Sequential Mode - Core writes data sequentially to RxBuffers. ->MailBox Mode - Core writes data to RxBuffers when a ID Match happened. This routine is useful for Both the Modes.This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_TXE_FL_MASK, XCANFD_TXE_FSR_OFFSET, XCANFD_TXE_IRI_MASK, XCANFD_TXE_RI_MASK, XCANFD_TXEDLC_OFFSET, XCANFD_TXEID_OFFSET, and XCanFd_WriteReg.

u32 XCanFd_RxBuff_MailBox_Active	(	XCanFd *	InstancePtr,
		u32	RxBuffer
	)

This function sets an RxBuffer to Active State.In Mailbox Mode configuration we can set each buffer to receive with specific Id and Mask.inorder compare we need to first Activate the Buffer.Maximum number of RxBuffers depends on Design.Range 48,32,16.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
RxBuffer	Receive Buffer Number defines which Buffer to configure Value ranges from 0 - 48

Returns: - XST_SUCCESS if the values were set successfully.

Note: none

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, CONTROL_STATUS_1, CONTROL_STATUS_2, CONTROL_STATUS_3, DESIGN_RANGE_1, DESIGN_RANGE_2, XCanFd::IsReady, XCANFD_RCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

u32 XCanFd_RxBuff_MailBox_DeActive	(	XCanFd *	InstancePtr,
		u32	RxBuffer
	)

This function sets an RxBuffer to InActive State.if we change a buffer to InActive state, then Rx Packet won't store into that buffer, even the Id is matched.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
RxBuffer	Receive Buffer Number defines which Buffer to configure Value ranges from 0 - 48

Returns

- XST_SUCCESS if the values were set successfully.

XST_FAILURE if the given filter was not disabled, or the CAN device was not ready to accept writes to AFMR and AFIR.

Note: none

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, CONTROL_STATUS_1, CONTROL_STATUS_2, CONTROL_STATUS_3, DESIGN_RANGE_1, DESIGN_RANGE_2, XCanFd::IsReady, XCANFD_MBRXBUF_MASK, XCANFD_RCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

int XCanFd_SelfTest ( XCanFd * InstancePtr )

This function runs a self-test on the CAN driver/device.

The test resets the device, sets up the Loop Back mode, sends a standard frame, receives the frame, verifies the contents, and resets the device again.

Note that this is a destructive test in that resets of the device are performed. Refer to the device specification for the device status after the reset operation.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns

- XST_SUCCESS if the self-test passed. i.e., the frame received via the internal loop back has the same contents as the sent frame.

XST_FAILURE Otherwise.

Note: If the CAN device does not work properly, this function may enter an infinite loop and will never return to the caller.

If XST_FAILURE is returned, the device is not reset so that the caller could have a chance to check reason(s) causing the failure.

References EDL_CANFD, TEST_BRPR_BAUD_PRESCALAR, TEST_BTR_FIRST_TIMESEGMENT, TEST_BTR_SECOND_TIMESEGMENT, TEST_BTR_SYNCJUMPWIDTH, TEST_CANFD_DLC, TEST_FBRPR_BAUD_PRESCALAR, TEST_FBTR_FIRST_TIMESEGMENT, TEST_FBTR_SECOND_TIMESEGMENT, TEST_FBTR_SYNCJUMPWIDTH, TEST_MAIL_BOX_MASK, TEST_MESSAGE_ID, XCanFd_AcceptFilterDisable(), XCanFd_AcceptFilterEnable(), XCANFD_AFR_UAF_ALL_MASK, XCanFd_Create_CanFD_Dlc_BrsValue, XCanFd_CreateIdValue, XCANFD_DLCR_DLC_MASK, XCanFd_EnterMode(), XCANFD_GET_RX_MODE, XCanFd_GetDlc2len(), XCanFd_GetLen2Dlc(), XCanFd_GetMode(), XCanFd_IsBufferTransmitted, XCANFD_MODE_CONFIG, XCANFD_MODE_LOOPBACK, XCanFd_Recv_Mailbox(), XCanFd_Recv_Sequential(), XCanFd_Reset, XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), XCanFd_Send(), XCanFd_Set_MailBox_IdMask(), XCanFd_SetBaudRatePrescaler(), XCanFd_SetBitTiming(), XCanFd_SetFBaudRatePrescaler(), and XCanFd_SetFBitTiming().

Referenced by main(), and XCanFdPolledExample().

int XCanFd_Send	(	XCanFd *	InstancePtr,
		u32 *	FramePtr,
		u32 *	TxBufferNumber
	)

This function sends a CAN/CANFD Frame.

This function first checks whether free buffer is there or not.if free buffer is there the user data will be written into the free buffer.otherwise it returns error code immediately. This function does not wait for the given frame being sent to CAN bus.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
FramePtr	is a pointer to a 32-bit aligned buffer containing the CAN frame to be sent.
TxBufferNumber	is the buffer where the user data has been written and it is updated by driver.

Returns

- XST_SUCCESS if TX FIFO was not full and the given frame was written into the FIFO;

XST_FIFO_NO_ROOM if there is no room in the TX FIFO for the given frame

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::GlobalTrrMask, XCanFd::IsReady, TRR_MASK_INIT_VAL, XCanFD_Check_TrrVal_Set_Bit, XCANFD_DLCR_DLC_MASK, XCANFD_DLCR_EDL_MASK, XCANFD_DW_BYTES, XCanFd_GetDlc2len(), XCanFd_GetFreeBuffer(), XCanFd_ReadReg, XCANFD_TRR_OFFSET, XCANFD_TXDLC_OFFSET, XCANFD_TXDW_OFFSET, XCANFD_TXID_OFFSET, and XCanFd_WriteReg.

Referenced by main(), and XCanFd_SelfTest().

int XCanFd_Send_Queue ( XCanFd * InstancePtr )

This routine sends queue of buffers,when added to queue using Addto_Queue() Basically this will trigger the TRR Bit(s).This routine can be used when user want to send multiple packets at a time.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: - XST_SUCCESS.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::GlobalTrrMask, XCanFd::GlobalTrrValue, XCanFd_Config::IsPl, XCanFd::IsReady, MAX_BUFFER_VAL, XCanFd::MultiBuffTrr, TRR_INIT_VAL, TRR_MASK_INIT_VAL, XCANFD_TRR_OFFSET, and XCanFd_WriteReg.

u32 XCanFd_Set_MailBox_IdMask	(	XCanFd *	InstancePtr,
		u32	RxBuffer,
		u32	MaskValue,
		u32	IdValue
	)

This function sets the Id and Mask for an RxBuffer to participate in Id match.if a packet is received with an id which is equal to id we configured, then it is stored in RxBuffer.

otherwise it won't.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
RxBuffer	Receive Buffer Number defines which Buffer to configure Value ranges from 0 - 48(can get from NumofRxMbBuf)
MaskValue	is the value to write into the RxBuffer Mask Register
IdValue	is the value to write into the RxBuffer Id register

Returns: - XST_SUCCESS if the values were set successfully.

Note: none

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, CONTROL_STATUS_1, CONTROL_STATUS_2, CONTROL_STATUS_3, DESIGN_RANGE_1, DESIGN_RANGE_2, XCanFd::IsReady, XCANFD_MAILBOX_ID_OFFSET, XCANFD_MAILBOX_MASK_OFFSET, XCANFD_RCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

void XCanFd_Set_Tranceiver_Delay_Compensation	(	XCanFd *	InstancePtr,
		u32	TdcOffset
	)

This function Sets the Transceiver delay compensation offset.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
TdcOffset	is the Delay Compensation Offset.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, TDC_MAX_OFFSET, TDC_SHIFT, XCANFD_F_BRPR_OFFSET, XCANFD_F_BRPR_TDCMASK, XCanFd_ReadReg, and XCanFd_WriteReg.

int XCanFd_SetBaudRatePrescaler	(	XCanFd *	InstancePtr,
		u8	Prescaler
	)

This routine sets Baud Rate Prescaler value in Arbitration Phse.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Baud Rate Prescaler could be set only after CAN device entered Configuration Mode. So please call XCanFd_EnterMode() to enter Configuration Mode before using this function.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Prescaler	is the value to set. Valid values are from 0 to 255.

Returns

- XST_SUCCESS if the Baud Rate Prescaler value is set successfully.

XST_FAILURE if CAN device is not in Configuration Mode.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BRPR_OFFSET, XCanFd_GetMode(), XCANFD_MODE_CONFIG, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

void XCanFd_SetBitRateSwitch_DisableNominal ( XCanFd * InstancePtr )

This routine Disables the BRSD bit, so that Bit Rate Switch can be happen with Nominal or configured rate.

Read the device specification for details.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: None.

Note: if we set BRSD bit in Mode Select Register then CAN Controller transmits CAN FD Frames with Nominal Bit Rate. else with configured bit rate(As specified in Data phase BRPR and BTR Registers.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_MSR_BRSD_MASK, XCANFD_MSR_OFFSET, XCanFd_ReadReg, XCANFD_SRR_CEN_MASK, and XCanFd_WriteReg.

Referenced by main(), and XCanFdPolledExample().

void XCanFd_SetBitRateSwitch_EnableNominal ( XCanFd * InstancePtr )

This routine sets the Bit Rate Switch with nominal bit rate.

if we set BRSD bit in Mode Select Register then CAN Controller transmits CAN FD Frames with Nominal Bit Rate. Read the device specification for details.

Parameters

InstancePtr is a pointer to the XCanFd instance to be worked on.

Returns: None.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_MSR_BRSD_MASK, XCANFD_MSR_OFFSET, XCanFd_ReadReg, XCANFD_SRR_CEN_MASK, and XCanFd_WriteReg.

int XCanFd_SetBitTiming	(	XCanFd *	InstancePtr,
		u8	SyncJumpWidth,
		u8	TimeSegment2,
		u16	TimeSegment1
	)

This routine sets Bit time.

Time segment 1, Time segment 2 and Synchronization Jump Width are set in this function. Device specification requires the values passed into this function be one less than the actual values of these fields. Read the device specification for details.

Bit time could be set only after CAN device entered Configuration Mode. Please call XCanFd_EnterMode() to enter Configuration Mode before using this function.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
SyncJumpWidth	is the Synchronization Jump Width value to set. Valid values are from 0 to 3.
TimeSegment2	is the Time Segment 2 value to set. Valid values are from 0 to 7.
TimeSegment1	is the Time Segment 1 value to set. Valid values are from 0 to 15.

Returns

- XST_SUCCESS if the Bit time is set successfully.

XST_FAILURE if CAN device is not in Configuration Mode.
XST_INVALID_PARAM if any value of SyncJumpWidth, TimeSegment2 and TimeSegment1 is invalid.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BTR_OFFSET, XCANFD_BTR_SJW_MASK, XCANFD_BTR_SJW_SHIFT, XCANFD_BTR_TS1_MASK, XCANFD_BTR_TS2_MASK, XCANFD_BTR_TS2_SHIFT, XCanFd_GetMode(), XCANFD_MAX_SJW_VALUE, XCANFD_MAX_TS1_VALUE, XCANFD_MAX_TS2_VALUE, XCANFD_MODE_CONFIG, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

int XCanFd_SetFBaudRatePrescaler	(	XCanFd *	InstancePtr,
		u8	Prescaler
	)

This routine sets Baud Rate Prescaler value in Data Phase.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Baud Rate Prescaler could be set only after CAN device entered Configuration Mode. So please call XCanFd_EnterMode() to enter Configuration Mode before using this function.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
Prescaler	is the value to set. Valid values are from 1 to 256.

Returns

- XST_SUCCESS if the Baud Rate Prescaler value is set successfully.

XST_FAILURE if CAN device is not in Configuration Mode.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BRPR_BRP_MASK, XCANFD_F_BRPR_OFFSET, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

int XCanFd_SetFBitTiming	(	XCanFd *	InstancePtr,
		u8	SyncJumpWidth,
		u8	TimeSegment2,
		u8	TimeSegment1
	)

This routine sets Bit time in Data Phase.

Time segment 1, Time segment 2 and Synchronization Jump Width are set in this function. Device specification requires the values passed into this function be one less than the actual values of these fields. Read the device specification for details.

Bit time could be set only after CAN device entered Configuration Mode. Please call XCanFd_EnterMode() to enter Configuration Mode before using this function.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
SyncJumpWidth	is the Synchronization Jump Width value to set. Valid values are from 0 to 3.
TimeSegment2	is the Time Segment 2 value to set. Valid values are from 0 to 7.
TimeSegment1	is the Time Segment 1 value to set. Valid values are from 0 to 15.

Returns

- XST_SUCCESS if the Bit time is set successfully.

XST_FAILURE if CAN device is not in Configuration Mode.
- XST_INVALID_PARAM if any value of SyncJumpWidth, TimeSegment2 and TimeSegment1 is invalid.

Note: None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_F_BTR_OFFSET, XCANFD_F_BTR_SJW_MASK, XCANFD_F_BTR_SJW_SHIFT, XCANFD_F_BTR_TS1_MASK, XCANFD_F_BTR_TS2_MASK, XCANFD_F_BTR_TS2_SHIFT, XCanFd_GetMode(), XCANFD_MAX_F_SJW_VALUE, XCANFD_MAX_F_TS1_VALUE, XCANFD_MAX_F_TS2_VALUE, XCANFD_MODE_CONFIG, and XCanFd_WriteReg.

Referenced by main(), XCanFd_SelfTest(), and XCanFdPolledExample().

int XCanFd_SetHandler	(	XCanFd *	InstancePtr,
		u32	HandlerType,
		void *	CallBackFunc,
		void *	CallBackRef
	)

This routine installs an asynchronous callback function for the given HandlerType:

HandlerType              Callback Function Type
-----------------------  ---------------------------
XCANFD_HANDLER_SEND        XCanFd_SendRecvHandler
XCANFD_HANDLER_RECV        XCanFd_SendRecvHandler
XCANFD_HANDLER_ERROR       XCanFd_ErrorHandler
XCANFD_HANDLER_EVENT       XCanFd_EventHandler

HandlerType              Invoked by this driver when:
-----------------------  --------------------------------------------------
XCANFD_HANDLER_SEND        A frame transmitted by a call to
                         XCanFd_Send() has been sent successfully.

XCANFD_HANDLER_RECV        A frame has been received and is sitting in
                         the RX FIFO.

XCANFD_HANDLER_ERROR       An error interrupt is occurring.

XCANFD_HANDLER_EVENT       Any other kind of interrupt is occurring.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
HandlerType	specifies which handler is to be attached.
CallBackFunc	is the address of the callback function.
CallBackRef	is a user data item that will be passed to the callback function when it is invoked.

Returns

- XST_SUCCESS when handler is installed.

XST_INVALID_PARAM when HandlerType is invalid.

Note: Invoking this function for a handler that already has been installed replaces it with the new handler.

References XCanFd::ErrorHandler, XCanFd::ErrorRef, XCanFd::EventHandler, XCanFd::EventRef, XCanFd::IsReady, XCanFd::RecvHandler, XCanFd::RecvRef, XCanFd::SendHandler, XCanFd::SendRef, XCANFD_HANDLER_ERROR, XCANFD_HANDLER_EVENT, XCANFD_HANDLER_RECV, and XCANFD_HANDLER_SEND.

Referenced by main().

u32 XCanFd_SetRxFilterPartition	(	XCanFd *	InstancePtr,
		u8	FilterPartition
	)

This routine sets the Receive filter partition in the Watermark Interrupt Register.

Parameters

InstancePtr	is a pointer to the XCanFd instance.
FilterPartition	is Filter Mask number, valid values are 0 to 31.

Returns

- XST_FAILURE - If the CAN device is not in Configuration Mode.

XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.

Note: The RX filter partition can only be set when the CAN device is in the configuration mode, This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, XCANFD_WIR_OFFSET, XCANFD_WMR_RXFP_MASK, XCANFD_WMR_RXFP_SHIFT, and XCanFd_WriteReg.

u32 XCanFd_SetRxIntrWatermark	(	XCanFd *	InstancePtr,
		s8	Threshold
	)

This routine sets the Rx Full threshold in the Watermark Interrupt Register.

Parameters

InstancePtr	is a pointer to the XCanFd instance.
Threshold	is the threshold to be set. The valid values are from 1 to 63.

Returns

- XST_FAILURE - If the CAN device is not in Configuration Mode.

XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.

Note: The threshold can only be set when the CAN device is in the configuration mode.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, XCANFD_WIR_MASK, XCANFD_WIR_OFFSET, XCANFD_WM_FIFO0_THRESHOLD, and XCanFd_WriteReg.

u32 XCanFd_SetRxIntrWatermarkFifo1	(	XCanFd *	InstancePtr,
		s8	Threshold
	)

This routine sets the Rx Full threshold in the Watermark Interrupt Register.

Parameters

InstancePtr	is a pointer to the XCanFd instance.
Threshold	is the threshold to be set. The valid values are from 1 to 63.

Returns

- XST_FAILURE - If the CAN device is not in Configuration Mode.

XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.

Note: The threshold can only be set when the CAN device is in the configuration mode.This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, XCANFD_WIR_OFFSET, XCANFD_WMR_RXFWM_1_MASK, XCANFD_WMR_RXFWM_1_SHIFT, and XCanFd_WriteReg.

u32 XCanFd_SetTxEventIntrWatermark	(	XCanFd *	InstancePtr,
		u8	Threshold
	)

This routine sets the TX Events Full threshold in the Watermark Interrupt Register.

Parameters

InstancePtr	is a pointer to the XCanFd instance.
Threshold	is the threshold to be set. The valid values are from 1 to 31.

Returns

- XST_FAILURE - If the CAN device is not in Configuration Mode.

XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.

Note: The threshold can only be set when the CAN device is in the configuration mode, This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, XCANFD_TXEVENT_WIR_MASK, XCANFD_TXEVENT_WIR_OFFSET, and XCanFd_WriteReg.

int XCanFd_stop ( XCanFd * InstancePtr )

This routine releases resources of XCanFd instance/driver.

Parameters

None

Returns

- XST_SUCCESS if node release was successful

XST_FAILURE or an error code or a reason code if node release was fail

Note: None.

References XCanFd_Config::BaseAddress, and XCanFd::CanFdConfig.

Referenced by XCanFdPolledExample().

int XCanFd_TxBuffer_Cancel_Request	(	XCanFd *	InstancePtr,
		u32	BufferNumber
	)

This function Cancels a CAN/CAN FD Frame which was already initiated for transmission.This function first checks TRR Bit based on BufferNumber.

if TRR Bit is set, then it cancels the Buffers.

Parameters

InstancePtr	is a pointer to the XCanFd instance to be worked on.
BufferNumber	is which Buffer to cancel out of 32 Buffers.

Returns

- XST_SUCCESS if RX FIFO was not empty and a frame was read from RX FIFO successfully and written into the given buffer;

XST_NO_DATA if there is no frame to be received from the FIFO

Note: This function first checks whether TRR bit is set or not if Set, it then checks the corresponding TCR bit ->if Set, then wait until cancellation is performed. ->if Not set, then set the corresponding TCR bit and wait until core clears it. if Not set, Nothing to do.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, MAX_BUFFER_INDEX, XCanFd_ReadReg, XCANFD_TCR_OFFSET, XCANFD_TRR_OFFSET, and XCanFd_WriteReg.

Variable Documentation

XCanFd_Config XCanFd_ConfigTable[]

Config table.

Referenced by XCanFd_GetConfig(), and XCanFd_LookupConfig().

Data Structures

Macros

Typedefs

Functions

Variables

CAN normal Bit rate fields

CAN Fast Bit rate fields

CAN operation modes

Callback identifiers used as parameters to XCanFd_SetHandler()

Register offsets for the CAN. Each register is 32 bits.

Mail box mode registers

TxBuffer Element ID Registers

TxBuffer Element DLC Registers

TxBuffer Element DW Registers

TXEVENT Buffer Element ID Registers

TXEVENT Buffer Element DLC Registers

Rx Message Buffer Element ID Registers.

Rx Message Buffer Element DLC Registers.

Rx Message Buffer Element DW Registers.

Rx Message Buffer Element FIFO 1 ID Registers.

Rx Message Buffer Element FIFO 1 DLC Registers.

Rx Message Buffer Element FIFO 1 SW Registers.

Rx Message Buffer Element ID,DLC,DW Sizes.

EDL and BRS Masks.

Acceptance Filter Mask Registers

Software Reset Register

Mode Select Register

Baud Rate Prescaler register

Bit Timing Register

Fast Bit Timing Register

Error Counter Register

Error Status Register

Status Register

Interrupt Status/Enable/Clear Register

Transmit Ready request All Mask

CAN Frame Identifier (TX High Priority Buffer/TX/RX/Acceptance Filter

CAN Frame Data Length Code (TX High Priority Buffer/TX/RX)

Acceptance Filter Register

CAN Receive FIFO Status Register

CAN RX FIFO Watermark Register

TX Event FIFO Registers

CAN TxBuffer Ready Request Served Interrupt Enable Register Masks

CAN TxBuffer Cancel Request Served Interrupt Enable Register Masks

CAN RxBuffer Full Register

CAN frame length constants

Macro Definition Documentation

Typedef Documentation

Function Documentation

Variable Documentation