Data Structures
struct	XCanPs_Config
	This typedef contains configuration information for a device. More...

struct	XCanPs
	The XCanPs driver instance data. More...

Macros
#define	XCANPS_H
	by using protection macros More...

#define	XCanPs_IsTxDone(InstancePtr)
	This macro checks if the transmission is complete. More...

#define	XCanPs_IsTxFifoFull(InstancePtr)
	This macro checks if the transmission FIFO is full. More...

#define	XCanPs_IsHighPriorityBufFull(InstancePtr)
	This macro checks if the Transmission High Priority Buffer is full. More...

#define	XCanPs_IsRxEmpty(InstancePtr)
	This macro checks if the receive FIFO is empty. More...

#define	XCanPs_IsAcceptFilterBusy(InstancePtr)
	This macro checks if the CAN device is ready for the driver to change Acceptance Filter Identifier Registers (AFIR) and Acceptance Filter Mask Registers (AFMR). More...

#define	XCanPs_CreateIdValue(StandardId, SubRemoteTransReq, IdExtension, ExtendedId, RemoteTransReq)
	This macro calculates CAN message identifier value given identifier field values. More...

#define	XCanPs_CreateDlcValue(DataLengCode) (((DataLengCode) << XCANPS_DLCR_DLC_SHIFT) & XCANPS_DLCR_DLC_MASK)
	This macro calculates value for Data Length Code register given Data Length Code value. More...

#define	XCanPs_ClearTimestamp(InstancePtr)
	This macro clears the timestamp in the Timestamp Control Register. More...

#define	XCANPS_HW_H
	by using protection macros More...

#define	XCANPS_TXBUF_ID_OFFSET XCANPS_TXHPB_ID_OFFSET
	TX High Priority Buffer ID. More...

#define	XCANPS_TXBUF_DLC_OFFSET XCANPS_TXHPB_DLC_OFFSET
	TX High Priority Buffer DLC. More...

#define	XCANPS_TXBUF_DW1_OFFSET XCANPS_TXHPB_DW1_OFFSET
	TX High Priority Buf Data 1. More...

#define	XCANPS_TXBUF_DW2_OFFSET XCANPS_TXHPB_DW2_OFFSET
	TX High Priority Buf Data Word 2. More...

#define	XCANPS_RXFWIR_RXFLL_MASK XCANPS_WIR_FW_MASK
	Rx Full Threshold mask. More...

#define	XCANPS_RXWIR_OFFSET XCANPS_WIR_OFFSET
	Watermark Interrupt Reg. More...

#define	XCANPS_IXR_RXFLL_MASK XCANPS_IXR_RXFWMFLL_MASK
	Rx FIFO Watermark Full. More...

#define	XCanPs_ReadReg(BaseAddr, RegOffset) Xil_In32((BaseAddr) + (u32)(RegOffset))
	This macro reads the given register. More...

#define	XCanPs_WriteReg(BaseAddr, RegOffset, Data) Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data))
	This macro writes the given register. More...

#define	XCANPS_MAX_FRAME_SIZE_IN_WORDS ((XCANPS_MAX_FRAME_SIZE) / (sizeof(u32)))
	Flag for Max Frame size. More...

#define	FRAME_DATA_LENGTH 8U
	Frame Data field length. More...

Typedefs
typedef void(*	XCanPs_SendRecvHandler )(void *CallBackRef)
	Callback type for frame sending and reception interrupts. More...

typedef void(*	XCanPs_ErrorHandler )(void *CallBackRef, u32 ErrorMask)
	Callback type for error interrupt. More...

typedef void(*	XCanPs_EventHandler )(void *CallBackRef, u32 Mask)
	Callback type for all kinds of interrupts except sending frame interrupt, receiving frame interrupt, and error interrupt. More...

Functions
s32	XCanPs_CfgInitialize (XCanPs InstancePtr, XCanPs_Config ConfigPtr, UINTPTR EffectiveAddr)
	This function initializes a XCanPs instance/driver. More...

void	XCanPs_Reset (XCanPs *InstancePtr)
	This function resets the CAN device. More...

u8	XCanPs_GetMode (XCanPs *InstancePtr)
	This routine returns the current operation mode of the CAN device. More...

void	XCanPs_EnterMode (XCanPs *InstancePtr, u8 OperationMode)
	This function allows the CAN device to enter one of the following operation modes: More...

u32	XCanPs_GetStatus (XCanPs *InstancePtr)
	This function returns Status value from Status Register (SR). More...

void	XCanPs_GetBusErrorCounter (XCanPs InstancePtr, u8 RxErrorCount, u8 *TxErrorCount)
	This function reads Receive and Transmit error counters. More...

u32	XCanPs_GetBusErrorStatus (XCanPs *InstancePtr)
	This function reads Error Status value from Error Status Register (ESR). More...

void	XCanPs_ClearBusErrorStatus (XCanPs *InstancePtr, u32 Mask)
	This function clears Error Status bit(s) previously set in Error Status Register (ESR). More...

s32	XCanPs_Send (XCanPs InstancePtr, u32 FramePtr)
	This function sends a CAN Frame. More...

s32	XCanPs_Recv (XCanPs InstancePtr, u32 FramePtr)
	This function receives a CAN Frame. More...

s32	XCanPs_SendHighPriority (XCanPs InstancePtr, u32 FramePtr)
	This routine sends a CAN High Priority frame. More...

void	XCanPs_AcceptFilterEnable (XCanPs *InstancePtr, u32 FilterIndexes)
	This routine enables individual acceptance filters. More...

void	XCanPs_AcceptFilterDisable (XCanPs *InstancePtr, u32 FilterIndexes)
	This routine disables individual acceptance filters. More...

u32	XCanPs_AcceptFilterGetEnabled (XCanPs *InstancePtr)
	This function returns enabled acceptance filters. More...

s32	XCanPs_AcceptFilterSet (XCanPs *InstancePtr, u32 FilterIndex, u32 MaskValue, u32 IdValue)
	This function sets values to the Acceptance Filter Mask Register (AFMR) and Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter. More...

void	XCanPs_AcceptFilterGet (XCanPs InstancePtr, u32 FilterIndex, u32 MaskValue, u32 *IdValue)
	This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter. More...

s32	XCanPs_SetBaudRatePrescaler (XCanPs *InstancePtr, u8 Prescaler)
	This routine sets Baud Rate Prescaler value. More...

u8	XCanPs_GetBaudRatePrescaler (XCanPs *InstancePtr)
	This routine gets Baud Rate Prescaler value. More...

s32	XCanPs_SetBitTiming (XCanPs *InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u8 TimeSegment1)
	This routine sets Bit time. More...

void	XCanPs_GetBitTiming (XCanPs InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u8 TimeSegment1)
	This routine gets Bit time. More...

s32	XCanPs_SetRxIntrWatermark (XCanPs *InstancePtr, u8 Threshold)
	This routine sets the Rx Full threshold in the Watermark Interrupt Register. More...

u8	XCanPs_GetRxIntrWatermark (XCanPs *InstancePtr)
	This routine gets the Rx Full threshold from the Watermark Interrupt Register. More...

s32	XCanPs_SetTxIntrWatermark (XCanPs *InstancePtr, u8 Threshold)
	This routine sets the Tx Empty Threshold in the Watermark Interrupt Register. More...

u8	XCanPs_GetTxIntrWatermark (XCanPs *InstancePtr)
	This routine gets the Tx Empty threshold from Watermark Interrupt Register. More...

s32	XCanPs_SelfTest (XCanPs *InstancePtr)
	This function runs a self-test on the CAN driver/device. More...

void	XCanPs_IntrEnable (XCanPs *InstancePtr, u32 Mask)
	This routine enables interrupt(s). More...

void	XCanPs_IntrDisable (XCanPs *InstancePtr, u32 Mask)
	This routine disables interrupt(s). More...

u32	XCanPs_IntrGetEnabled (XCanPs *InstancePtr)
	This routine returns enabled interrupt(s). More...

u32	XCanPs_IntrGetStatus (XCanPs *InstancePtr)
	This routine returns interrupt status read from Interrupt Status Register. More...

void	XCanPs_IntrClear (XCanPs *InstancePtr, u32 Mask)
	This function clears interrupt(s). More...

void	XCanPs_IntrHandler (void *InstancePtr)
	This routine is the interrupt handler for the CAN driver. More...

s32	XCanPs_SetHandler (XCanPs InstancePtr, u32 HandlerType, void CallBackFunc, void *CallBackRef)
	This routine installs an asynchronous callback function for the given HandlerType: More...

XCanPs_Config *	XCanPs_LookupConfig (u16 DeviceId)
	This function looks for the device configuration based on the unique device ID. More...

void	XCanPs_ResetHw (UINTPTR BaseAddr)
	This function resets the CAN device. More...

Variables
XCanPs_Config	XCanPs_ConfigTable []
	This table contains configuration information for each CAN device in the system. More...

XCanPs_Config	XCanPs_ConfigTable [XPAR_XCANPS_NUM_INSTANCES]
	This table contains configuration information for each CAN device in the system. More...

CAN operation modes
#define	XCANPS_MODE_CONFIG 0x00000001U
	Configuration mode. More...

#define	XCANPS_MODE_NORMAL 0x00000002U
	Normal mode. More...

#define	XCANPS_MODE_LOOPBACK 0x00000004U
	Loop Back mode. More...

#define	XCANPS_MODE_SLEEP 0x00000008U
	Sleep mode. More...

#define	XCANPS_MODE_SNOOP 0x00000010U
	Snoop mode. More...

Callback identifiers used as parameters to XCanPs_SetHandler()
#define	XCANPS_HANDLER_SEND 1U
	Handler type for frame sending interrupt. More...

#define	XCANPS_HANDLER_RECV 2U
	Handler type for frame reception interrupt. More...

#define	XCANPS_HANDLER_ERROR 3U
	Handler type for error interrupt. More...

#define	XCANPS_HANDLER_EVENT 4U
	Handler type for all other interrupts. More...

Register offsets for the CAN. Each register is 32 bits.
#define	XCANPS_SRR_OFFSET 0x00000000U
	Software Reset Register. More...

#define	XCANPS_MSR_OFFSET 0x00000004U
	Mode Select Register. More...

#define	XCANPS_BRPR_OFFSET 0x00000008U
	Baud Rate Prescaler. More...

#define	XCANPS_BTR_OFFSET 0x0000000CU
	Bit Timing Register. More...

#define	XCANPS_ECR_OFFSET 0x00000010U
	Error Counter Register. More...

#define	XCANPS_ESR_OFFSET 0x00000014U
	Error Status Register. More...

#define	XCANPS_SR_OFFSET 0x00000018U
	Status Register. More...

#define	XCANPS_ISR_OFFSET 0x0000001CU
	Interrupt Status Register. More...

#define	XCANPS_IER_OFFSET 0x00000020U
	Interrupt Enable Register. More...

#define	XCANPS_ICR_OFFSET 0x00000024U
	Interrupt Clear Register. More...

#define	XCANPS_TCR_OFFSET 0x00000028U
	Timestamp Control Register. More...

#define	XCANPS_WIR_OFFSET 0x0000002CU
	Watermark Interrupt Reg. More...

#define	XCANPS_TXFIFO_ID_OFFSET 0x00000030U
	TX FIFO ID. More...

#define	XCANPS_TXFIFO_DLC_OFFSET 0x00000034U
	TX FIFO DLC. More...

#define	XCANPS_TXFIFO_DW1_OFFSET 0x00000038U
	TX FIFO Data Word 1. More...

#define	XCANPS_TXFIFO_DW2_OFFSET 0x0000003CU
	TX FIFO Data Word 2. More...

#define	XCANPS_TXHPB_ID_OFFSET 0x00000040U
	TX High Priority Buffer ID. More...

#define	XCANPS_TXHPB_DLC_OFFSET 0x00000044U
	TX High Priority Buffer DLC. More...

#define	XCANPS_TXHPB_DW1_OFFSET 0x00000048U
	TX High Priority Buf Data 1. More...

#define	XCANPS_TXHPB_DW2_OFFSET 0x0000004CU
	TX High Priority Buf Data Word 2. More...

#define	XCANPS_RXFIFO_ID_OFFSET 0x00000050U
	RX FIFO ID. More...

#define	XCANPS_RXFIFO_DLC_OFFSET 0x00000054U
	RX FIFO DLC. More...

#define	XCANPS_RXFIFO_DW1_OFFSET 0x00000058U
	RX FIFO Data Word 1. More...

#define	XCANPS_RXFIFO_DW2_OFFSET 0x0000005CU
	RX FIFO Data Word 2. More...

#define	XCANPS_AFR_OFFSET 0x00000060U
	Acceptance Filter Register. More...

#define	XCANPS_AFMR1_OFFSET 0x00000064U
	Acceptance Filter Mask 1. More...

#define	XCANPS_AFIR1_OFFSET 0x00000068U
	Acceptance Filter ID 1. More...

#define	XCANPS_AFMR2_OFFSET 0x0000006CU
	Acceptance Filter Mask 2. More...

#define	XCANPS_AFIR2_OFFSET 0x00000070U
	Acceptance Filter ID 2. More...

#define	XCANPS_AFMR3_OFFSET 0x00000074U
	Acceptance Filter Mask 3. More...

#define	XCANPS_AFIR3_OFFSET 0x00000078U
	Acceptance Filter ID 3. More...

#define	XCANPS_AFMR4_OFFSET 0x0000007CU
	Acceptance Filter Mask 4. More...

#define	XCANPS_AFIR4_OFFSET 0x00000080U
	Acceptance Filter ID 4. More...

Software Reset Register (SRR) Bit Definitions and Masks
#define	XCANPS_SRR_CEN_MASK 0x00000002U
	Can Enable. More...

#define	XCANPS_SRR_SRST_MASK 0x00000001U
	Reset. More...

Mode Select Register (MSR) Bit Definitions and Masks
#define	XCANPS_MSR_SNOOP_MASK 0x00000004U
	Snoop Mode Select. More...

#define	XCANPS_MSR_LBACK_MASK 0x00000002U
	Loop Back Mode Select. More...

#define	XCANPS_MSR_SLEEP_MASK 0x00000001U
	Sleep Mode Select. More...

Baud Rate Prescaler register (BRPR) Bit Definitions and Masks
#define	XCANPS_BRPR_BRP_MASK 0x000000FFU
	Baud Rate Prescaler. More...

Bit Timing Register (BTR) Bit Definitions and Masks
#define	XCANPS_BTR_SJW_MASK 0x00000180U
	Synchronization Jump Width. More...

#define	XCANPS_BTR_SJW_SHIFT 7U
	Shift Value for SJW. More...

#define	XCANPS_BTR_TS2_MASK 0x00000070U
	Time Segment 2. More...

#define	XCANPS_BTR_TS2_SHIFT 4U
	Shift Value for TS2. More...

#define	XCANPS_BTR_TS1_MASK 0x0000000FU
	Time Segment 1. More...

Error Counter Register (ECR) Bit Definitions and Masks
#define	XCANPS_ECR_REC_MASK 0x0000FF00U
	Receive Error Counter. More...

#define	XCANPS_ECR_REC_SHIFT 8U
	Shift Value for REC. More...

#define	XCANPS_ECR_TEC_MASK 0x000000FFU
	Transmit Error Counter. More...

Error Status Register (ESR) Bit Definitions and Masks
#define	XCANPS_ESR_ACKER_MASK 0x00000010U
	ACK Error. More...

#define	XCANPS_ESR_BERR_MASK 0x00000008U
	Bit Error. More...

#define	XCANPS_ESR_STER_MASK 0x00000004U
	Stuff Error. More...

#define	XCANPS_ESR_FMER_MASK 0x00000002U
	Form Error. More...

#define	XCANPS_ESR_CRCER_MASK 0x00000001U
	CRC Error. More...

Status Register (SR) Bit Definitions and Masks
#define	XCANPS_SR_SNOOP_MASK 0x00001000U
	Snoop Mask. More...

#define	XCANPS_SR_ACFBSY_MASK 0x00000800U
	Acceptance Filter busy. More...

#define	XCANPS_SR_TXFLL_MASK 0x00000400U
	TX FIFO is full. More...

#define	XCANPS_SR_TXBFLL_MASK 0x00000200U
	TX High Priority Buffer full. More...

#define	XCANPS_SR_ESTAT_MASK 0x00000180U
	Error Status. More...

#define	XCANPS_SR_ESTAT_SHIFT 7U
	Shift value for ESTAT. More...

#define	XCANPS_SR_ERRWRN_MASK 0x00000040U
	Error Warning. More...

#define	XCANPS_SR_BBSY_MASK 0x00000020U
	Bus Busy. More...

#define	XCANPS_SR_BIDLE_MASK 0x00000010U
	Bus Idle. More...

#define	XCANPS_SR_NORMAL_MASK 0x00000008U
	Normal Mode. More...

#define	XCANPS_SR_SLEEP_MASK 0x00000004U
	Sleep Mode. More...

#define	XCANPS_SR_LBACK_MASK 0x00000002U
	Loop Back Mode. More...

#define	XCANPS_SR_CONFIG_MASK 0x00000001U
	Configuration Mode. More...

Interrupt Status/Enable/Clear Register Bit Definitions and Masks
#define	XCANPS_IXR_TXFEMP_MASK 0x00004000U
	Tx Fifo Empty Interrupt. More...

#define	XCANPS_IXR_TXFWMEMP_MASK 0x00002000U
	Tx Fifo Watermark Empty. More...

#define	XCANPS_IXR_RXFWMFLL_MASK 0x00001000U
	Rx FIFO Watermark Full. More...

#define	XCANPS_IXR_WKUP_MASK 0x00000800U
	Wake up Interrupt. More...

#define	XCANPS_IXR_SLP_MASK 0x00000400U
	Sleep Interrupt. More...

#define	XCANPS_IXR_BSOFF_MASK 0x00000200U
	Bus Off Interrupt. More...

#define	XCANPS_IXR_ERROR_MASK 0x00000100U
	Error Interrupt. More...

#define	XCANPS_IXR_RXNEMP_MASK 0x00000080U
	RX FIFO Not Empty Interrupt. More...

#define	XCANPS_IXR_RXOFLW_MASK 0x00000040U
	RX FIFO Overflow Interrupt. More...

#define	XCANPS_IXR_RXUFLW_MASK 0x00000020U
	RX FIFO Underflow Interrupt. More...

#define	XCANPS_IXR_RXOK_MASK 0x00000010U
	New Message Received Intr. More...

#define	XCANPS_IXR_TXBFLL_MASK 0x00000008U
	TX High Priority Buf Full. More...

#define	XCANPS_IXR_TXFLL_MASK 0x00000004U
	TX FIFO Full Interrupt. More...

#define	XCANPS_IXR_TXOK_MASK 0x00000002U
	TX Successful Interrupt. More...

#define	XCANPS_IXR_ARBLST_MASK 0x00000001U
	Arbitration Lost Interrupt. More...

#define	XCANPS_IXR_ALL
	Basic interrupts. More...

CAN Timestamp Control Register (TCR) Bit Definitions and Masks
#define	XCANPS_TCR_CTS_MASK 0x00000001U
	Clear Timestamp counter mask. More...

CAN Watermark Register (WIR) Bit Definitions and Masks
#define	XCANPS_WIR_FW_MASK 0x0000003FU
	Rx Full Threshold mask. More...

#define	XCANPS_WIR_EW_MASK 0x00003F00U
	Tx Empty Threshold mask. More...

#define	XCANPS_WIR_EW_SHIFT 0x00000008U
	Tx Empty Threshold shift. More...

CAN Frame Identifier (TX High Priority Buffer/TX/RX/Acceptance Filter
Mask/Acceptance Filter ID)
#define	XCANPS_IDR_ID1_MASK 0xFFE00000U
	Standard Messg Identifier. More...

#define	XCANPS_IDR_ID1_SHIFT 21U
	Shift Value for ID1. More...

#define	XCANPS_IDR_SRR_MASK 0x00100000U
	Substitute Remote TX Req. More...

#define	XCANPS_IDR_SRR_SHIFT 20U
	Shift Value for SRR. More...

#define	XCANPS_IDR_IDE_MASK 0x00080000U
	Identifier Extension. More...

#define	XCANPS_IDR_IDE_SHIFT 19U
	Shift Value for IDE. More...

#define	XCANPS_IDR_ID2_MASK 0x0007FFFEU
	Extended Message Ident. More...

#define	XCANPS_IDR_ID2_SHIFT 1U
	Shift Value for ID2. More...

#define	XCANPS_IDR_RTR_MASK 0x00000001U
	Remote TX Request. More...

CAN Frame Data Length Code (TX High Priority Buffer/TX/RX)
#define	XCANPS_DLCR_DLC_MASK 0xF0000000U
	Data Length Code. More...

#define	XCANPS_DLCR_DLC_SHIFT 28U
	Shift Value for DLC. More...

#define	XCANPS_DLCR_TIMESTAMP_MASK 0x0000FFFFU
	Timestamp Mask (Rx only) More...

CAN Frame Data Word 1 (TX High Priority Buffer/TX/RX)
#define	XCANPS_DW1R_DB0_MASK 0xFF000000U
	Data Byte 0. More...

#define	XCANPS_DW1R_DB0_SHIFT 24U
	Shift Value for Data Byte 0. More...

#define	XCANPS_DW1R_DB1_MASK 0x00FF0000U
	Data Byte 1. More...

#define	XCANPS_DW1R_DB1_SHIFT 16U
	Shift Value for Data Byte 1. More...

#define	XCANPS_DW1R_DB2_MASK 0x0000FF00U
	Data Byte 2. More...

#define	XCANPS_DW1R_DB2_SHIFT 8U
	Shift Value for Data Byte 2. More...

#define	XCANPS_DW1R_DB3_MASK 0x000000FFU
	Data Byte 3. More...

CAN Frame Data Word 2 (TX High Priority Buffer/TX/RX)
#define	XCANPS_DW2R_DB4_MASK 0xFF000000U
	Data Byte 4. More...

#define	XCANPS_DW2R_DB4_SHIFT 24U
	Shift Value for Data Byte 4. More...

#define	XCANPS_DW2R_DB5_MASK 0x00FF0000U
	Data Byte 5. More...

#define	XCANPS_DW2R_DB5_SHIFT 16U
	Shift Value for Data Bbyet 5. More...

#define	XCANPS_DW2R_DB6_MASK 0x0000FF00U
	Data Byte 6. More...

#define	XCANPS_DW2R_DB6_SHIFT 8U
	Shift Value for Data Byte 6. More...

#define	XCANPS_DW2R_DB7_MASK 0x000000FFU
	Data Byte 7. More...

Acceptance Filter Register (AFR) Bit Definitions and Masks
#define	XCANPS_AFR_UAF4_MASK 0x00000008U
	Use Acceptance Filter No.4. More...

#define	XCANPS_AFR_UAF3_MASK 0x00000004U
	Use Acceptance Filter No.3. More...

#define	XCANPS_AFR_UAF2_MASK 0x00000002U
	Use Acceptance Filter No.2. More...

#define	XCANPS_AFR_UAF1_MASK 0x00000001U
	Use Acceptance Filter No.1. More...

#define	XCANPS_AFR_UAF_ALL_MASK
	Mask for Acceptance Filers. More...

CAN frame length constants
#define	XCANPS_MAX_FRAME_SIZE sizeof(u32)*16U
	Maximum CAN frame length in bytes. More...

Macro Definition Documentation

#define FRAME_DATA_LENGTH 8U

Frame Data field length.

#define XCANPS_AFIR1_OFFSET 0x00000068U

Acceptance Filter ID 1.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFIR2_OFFSET 0x00000070U

Acceptance Filter ID 2.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFIR3_OFFSET 0x00000078U

Acceptance Filter ID 3.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFIR4_OFFSET 0x00000080U

Acceptance Filter ID 4.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFMR1_OFFSET 0x00000064U

Acceptance Filter Mask 1.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFMR2_OFFSET 0x0000006CU

Acceptance Filter Mask 2.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFMR3_OFFSET 0x00000074U

Acceptance Filter Mask 3.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFMR4_OFFSET 0x0000007CU

Acceptance Filter Mask 4.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFR_OFFSET 0x00000060U

Acceptance Filter Register.

Referenced by XCanPs_AcceptFilterDisable(), XCanPs_AcceptFilterEnable(), and XCanPs_AcceptFilterGetEnabled().

#define XCANPS_AFR_UAF1_MASK 0x00000001U

Use Acceptance Filter No.1.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFR_UAF2_MASK 0x00000002U

Use Acceptance Filter No.2.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFR_UAF3_MASK 0x00000004U

Use Acceptance Filter No.3.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFR_UAF4_MASK 0x00000008U

Use Acceptance Filter No.4.

Referenced by XCanPs_AcceptFilterGet(), and XCanPs_AcceptFilterSet().

#define XCANPS_AFR_UAF_ALL_MASK

Value:

((u32)XCANPS_AFR_UAF4_MASK | \
                                        (u32)XCANPS_AFR_UAF3_MASK | \
                                        (u32)XCANPS_AFR_UAF2_MASK | \
                                        (u32)XCANPS_AFR_UAF1_MASK)

Mask for Acceptance Filers.

Referenced by XCanPs_AcceptFilterDisable(), and XCanPs_AcceptFilterEnable().

#define XCANPS_BRPR_BRP_MASK 0x000000FFU

Baud Rate Prescaler.

#define XCANPS_BRPR_OFFSET 0x00000008U

Baud Rate Prescaler.

Referenced by XCanPs_GetBaudRatePrescaler(), and XCanPs_SetBaudRatePrescaler().

#define XCANPS_BTR_OFFSET 0x0000000CU

Bit Timing Register.

Referenced by XCanPs_GetBitTiming(), and XCanPs_SetBitTiming().

#define XCANPS_BTR_SJW_MASK 0x00000180U

Synchronization Jump Width.

Referenced by XCanPs_GetBitTiming(), and XCanPs_SetBitTiming().

#define XCANPS_BTR_SJW_SHIFT 7U

Shift Value for SJW.

Referenced by XCanPs_GetBitTiming(), and XCanPs_SetBitTiming().

#define XCANPS_BTR_TS1_MASK 0x0000000FU

Time Segment 1.

Referenced by XCanPs_GetBitTiming(), and XCanPs_SetBitTiming().

#define XCANPS_BTR_TS2_MASK 0x00000070U

Time Segment 2.

Referenced by XCanPs_GetBitTiming(), and XCanPs_SetBitTiming().

#define XCANPS_BTR_TS2_SHIFT 4U

Shift Value for TS2.

Referenced by XCanPs_GetBitTiming(), and XCanPs_SetBitTiming().

#define XCanPs_ClearTimestamp ( InstancePtr )

Value:

XCanPs_WriteReg((InstancePtr)->CanConfig.BaseAddr, \

XCANPS_TCR_OFFSET, XCANPS_TCR_CTS_MASK)

XCANPS_TCR_CTS_MASK

#define XCANPS_TCR_CTS_MASK

Clear Timestamp counter mask.

Definition: xcanps_hw.h:205

XCANPS_TCR_OFFSET

#define XCANPS_TCR_OFFSET

Timestamp Control Register.

Definition: xcanps_hw.h:72

XCanPs_WriteReg

#define XCanPs_WriteReg(BaseAddr, RegOffset, Data)

This macro writes the given register.

Definition: xcanps_hw.h:333

This macro clears the timestamp in the Timestamp Control Register.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: None.

Note: C-Style signature: void XCanPs_ClearTimestamp(XCanPs *InstancePtr)

#define XCanPs_CreateDlcValue ( DataLengCode ) (((DataLengCode) << XCANPS_DLCR_DLC_SHIFT) & XCANPS_DLCR_DLC_MASK)

This macro calculates value for Data Length Code register given Data Length Code value.

Parameters

DataLengCode indicates Data Length Code value.

Returns: Value that can be assigned to Data Length Code register.

Note: C-Style signature: u32 XCanPs_CreateDlcValue(u32 DataLengCode)

Read the CAN specification for meaning of Data Length Code.

Referenced by XCanPs_SelfTest().

#define XCanPs_CreateIdValue	(	StandardId,
		SubRemoteTransReq,
		IdExtension,
		ExtendedId,
		RemoteTransReq
	)

Value:

((((StandardId) << XCANPS_IDR_ID1_SHIFT) & XCANPS_IDR_ID1_MASK) |       \
 (((SubRemoteTransReq) << XCANPS_IDR_SRR_SHIFT) & XCANPS_IDR_SRR_MASK)|\
 (((IdExtension) << XCANPS_IDR_IDE_SHIFT) & XCANPS_IDR_IDE_MASK) |      \
 (((ExtendedId) << XCANPS_IDR_ID2_SHIFT) & XCANPS_IDR_ID2_MASK) |       \
 ((RemoteTransReq) & XCANPS_IDR_RTR_MASK))

This macro calculates CAN message identifier value given identifier field values.

Parameters

StandardId	contains Standard Message ID value.
SubRemoteTransReq	contains Substitute Remote Transmission Request value.
IdExtension	contains Identifier Extension value.
ExtendedId	contains Extended Message ID value.
RemoteTransReq	contains Remote Transmission Request value.

Returns: Message Identifier value.

Note: C-Style signature: u32 XCanPs_CreateIdValue(u32 StandardId, u32 SubRemoteTransReq, u32 IdExtension, u32 ExtendedId, u32 RemoteTransReq)

Read the CAN specification for meaning of each parameter.

Referenced by XCanPs_SelfTest().

#define XCANPS_DLCR_DLC_MASK 0xF0000000U

Data Length Code.

#define XCANPS_DLCR_DLC_SHIFT 28U

Shift Value for DLC.

#define XCANPS_DLCR_TIMESTAMP_MASK 0x0000FFFFU

Timestamp Mask (Rx only)

Referenced by XCanPs_SelfTest().

#define XCANPS_DW1R_DB0_MASK 0xFF000000U

Data Byte 0.

#define XCANPS_DW1R_DB0_SHIFT 24U

Shift Value for Data Byte 0.

#define XCANPS_DW1R_DB1_MASK 0x00FF0000U

Data Byte 1.

#define XCANPS_DW1R_DB1_SHIFT 16U

Shift Value for Data Byte 1.

#define XCANPS_DW1R_DB2_MASK 0x0000FF00U

Data Byte 2.

#define XCANPS_DW1R_DB2_SHIFT 8U

Shift Value for Data Byte 2.

#define XCANPS_DW1R_DB3_MASK 0x000000FFU

Data Byte 3.

#define XCANPS_DW2R_DB4_MASK 0xFF000000U

Data Byte 4.

#define XCANPS_DW2R_DB4_SHIFT 24U

Shift Value for Data Byte 4.

#define XCANPS_DW2R_DB5_MASK 0x00FF0000U

Data Byte 5.

#define XCANPS_DW2R_DB5_SHIFT 16U

Shift Value for Data Bbyet 5.

#define XCANPS_DW2R_DB6_MASK 0x0000FF00U

Data Byte 6.

#define XCANPS_DW2R_DB6_SHIFT 8U

Shift Value for Data Byte 6.

#define XCANPS_DW2R_DB7_MASK 0x000000FFU

Data Byte 7.

#define XCANPS_ECR_OFFSET 0x00000010U

Error Counter Register.

Referenced by XCanPs_GetBusErrorCounter().

#define XCANPS_ECR_REC_MASK 0x0000FF00U

Receive Error Counter.

Referenced by XCanPs_GetBusErrorCounter().

#define XCANPS_ECR_REC_SHIFT 8U

Shift Value for REC.

Referenced by XCanPs_GetBusErrorCounter().

#define XCANPS_ECR_TEC_MASK 0x000000FFU

Transmit Error Counter.

Referenced by XCanPs_GetBusErrorCounter().

#define XCANPS_ESR_ACKER_MASK 0x00000010U

ACK Error.

#define XCANPS_ESR_BERR_MASK 0x00000008U

Bit Error.

#define XCANPS_ESR_CRCER_MASK 0x00000001U

CRC Error.

#define XCANPS_ESR_FMER_MASK 0x00000002U

Form Error.

#define XCANPS_ESR_OFFSET 0x00000014U

Error Status Register.

Referenced by XCanPs_ClearBusErrorStatus(), and XCanPs_GetBusErrorStatus().

#define XCANPS_ESR_STER_MASK 0x00000004U

Stuff Error.

#define XCANPS_H

by using protection macros

#define XCANPS_HANDLER_ERROR 3U

Handler type for error interrupt.

Referenced by CanPsIntrExample(), CanPsWatermarkIntrExample(), and XCanPs_SetHandler().

#define XCANPS_HANDLER_EVENT 4U

Handler type for all other interrupts.

Referenced by CanPsIntrExample(), CanPsWatermarkIntrExample(), and XCanPs_SetHandler().

#define XCANPS_HANDLER_RECV 2U

Handler type for frame reception interrupt.

Referenced by CanPsIntrExample(), CanPsWatermarkIntrExample(), and XCanPs_SetHandler().

#define XCANPS_HANDLER_SEND 1U

Handler type for frame sending interrupt.

Referenced by CanPsIntrExample(), CanPsWatermarkIntrExample(), and XCanPs_SetHandler().

#define XCANPS_HW_H

by using protection macros

#define XCANPS_ICR_OFFSET 0x00000024U

Interrupt Clear Register.

Referenced by XCanPs_IntrClear().

#define XCANPS_IDR_ID1_MASK 0xFFE00000U

Standard Messg Identifier.

#define XCANPS_IDR_ID1_SHIFT 21U

Shift Value for ID1.

#define XCANPS_IDR_ID2_MASK 0x0007FFFEU

Extended Message Ident.

#define XCANPS_IDR_ID2_SHIFT 1U

Shift Value for ID2.

#define XCANPS_IDR_IDE_MASK 0x00080000U

Identifier Extension.

#define XCANPS_IDR_IDE_SHIFT 19U

Shift Value for IDE.

#define XCANPS_IDR_RTR_MASK 0x00000001U

Remote TX Request.

#define XCANPS_IDR_SRR_MASK 0x00100000U

Substitute Remote TX Req.

#define XCANPS_IDR_SRR_SHIFT 20U

Shift Value for SRR.

#define XCANPS_IER_OFFSET 0x00000020U

Interrupt Enable Register.

Referenced by XCanPs_IntrDisable(), XCanPs_IntrEnable(), and XCanPs_IntrGetEnabled().

#define XCanPs_IsAcceptFilterBusy ( InstancePtr )

Value:

(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \

XCANPS_SR_OFFSET) & XCANPS_SR_ACFBSY_MASK) != (u32)0) ? TRUE : FALSE)

XCANPS_SR_ACFBSY_MASK

#define XCANPS_SR_ACFBSY_MASK

Acceptance Filter busy.

Definition: xcanps_hw.h:154

XCANPS_SR_OFFSET

#define XCANPS_SR_OFFSET

Status Register.

Definition: xcanps_hw.h:67

XCanPs_ReadReg

#define XCanPs_ReadReg(BaseAddr, RegOffset)

This macro reads the given register.

Definition: xcanps_hw.h:315

This macro checks if the CAN device is ready for the driver to change Acceptance Filter Identifier Registers (AFIR) and Acceptance Filter Mask Registers (AFMR).

AFIR and AFMR for a filter are changeable only after the filter is disabled and this routine returns FALSE. The filter can be disabled using the XCanPs_AcceptFilterDisable function.

Use the XCanPs_Accept_* functions for configuring the acceptance filters.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns

TRUE if the device is busy and NOT ready to accept writes to AFIR and AFMR.
FALSE if the device is ready to accept writes to AFIR and AFMR.

Note: C-Style signature: int XCanPs_IsAcceptFilterBusy(XCanPs *InstancePtr)

Referenced by XCanPs_AcceptFilterSet().

#define XCanPs_IsHighPriorityBufFull ( InstancePtr )

Value:

(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \

XCANPS_SR_OFFSET) & XCANPS_SR_TXBFLL_MASK) != (u32)0) ? TRUE : FALSE)

XCANPS_SR_OFFSET

#define XCANPS_SR_OFFSET

Status Register.

Definition: xcanps_hw.h:67

XCanPs_ReadReg

#define XCanPs_ReadReg(BaseAddr, RegOffset)

This macro reads the given register.

Definition: xcanps_hw.h:315

XCANPS_SR_TXBFLL_MASK

#define XCANPS_SR_TXBFLL_MASK

TX High Priority Buffer full.

Definition: xcanps_hw.h:156

This macro checks if the Transmission High Priority Buffer is full.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns

TRUE if the TX High Priority Buffer is full.
FALSE if the TX High Priority Buffer is NOT full.

Note: C-Style signature: int XCanPs_IsHighPriorityBufFull(XCanPs *InstancePtr)

Referenced by XCanPs_SendHighPriority().

#define XCANPS_ISR_OFFSET 0x0000001CU

Interrupt Status Register.

Referenced by XCanPs_IntrGetStatus(), and XCanPs_SelfTest().

#define XCanPs_IsRxEmpty ( InstancePtr )

Value:

(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \

XCANPS_ISR_OFFSET) & XCANPS_IXR_RXNEMP_MASK) != (u32)0) ? FALSE : TRUE)

XCanPs_ReadReg

#define XCanPs_ReadReg(BaseAddr, RegOffset)

This macro reads the given register.

Definition: xcanps_hw.h:315

XCANPS_IXR_RXNEMP_MASK

#define XCANPS_IXR_RXNEMP_MASK

RX FIFO Not Empty Interrupt.

Definition: xcanps_hw.h:178

XCANPS_ISR_OFFSET

#define XCANPS_ISR_OFFSET

Interrupt Status Register.

Definition: xcanps_hw.h:69

This macro checks if the receive FIFO is empty.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns

TRUE if RX FIFO is empty.
FALSE if the RX FIFO is NOT empty.

Note: C-Style signature: int XCanPs_IsRxEmpty(XCanPs *InstancePtr)

Referenced by XCanPs_Recv().

#define XCanPs_IsTxDone ( InstancePtr )

Value:

(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \

XCANPS_ISR_OFFSET) & XCANPS_IXR_TXOK_MASK) != (u32)0) ? TRUE : FALSE)

XCanPs_ReadReg

#define XCanPs_ReadReg(BaseAddr, RegOffset)

This macro reads the given register.

Definition: xcanps_hw.h:315

XCANPS_IXR_TXOK_MASK

#define XCANPS_IXR_TXOK_MASK

TX Successful Interrupt.

Definition: xcanps_hw.h:184

XCANPS_ISR_OFFSET

#define XCANPS_ISR_OFFSET

Interrupt Status Register.

Definition: xcanps_hw.h:69

This macro checks if the transmission is complete.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns

TRUE if the transmission is done.
FALSE if the transmission is not done.

Note: C-Style signature: int XCanPs_IsTxDone(XCanPs *InstancePtr)

#define XCanPs_IsTxFifoFull ( InstancePtr )

Value:

(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \

XCANPS_SR_OFFSET) & XCANPS_SR_TXFLL_MASK) != (u32)0) ? TRUE : FALSE)

XCANPS_SR_OFFSET

#define XCANPS_SR_OFFSET

Status Register.

Definition: xcanps_hw.h:67

XCanPs_ReadReg

#define XCanPs_ReadReg(BaseAddr, RegOffset)

This macro reads the given register.

Definition: xcanps_hw.h:315

XCANPS_SR_TXFLL_MASK

#define XCANPS_SR_TXFLL_MASK

TX FIFO is full.

Definition: xcanps_hw.h:155

This macro checks if the transmission FIFO is full.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns

TRUE if TX FIFO is full.
FALSE if the TX FIFO is NOT full.

Note: C-Style signature: int XCanPs_IsTxFifoFull(XCanPs *InstancePtr)

Referenced by XCanPs_Send().

#define XCANPS_IXR_ALL

Value:

((u32)XCANPS_IXR_RXFWMFLL_MASK | \
                                (u32)XCANPS_IXR_WKUP_MASK   | \
                                (u32)XCANPS_IXR_SLP_MASK        | \
                                (u32)XCANPS_IXR_BSOFF_MASK  | \
                                (u32)XCANPS_IXR_ERROR_MASK  | \
                                (u32)XCANPS_IXR_RXNEMP_MASK | \
                                (u32)XCANPS_IXR_RXOFLW_MASK | \
                                (u32)XCANPS_IXR_RXUFLW_MASK | \
                                (u32)XCANPS_IXR_RXOK_MASK   | \
                                (u32)XCANPS_IXR_TXBFLL_MASK | \
                                (u32)XCANPS_IXR_TXFLL_MASK  | \
                                (u32)XCANPS_IXR_TXOK_MASK   | \
                                (u32)XCANPS_IXR_ARBLST_MASK)

Basic interrupts.

Referenced by CanPsIntrExample(), and CanPsWatermarkIntrExample().

#define XCANPS_IXR_ARBLST_MASK 0x00000001U

Arbitration Lost Interrupt.

Referenced by XCanPs_IntrHandler().

#define XCANPS_IXR_BSOFF_MASK 0x00000200U

Bus Off Interrupt.

Referenced by XCanPs_IntrHandler().

#define XCANPS_IXR_ERROR_MASK 0x00000100U

Error Interrupt.

Referenced by XCanPs_IntrHandler().

#define XCANPS_IXR_RXFLL_MASK XCANPS_IXR_RXFWMFLL_MASK

Rx FIFO Watermark Full.

#define XCANPS_IXR_RXFWMFLL_MASK 0x00001000U

Rx FIFO Watermark Full.

Referenced by XCanPs_IntrHandler().

#define XCANPS_IXR_RXNEMP_MASK 0x00000080U

RX FIFO Not Empty Interrupt.

Referenced by CanPsWatermarkIntrExample(), XCanPs_IntrHandler(), XCanPs_Recv(), and XCanPs_SelfTest().

#define XCANPS_IXR_RXOFLW_MASK 0x00000040U

RX FIFO Overflow Interrupt.

Referenced by XCanPs_IntrHandler().

#define XCANPS_IXR_RXOK_MASK 0x00000010U

New Message Received Intr.

Referenced by CanPsWatermarkIntrExample().

#define XCANPS_IXR_RXUFLW_MASK 0x00000020U

RX FIFO Underflow Interrupt.

Referenced by XCanPs_IntrHandler().

#define XCANPS_IXR_SLP_MASK 0x00000400U

Sleep Interrupt.

Referenced by XCanPs_IntrHandler().

#define XCANPS_IXR_TXBFLL_MASK 0x00000008U

TX High Priority Buf Full.

Referenced by XCanPs_IntrHandler().

#define XCANPS_IXR_TXFEMP_MASK 0x00004000U

Tx Fifo Empty Interrupt.

#define XCANPS_IXR_TXFLL_MASK 0x00000004U

TX FIFO Full Interrupt.

Referenced by XCanPs_IntrHandler().

#define XCANPS_IXR_TXFWMEMP_MASK 0x00002000U

Tx Fifo Watermark Empty.

Referenced by CanPsWatermarkIntrExample(), and XCanPs_IntrHandler().

#define XCANPS_IXR_TXOK_MASK 0x00000002U

TX Successful Interrupt.

Referenced by CanPsWatermarkIntrExample(), and XCanPs_IntrHandler().

#define XCANPS_IXR_WKUP_MASK 0x00000800U

Wake up Interrupt.

Referenced by XCanPs_IntrHandler().

#define XCANPS_MAX_FRAME_SIZE sizeof(u32)*16U

Maximum CAN frame length in bytes.

#define XCANPS_MAX_FRAME_SIZE_IN_WORDS ((XCANPS_MAX_FRAME_SIZE) / (sizeof(u32)))

Flag for Max Frame size.

Referenced by XCanPs_SelfTest().

#define XCANPS_MODE_CONFIG 0x00000001U

Configuration mode.

Referenced by CanPsPolledExample(), XCanPs_EnterMode(), XCanPs_GetMode(), XCanPs_SelfTest(), XCanPs_SetBaudRatePrescaler(), XCanPs_SetBitTiming(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

#define XCANPS_MODE_LOOPBACK 0x00000004U

Loop Back mode.

Referenced by CanPsIntrExample(), CanPsPolledExample(), CanPsWatermarkIntrExample(), XCanPs_EnterMode(), XCanPs_GetMode(), and XCanPs_SelfTest().

#define XCANPS_MODE_NORMAL 0x00000002U

Normal mode.

Referenced by XCanPs_EnterMode(), and XCanPs_GetMode().

#define XCANPS_MODE_SLEEP 0x00000008U

Sleep mode.

Referenced by XCanPs_EnterMode(), and XCanPs_GetMode().

#define XCANPS_MODE_SNOOP 0x00000010U

Snoop mode.

Referenced by XCanPs_EnterMode(), and XCanPs_GetMode().

#define XCANPS_MSR_LBACK_MASK 0x00000002U

Loop Back Mode Select.

Referenced by XCanPs_EnterMode().

#define XCANPS_MSR_OFFSET 0x00000004U

Mode Select Register.

Referenced by XCanPs_EnterMode().

#define XCANPS_MSR_SLEEP_MASK 0x00000001U

Sleep Mode Select.

Referenced by XCanPs_EnterMode().

#define XCANPS_MSR_SNOOP_MASK 0x00000004U

Snoop Mode Select.

Referenced by XCanPs_EnterMode().

#define XCanPs_ReadReg	(	BaseAddr,
		RegOffset
	)	Xil_In32((BaseAddr) + (u32)(RegOffset))

This macro reads the given register.

Parameters

BaseAddr	is the base address of the device.
RegOffset	is the register offset to be read.

Returns: The 32-bit value of the register

Note: None.

Referenced by XCanPs_AcceptFilterDisable(), XCanPs_AcceptFilterEnable(), XCanPs_AcceptFilterGet(), XCanPs_AcceptFilterGetEnabled(), XCanPs_GetBaudRatePrescaler(), XCanPs_GetBitTiming(), XCanPs_GetBusErrorCounter(), XCanPs_GetBusErrorStatus(), XCanPs_GetRxIntrWatermark(), XCanPs_GetStatus(), XCanPs_GetTxIntrWatermark(), XCanPs_IntrGetEnabled(), XCanPs_IntrGetStatus(), XCanPs_Recv(), XCanPs_SelfTest(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

#define XCANPS_RXFIFO_DLC_OFFSET 0x00000054U

RX FIFO DLC.

Referenced by XCanPs_Recv().

#define XCANPS_RXFIFO_DW1_OFFSET 0x00000058U

RX FIFO Data Word 1.

Referenced by XCanPs_Recv().

#define XCANPS_RXFIFO_DW2_OFFSET 0x0000005CU

RX FIFO Data Word 2.

Referenced by XCanPs_Recv().

#define XCANPS_RXFIFO_ID_OFFSET 0x00000050U

RX FIFO ID.

Referenced by XCanPs_Recv().

#define XCANPS_RXFWIR_RXFLL_MASK XCANPS_WIR_FW_MASK

Rx Full Threshold mask.

#define XCANPS_RXWIR_OFFSET XCANPS_WIR_OFFSET

Watermark Interrupt Reg.

#define XCANPS_SR_ACFBSY_MASK 0x00000800U

Acceptance Filter busy.

#define XCANPS_SR_BBSY_MASK 0x00000020U

Bus Busy.

#define XCANPS_SR_BIDLE_MASK 0x00000010U

Bus Idle.

#define XCANPS_SR_CONFIG_MASK 0x00000001U

Configuration Mode.

Referenced by XCanPs_GetMode().

#define XCANPS_SR_ERRWRN_MASK 0x00000040U

Error Warning.

#define XCANPS_SR_ESTAT_MASK 0x00000180U

Error Status.

#define XCANPS_SR_ESTAT_SHIFT 7U

Shift value for ESTAT.

#define XCANPS_SR_LBACK_MASK 0x00000002U

Loop Back Mode.

#define XCANPS_SR_NORMAL_MASK 0x00000008U

Normal Mode.

Referenced by XCanPs_GetMode().

#define XCANPS_SR_OFFSET 0x00000018U

Status Register.

Referenced by XCanPs_GetStatus().

#define XCANPS_SR_SLEEP_MASK 0x00000004U

Sleep Mode.

Referenced by XCanPs_GetMode().

#define XCANPS_SR_SNOOP_MASK 0x00001000U

Snoop Mask.

Referenced by XCanPs_GetMode().

#define XCANPS_SR_TXBFLL_MASK 0x00000200U

TX High Priority Buffer full.

#define XCANPS_SR_TXFLL_MASK 0x00000400U

TX FIFO is full.

#define XCANPS_SRR_CEN_MASK 0x00000002U

Can Enable.

Referenced by XCanPs_EnterMode().

#define XCANPS_SRR_OFFSET 0x00000000U

Software Reset Register.

Referenced by XCanPs_EnterMode(), XCanPs_Reset(), and XCanPs_ResetHw().

#define XCANPS_SRR_SRST_MASK 0x00000001U

Reset.

Referenced by XCanPs_Reset(), and XCanPs_ResetHw().

#define XCANPS_TCR_CTS_MASK 0x00000001U

Clear Timestamp counter mask.

#define XCANPS_TCR_OFFSET 0x00000028U

Timestamp Control Register.

#define XCANPS_TXBUF_DLC_OFFSET XCANPS_TXHPB_DLC_OFFSET

TX High Priority Buffer DLC.

#define XCANPS_TXBUF_DW1_OFFSET XCANPS_TXHPB_DW1_OFFSET

TX High Priority Buf Data 1.

#define XCANPS_TXBUF_DW2_OFFSET XCANPS_TXHPB_DW2_OFFSET

TX High Priority Buf Data Word 2.

#define XCANPS_TXBUF_ID_OFFSET XCANPS_TXHPB_ID_OFFSET

TX High Priority Buffer ID.

#define XCANPS_TXFIFO_DLC_OFFSET 0x00000034U

TX FIFO DLC.

Referenced by XCanPs_Send().

#define XCANPS_TXFIFO_DW1_OFFSET 0x00000038U

TX FIFO Data Word 1.

Referenced by XCanPs_Send().

#define XCANPS_TXFIFO_DW2_OFFSET 0x0000003CU

TX FIFO Data Word 2.

Referenced by XCanPs_Send().

#define XCANPS_TXFIFO_ID_OFFSET 0x00000030U

TX FIFO ID.

Referenced by XCanPs_Send().

#define XCANPS_TXHPB_DLC_OFFSET 0x00000044U

TX High Priority Buffer DLC.

Referenced by XCanPs_SendHighPriority().

#define XCANPS_TXHPB_DW1_OFFSET 0x00000048U

TX High Priority Buf Data 1.

Referenced by XCanPs_SendHighPriority().

#define XCANPS_TXHPB_DW2_OFFSET 0x0000004CU

TX High Priority Buf Data Word 2.

Referenced by XCanPs_SendHighPriority().

#define XCANPS_TXHPB_ID_OFFSET 0x00000040U

TX High Priority Buffer ID.

Referenced by XCanPs_SendHighPriority().

#define XCANPS_WIR_EW_MASK 0x00003F00U

Tx Empty Threshold mask.

Referenced by XCanPs_GetTxIntrWatermark(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

#define XCANPS_WIR_EW_SHIFT 0x00000008U

Tx Empty Threshold shift.

Referenced by XCanPs_GetTxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

#define XCANPS_WIR_FW_MASK 0x0000003FU

Rx Full Threshold mask.

Referenced by XCanPs_GetRxIntrWatermark(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

#define XCANPS_WIR_OFFSET 0x0000002CU

Watermark Interrupt Reg.

Referenced by XCanPs_GetRxIntrWatermark(), XCanPs_GetTxIntrWatermark(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

#define XCanPs_WriteReg	(	BaseAddr,
		RegOffset,
		Data
	)	Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data))

This macro writes the given register.

Parameters

BaseAddr	is the base address of the device.
RegOffset	is the register offset to be written.
Data	is the 32-bit value to write to the register.

Returns: None.

Note: None.

Referenced by XCanPs_AcceptFilterDisable(), XCanPs_AcceptFilterEnable(), XCanPs_AcceptFilterSet(), XCanPs_ClearBusErrorStatus(), XCanPs_EnterMode(), XCanPs_IntrClear(), XCanPs_IntrDisable(), XCanPs_IntrEnable(), XCanPs_Reset(), XCanPs_ResetHw(), XCanPs_Send(), XCanPs_SendHighPriority(), XCanPs_SetBaudRatePrescaler(), XCanPs_SetBitTiming(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

Typedef Documentation

typedef void(* XCanPs_ErrorHandler)(void *CallBackRef, u32 ErrorMask)

Callback type for error interrupt.

Parameters

CallBackRef	is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
ErrorMask	is a bit mask indicating the cause of the error. Its value equals 'OR'ing one or more XCANPS_ESR_* values defined in xcanps_hw.h

typedef void(* XCanPs_EventHandler)(void *CallBackRef, u32 Mask)

Callback type for all kinds of interrupts except sending frame interrupt, receiving frame interrupt, and error interrupt.

Parameters

CallBackRef	is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
Mask	is a bit mask indicating the pending interrupts. Its value equals 'OR'ing one or more XCANPS_IXR_* defined in xcanps_hw.h

typedef void(* XCanPs_SendRecvHandler)(void *CallBackRef)

Callback type for frame sending and reception interrupts.

Parameters

CallBackRef is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.

Function Documentation

void XCanPs_AcceptFilterDisable	(	XCanPs *	InstancePtr,
		u32	FilterIndexes
	)

This routine disables individual acceptance filters.

Up to 4 filters could be disabled. If all acceptance filters are disabled then all the received frames are stored in the RX FIFO.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
FilterIndexes	specifies which filter(s) to disable. Use any XCANPS_AFR_UAF_MASK to disable one filter, and "Or" multiple XCANPS_AFR_UAF_MASK values if multiple filters need to be disabled. Any filter not specified in this parameter will keep its previous enable/disable setting. If all acceptance filters are disabled then all received frames are stored in the RX FIFO.

Returns: None.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_AFR_OFFSET, XCANPS_AFR_UAF_ALL_MASK, XCanPs_ReadReg, and XCanPs_WriteReg.

void XCanPs_AcceptFilterEnable	(	XCanPs *	InstancePtr,
		u32	FilterIndexes
	)

This routine enables individual acceptance filters.

Up to 4 filters could be enabled.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
FilterIndexes	specifies which filter(s) to enable. Use any XCANPS_AFR_UAF_MASK to enable one filter, and "Or" multiple XCANPS_AFR_UAF_MASK values if multiple filters need to be enabled. Any filter not specified in this parameter will keep its previous enable/disable setting.

Returns: None.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_AFR_OFFSET, XCANPS_AFR_UAF_ALL_MASK, XCanPs_ReadReg, and XCanPs_WriteReg.

void XCanPs_AcceptFilterGet	(	XCanPs *	InstancePtr,
		u32	FilterIndex,
		u32 *	MaskValue,
		u32 *	IdValue
	)

This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter.

Use XCANPS_IDR_* defined in xcanps_hw.h to interpret the values. Read the xcanps.h file and device specification for details.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
FilterIndex	defines which Acceptance Filter Mask Register to get Mask and ID from. Use any single XCANPS_FILTER_* value.
MaskValue	is a pointer to the data in which the Mask value read from the chosen Acceptance Filter Mask Register is returned.
IdValue	is a pointer to the data in which the ID value read from the chosen Acceptance Filter ID Register is returned.

Returns: None.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_AFIR1_OFFSET, XCANPS_AFIR2_OFFSET, XCANPS_AFIR3_OFFSET, XCANPS_AFIR4_OFFSET, XCANPS_AFMR1_OFFSET, XCANPS_AFMR2_OFFSET, XCANPS_AFMR3_OFFSET, XCANPS_AFMR4_OFFSET, XCANPS_AFR_UAF1_MASK, XCANPS_AFR_UAF2_MASK, XCANPS_AFR_UAF3_MASK, XCANPS_AFR_UAF4_MASK, and XCanPs_ReadReg.

u32 XCanPs_AcceptFilterGetEnabled ( XCanPs * InstancePtr )

This function returns enabled acceptance filters.

Use XCANPS_AFR_UAF*_MASK defined in xcanps_hw.h to interpret the returned value. If no acceptance filters are enabled then all received frames are stored in the RX FIFO.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: The value stored in Acceptance Filter Register.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_AFR_OFFSET, and XCanPs_ReadReg.

Referenced by XCanPs_AcceptFilterSet().

s32 XCanPs_AcceptFilterSet	(	XCanPs *	InstancePtr,
		u32	FilterIndex,
		u32	MaskValue,
		u32	IdValue
	)

This function sets values to the Acceptance Filter Mask Register (AFMR) and Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter.

Use XCANPS_IDR_* defined in xcanps_hw.h to create the values to set the filter. Read the xcanps.h file and device specification for details.

This function should be called only after:

The given filter is disabled by calling XCanPs_AcceptFilterDisable()
And the CAN device is ready to accept writes to AFMR and AFIR, i.e., XCanPs_IsAcceptFilterBusy() returns FALSE.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
FilterIndex	defines which Acceptance Filter Mask and ID Register to set. Use any single XCANPS_AFR_UAF*_MASK value.
MaskValue	is the value to write to the chosen Acceptance Filter Mask Register.
IdValue	is the value to write to the chosen Acceptance Filter ID Register.

Returns

XST_SUCCESS if the values were set successfully.
XST_FAILURE if the given filter was not disabled, or the CAN device was not ready to accept writes to AFMR and AFIR.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_AcceptFilterGetEnabled(), XCANPS_AFIR1_OFFSET, XCANPS_AFIR2_OFFSET, XCANPS_AFIR3_OFFSET, XCANPS_AFIR4_OFFSET, XCANPS_AFMR1_OFFSET, XCANPS_AFMR2_OFFSET, XCANPS_AFMR3_OFFSET, XCANPS_AFMR4_OFFSET, XCANPS_AFR_UAF1_MASK, XCANPS_AFR_UAF2_MASK, XCANPS_AFR_UAF3_MASK, XCANPS_AFR_UAF4_MASK, XCanPs_IsAcceptFilterBusy, and XCanPs_WriteReg.

s32 XCanPs_CfgInitialize	(	XCanPs *	InstancePtr,
		XCanPs_Config *	ConfigPtr,
		UINTPTR	EffectiveAddr
	)

This function initializes a XCanPs instance/driver.

The initialization entails:

Initialize all members of the XCanPs structure.
Reset the CAN device. The CAN device will enter Configuration Mode immediately after the reset is finished.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
ConfigPtr	points to the XCanPs device configuration structure.
EffectiveAddr	is the device base address in the virtual memory address space. If the address translation is not used then the physical address is passed. Unexpected errors may occur if the address mapping is changed after this function is invoked.

Returns: XST_SUCCESS always.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs_Config::DeviceId, XCanPs::ErrorHandler, XCanPs::EventHandler, XCanPs::IsBusy, XCanPs::IsReady, XCanPs::RecvHandler, XCanPs::SendHandler, and XCanPs_Reset().

Referenced by CanPsIntrExample(), CanPsPolledExample(), and CanPsWatermarkIntrExample().

void XCanPs_ClearBusErrorStatus	(	XCanPs *	InstancePtr,
		u32	Mask
	)

This function clears Error Status bit(s) previously set in Error Status Register (ESR).

Use the XCANPS_ESR_* constants defined in xcanps_hw.h to create the value to pass in. If a bit was cleared in Error Status Register before this function is called, it will not be modified.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
Mask	is he 32-bit mask used to clear bits in Error Status Register. Multiple XCANPS_ESR_* values can be 'OR'ed to clear multiple bits.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ESR_OFFSET, and XCanPs_WriteReg.

Referenced by XCanPs_IntrHandler().

void XCanPs_EnterMode	(	XCanPs *	InstancePtr,
		u8	OperationMode
	)

This function allows the CAN device to enter one of the following operation modes:

  - Configuration Mode: Pass in parameter XCANPS_MODE_CONFIG
  - Sleep Mode: Pass in parameter XCANPS_MODE_SLEEP
  - Normal Mode: Pass in parameter XCANPS_MODE_NORMAL
  - Loop Back Mode: Pass in parameter XCANPS_MODE_LOOPBACK.
  - Snoop Mode: Pass in parameter XCANPS_MODE_SNOOP.

Read the xcanps.h file and device specification for detailed description of each operation mode.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
OperationMode	specify which operation mode to enter. Valid value is any of XCANPS_MODE_* defined in xcanps.h. Multiple modes can not be entered at the same time.

Returns: None.

Note

This function does NOT ensure CAN device enters the specified operation mode before it returns the control to the caller. The caller is responsible for checking current operation mode using XCanPs_GetMode().

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_GetMode(), XCANPS_MODE_CONFIG, XCANPS_MODE_LOOPBACK, XCANPS_MODE_NORMAL, XCANPS_MODE_SLEEP, XCANPS_MODE_SNOOP, XCANPS_MSR_LBACK_MASK, XCANPS_MSR_OFFSET, XCANPS_MSR_SLEEP_MASK, XCANPS_MSR_SNOOP_MASK, XCANPS_SRR_CEN_MASK, XCANPS_SRR_OFFSET, and XCanPs_WriteReg.

Referenced by CanPsIntrExample(), CanPsPolledExample(), CanPsWatermarkIntrExample(), and XCanPs_SelfTest().

u8 XCanPs_GetBaudRatePrescaler ( XCanPs * InstancePtr )

This routine gets Baud Rate Prescaler value.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: Current used Baud Rate Prescaler value. The value's range is from 0 to 255.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_BRPR_OFFSET, and XCanPs_ReadReg.

void XCanPs_GetBitTiming	(	XCanPs *	InstancePtr,
		u8 *	SyncJumpWidth,
		u8 *	TimeSegment2,
		u8 *	TimeSegment1
	)

This routine gets Bit time.

Time segment 1, Time segment 2 and Synchronization Jump Width values are read in this function. According to device specification, the actual value of each of these fields is one more than the value read. Read the device specification for details.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
SyncJumpWidth	will store the Synchronization Jump Width value after this function returns. Its value ranges from 0 to 3.
TimeSegment2	will store the Time Segment 2 value after this function returns. Its value ranges from 0 to 7.
TimeSegment1	will store the Time Segment 1 value after this function returns. Its value ranges from 0 to 15.

Returns: None.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_BTR_OFFSET, XCANPS_BTR_SJW_MASK, XCANPS_BTR_SJW_SHIFT, XCANPS_BTR_TS1_MASK, XCANPS_BTR_TS2_MASK, XCANPS_BTR_TS2_SHIFT, and XCanPs_ReadReg.

void XCanPs_GetBusErrorCounter	(	XCanPs *	InstancePtr,
		u8 *	RxErrorCount,
		u8 *	TxErrorCount
	)

This function reads Receive and Transmit error counters.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
RxErrorCount	is a pointer to data in which the Receive Error counter value is returned.
TxErrorCount	is a pointer to data in which the Transmit Error counter value is returned.

Returns: None.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ECR_OFFSET, XCANPS_ECR_REC_MASK, XCANPS_ECR_REC_SHIFT, XCANPS_ECR_TEC_MASK, and XCanPs_ReadReg.

u32 XCanPs_GetBusErrorStatus ( XCanPs * InstancePtr )

This function reads Error Status value from Error Status Register (ESR).

Use the XCANPS_ESR_* constants defined in xcanps_hw.h to interpret the returned value.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: The 32-bit value read from Error Status Register.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ESR_OFFSET, and XCanPs_ReadReg.

Referenced by XCanPs_IntrHandler().

u8 XCanPs_GetMode ( XCanPs * InstancePtr )

This routine returns the current operation mode of the CAN device.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns

XCANPS_MODE_CONFIG if the device is in Configuration Mode.
XCANPS_MODE_SLEEP if the device is in Sleep Mode.
XCANPS_MODE_NORMAL if the device is in Normal Mode.
XCANPS_MODE_LOOPBACK if the device is in Loop Back Mode.
XCANPS_MODE_SNOOP if the device is in Snoop Mode.

Note: None.

References XCanPs::IsReady, XCanPs_GetStatus(), XCANPS_MODE_CONFIG, XCANPS_MODE_LOOPBACK, XCANPS_MODE_NORMAL, XCANPS_MODE_SLEEP, XCANPS_MODE_SNOOP, XCANPS_SR_CONFIG_MASK, XCANPS_SR_NORMAL_MASK, XCANPS_SR_SLEEP_MASK, and XCANPS_SR_SNOOP_MASK.

Referenced by CanPsIntrExample(), CanPsPolledExample(), CanPsWatermarkIntrExample(), XCanPs_EnterMode(), XCanPs_SelfTest(), XCanPs_SetBaudRatePrescaler(), XCanPs_SetBitTiming(), XCanPs_SetRxIntrWatermark(), and XCanPs_SetTxIntrWatermark().

u8 XCanPs_GetRxIntrWatermark ( XCanPs * InstancePtr )

This routine gets the Rx Full threshold from the Watermark Interrupt Register.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: The Rx FIFO full watermark threshold value. The valid values are 1 to 63.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_ReadReg, XCANPS_WIR_FW_MASK, and XCANPS_WIR_OFFSET.

u32 XCanPs_GetStatus ( XCanPs * InstancePtr )

This function returns Status value from Status Register (SR).

Use the XCANPS_SR_* constants defined in xcanps_hw.h to interpret the returned value.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: The 32-bit value read from Status Register.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_ReadReg, and XCANPS_SR_OFFSET.

Referenced by XCanPs_GetMode().

u8 XCanPs_GetTxIntrWatermark ( XCanPs * InstancePtr )

This routine gets the Tx Empty threshold from Watermark Interrupt Register.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: The Tx Empty FIFO threshold value. The valid values are 1 to 63.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_ReadReg, XCANPS_WIR_EW_MASK, XCANPS_WIR_EW_SHIFT, and XCANPS_WIR_OFFSET.

void XCanPs_IntrClear	(	XCanPs *	InstancePtr,
		u32	Mask
	)

This function clears interrupt(s).

Every bit set in Interrupt Status Register indicates that a specific type of interrupt is occurring, and this function clears one or more interrupts by writing a bit mask to Interrupt Clear Register.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
Mask	is the mask to clear. Bit positions of 1 will be cleared. Bit positions of 0 will not change the previous interrupt status. This mask is formed by OR'ing XCANPS_IXR_* bits defined in xcanps_hw.h.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ICR_OFFSET, XCanPs_IntrGetStatus(), and XCanPs_WriteReg.

Referenced by XCanPs_IntrHandler(), and XCanPs_Recv().

void XCanPs_IntrDisable	(	XCanPs *	InstancePtr,
		u32	Mask
	)

This routine disables interrupt(s).

Use the XCANPS_IXR_* constants defined in xcanps_hw.h to create the bit-mask to disable interrupt(s).

Parameters

InstancePtr	is a pointer to the XCanPs instance.
Mask	is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANPS_IXR_* bits defined in xcanps_hw.h.

Returns: None.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_IER_OFFSET, XCanPs_IntrGetEnabled(), and XCanPs_WriteReg.

Referenced by CanPsWatermarkIntrExample().

void XCanPs_IntrEnable	(	XCanPs *	InstancePtr,
		u32	Mask
	)

This routine enables interrupt(s).

Use the XCANPS_IXR_* constants defined in xcanps_hw.h to create the bit-mask to enable interrupts.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
Mask	is the mask to enable. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANPS_IXR_* bits defined in xcanps_hw.h.

Returns: None.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_IER_OFFSET, XCanPs_IntrGetEnabled(), and XCanPs_WriteReg.

Referenced by CanPsIntrExample(), and CanPsWatermarkIntrExample().

u32 XCanPs_IntrGetEnabled ( XCanPs * InstancePtr )

This routine returns enabled interrupt(s).

Use the XCANPS_IXR_* constants defined in xcanps_hw.h to interpret the returned value.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: Enabled interrupt(s) in a 32-bit format.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_IER_OFFSET, and XCanPs_ReadReg.

Referenced by XCanPs_IntrDisable(), XCanPs_IntrEnable(), and XCanPs_IntrHandler().

u32 XCanPs_IntrGetStatus ( XCanPs * InstancePtr )

This routine returns interrupt status read from Interrupt Status Register.

Use the XCANPS_IXR_* constants defined in xcanps_hw.h to interpret the returned value.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: The value stored in Interrupt Status Register.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_ISR_OFFSET, and XCanPs_ReadReg.

Referenced by XCanPs_IntrClear(), and XCanPs_IntrHandler().

void XCanPs_IntrHandler ( void * InstancePtr )

This routine is the interrupt handler for the CAN driver.

This handler reads the interrupt status from the ISR, determines the source of the interrupts, calls according callbacks, and finally clears the interrupts.

Application beyond this driver is responsible for providing callbacks to handle interrupts and installing the callbacks using XCanPs_SetHandler() during initialization phase. An example delivered with this driver demonstrates how this could be done.

Parameters

InstancePtr is a pointer to the XCanPs instance that just interrupted.

Returns: None.

Note: None.

References XCanPs::ErrorHandler, XCanPs::ErrorRef, XCanPs::EventHandler, XCanPs::EventRef, XCanPs::IsReady, XCanPs::RecvHandler, XCanPs::RecvRef, XCanPs::SendHandler, XCanPs::SendRef, XCanPs_ClearBusErrorStatus(), XCanPs_GetBusErrorStatus(), XCanPs_IntrClear(), XCanPs_IntrGetEnabled(), XCanPs_IntrGetStatus(), XCANPS_IXR_ARBLST_MASK, XCANPS_IXR_BSOFF_MASK, XCANPS_IXR_ERROR_MASK, XCANPS_IXR_RXFWMFLL_MASK, XCANPS_IXR_RXNEMP_MASK, XCANPS_IXR_RXOFLW_MASK, XCANPS_IXR_RXUFLW_MASK, XCANPS_IXR_SLP_MASK, XCANPS_IXR_TXBFLL_MASK, XCANPS_IXR_TXFLL_MASK, XCANPS_IXR_TXFWMEMP_MASK, XCANPS_IXR_TXOK_MASK, and XCANPS_IXR_WKUP_MASK.

Referenced by CanPsIntrExample(), and CanPsWatermarkIntrExample().

XCanPs_Config * XCanPs_LookupConfig ( u16 DeviceId )

This function looks for the device configuration based on the unique device ID.

The table XCanPs_ConfigTable[] contains the configuration information for each device in the system.

Parameters

DeviceId is the unique device ID of the device being looked up.

Returns: A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.

Note: None.

References XCanPs_ConfigTable.

Referenced by CanPsIntrExample(), CanPsPolledExample(), and CanPsWatermarkIntrExample().

s32 XCanPs_Recv	(	XCanPs *	InstancePtr,
		u32 *	FramePtr
	)

This function receives a CAN Frame.

This function first checks if RX FIFO is empty, if not, it then reads a frame from the RX FIFO into the given buffer. This function returns error code immediately if there is no frame in the RX FIFO.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
FramePtr	is a pointer to a 32-bit aligned buffer where the CAN frame to be written.

Returns

XST_SUCCESS if RX FIFO was not empty and a frame was read from RX FIFO successfully and written into the given buffer.
XST_NO_DATA if there is no frame to be received from the FIFO.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_IntrClear(), XCanPs_IsRxEmpty, XCANPS_IXR_RXNEMP_MASK, XCanPs_ReadReg, XCANPS_RXFIFO_DLC_OFFSET, XCANPS_RXFIFO_DW1_OFFSET, XCANPS_RXFIFO_DW2_OFFSET, and XCANPS_RXFIFO_ID_OFFSET.

Referenced by XCanPs_SelfTest().

void XCanPs_Reset ( XCanPs * InstancePtr )

This function resets the CAN device.

Calling this function resets the device immediately, and any pending transmission or reception is terminated at once. Both Object Layer and Transfer Layer are reset. This function does not reset the Physical Layer. All registers are reset to the default values, and no previous status will be restored. TX FIFO, RX FIFO and TX High Priority Buffer are also reset.

When a reset is required due to an internal error, the driver notifies the upper layer software of this need through the error status code or interrupts. The upper layer software is responsible for calling this Reset function and then re-configuring the device.

The CAN device will be in Configuration Mode immediately after this function returns.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns: None.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_SRR_OFFSET, XCANPS_SRR_SRST_MASK, and XCanPs_WriteReg.

Referenced by XCanPs_CfgInitialize(), and XCanPs_SelfTest().

void XCanPs_ResetHw ( UINTPTR BaseAddr )

This function resets the CAN device.

Calling this function resets the device immediately, and any pending transmission or reception is terminated at once. Both Object Layer and Transfer Layer are reset. This function does not reset the Physical Layer. All registers are reset to the default values, and no previous status will be restored. TX FIFO, RX FIFO and TX High Priority Buffer are also reset.

The CAN device will be in Configuration Mode immediately after this function returns.

Parameters

BaseAddr is the baseaddress of the interface.

Returns: None.

Note: None.

References XCANPS_SRR_OFFSET, XCANPS_SRR_SRST_MASK, and XCanPs_WriteReg.

s32 XCanPs_SelfTest ( XCanPs * InstancePtr )

This function runs a self-test on the CAN driver/device.

The test resets the device, sets up the Loop Back mode, sends a standard frame, receives the frame, verifies the contents, and resets the device again.

Note that this is a destructive test in that resets of the device are performed. Refer the device specification for the device status after the reset operation.

Parameters

InstancePtr is a pointer to the XCanPs instance.

Returns

XST_SUCCESS if the self-test passed. i.e., the frame received via the internal loop back has the same contents as the frame sent.
- XST_FAILURE Otherwise.

Note

If the CAN device does not work properly, this function may enter an infinite loop and will never return to the caller.

If XST_FAILURE is returned, the device is not reset so that the caller could have a chance to check reason(s) causing the failure.

References XCanPs::IsReady, XCanPs_CreateDlcValue, XCanPs_CreateIdValue, XCANPS_DLCR_TIMESTAMP_MASK, XCanPs_EnterMode(), XCanPs_GetMode(), XCANPS_ISR_OFFSET, XCANPS_IXR_RXNEMP_MASK, XCANPS_MAX_FRAME_SIZE_IN_WORDS, XCANPS_MODE_CONFIG, XCANPS_MODE_LOOPBACK, XCanPs_ReadReg, XCanPs_Recv(), XCanPs_Reset(), XCanPs_Send(), XCanPs_SetBaudRatePrescaler(), and XCanPs_SetBitTiming().

Referenced by CanPsIntrExample(), CanPsPolledExample(), and CanPsWatermarkIntrExample().

s32 XCanPs_Send	(	XCanPs *	InstancePtr,
		u32 *	FramePtr
	)

This function sends a CAN Frame.

If the TX FIFO is not full then the given frame is written into the the TX FIFO otherwise, it returns an error code immediately. This function does not wait for the given frame being sent to CAN bus.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
FramePtr	is a pointer to a 32-bit aligned buffer containing the CAN frame to be sent.

Returns

XST_SUCCESS if TX FIFO was not full and the given frame was written into the FIFO.
XST_FIFO_NO_ROOM if there is no room in the TX FIFO for the given frame.
XST_DEVICE_BUSY if a transfer is already in progress.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsBusy, XCanPs::IsReady, XCanPs_IsTxFifoFull, XCANPS_TXFIFO_DLC_OFFSET, XCANPS_TXFIFO_DW1_OFFSET, XCANPS_TXFIFO_DW2_OFFSET, XCANPS_TXFIFO_ID_OFFSET, and XCanPs_WriteReg.

Referenced by XCanPs_SelfTest().

s32 XCanPs_SendHighPriority	(	XCanPs *	InstancePtr,
		u32 *	FramePtr
	)

This routine sends a CAN High Priority frame.

This function first checks if TX High Priority Buffer is empty. If yes, it then writes the given frame into the Buffer. If not, this function returns immediately. This function does not wait for the given frame being sent to CAN bus.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
FramePtr	is a pointer to a 32-bit aligned buffer containing the CAN High Priority frame to be sent.

Returns

XST_SUCCESS if TX High Priority Buffer was not full and the given frame was written into the buffer.
XST_FIFO_NO_ROOM if there is no room in the TX High Priority Buffer for this frame.
XST_DEVICE_BUSY if a transfer is already in progress.

Note

If the frame needs to be sent immediately and not delayed by processor's interrupt handling, the caller should disable interrupt at processor level before invoking this function.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsBusy, XCanPs::IsReady, XCanPs_IsHighPriorityBufFull, XCANPS_TXHPB_DLC_OFFSET, XCANPS_TXHPB_DW1_OFFSET, XCANPS_TXHPB_DW2_OFFSET, XCANPS_TXHPB_ID_OFFSET, and XCanPs_WriteReg.

s32 XCanPs_SetBaudRatePrescaler	(	XCanPs *	InstancePtr,
		u8	Prescaler
	)

This routine sets Baud Rate Prescaler value.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Baud Rate Prescaler can be set only if the CAN device is in Configuration Mode. Call XCanPs_EnterMode() to enter Configuration Mode before using this function.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
Prescaler	is the value to set. Valid values are from 0 to 255.

Returns

XST_SUCCESS if the Baud Rate Prescaler value is set successfully.
XST_FAILURE if CAN device is not in Configuration Mode.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_BRPR_OFFSET, XCanPs_GetMode(), XCANPS_MODE_CONFIG, and XCanPs_WriteReg.

Referenced by CanPsPolledExample(), and XCanPs_SelfTest().

s32 XCanPs_SetBitTiming	(	XCanPs *	InstancePtr,
		u8	SyncJumpWidth,
		u8	TimeSegment2,
		u8	TimeSegment1
	)

This routine sets Bit time.

Time segment 1, Time segment 2 and Synchronization Jump Width are set in this function. Device specification requires the values passed into this function be one less than the actual values of these fields. Read the device specification for details.

Bit time can be set only if the CAN device is in Configuration Mode. Call XCanPs_EnterMode() to enter Configuration Mode before using this function.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
SyncJumpWidth	is the Synchronization Jump Width value to set. Valid values are from 0 to 3.
TimeSegment2	is the Time Segment 2 value to set. Valid values are from 0 to 7.
TimeSegment1	is the Time Segment 1 value to set. Valid values are from 0 to 15.

Returns

XST_SUCCESS if the Bit time is set successfully.
XST_FAILURE if CAN device is not in Configuration Mode.

Note: None.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCANPS_BTR_OFFSET, XCANPS_BTR_SJW_MASK, XCANPS_BTR_SJW_SHIFT, XCANPS_BTR_TS1_MASK, XCANPS_BTR_TS2_MASK, XCANPS_BTR_TS2_SHIFT, XCanPs_GetMode(), XCANPS_MODE_CONFIG, and XCanPs_WriteReg.

Referenced by CanPsPolledExample(), and XCanPs_SelfTest().

s32 XCanPs_SetHandler	(	XCanPs *	InstancePtr,
		u32	HandlerType,
		void *	CallBackFunc,
		void *	CallBackRef
	)

This routine installs an asynchronous callback function for the given HandlerType:

HandlerType                     Callback Function Type
----------------------- ------------------------
XCANPS_HANDLER_SEND             XCanPs_SendRecvHandler
XCANPS_HANDLER_RECV             XCanPs_SendRecvHandler
XCANPS_HANDLER_ERROR            XCanPs_ErrorHandler
XCANPS_HANDLER_EVENT            XCanPs_EventHandler

HandlerType                     Invoked by this driver when:
-------------------------------------------------------------------------
XCANPS_HANDLER_SEND             A frame transmitted by a call to
                        XCanPs_Send() has been sent successfully.

XCANPS_HANDLER_RECV             A frame(s) has been received and is sitting in
                        the RX FIFO.

XCANPS_HANDLER_ERROR            An error interrupt is occurring.

XCANPS_HANDLER_EVENT            Any other kind of interrupt is occurring.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
HandlerType	specifies which handler is to be attached.
CallBackFunc	is the address of the callback function.
CallBackRef	is a user data item that will be passed to the callback function when it is invoked.

Returns

XST_SUCCESS when handler is installed.
XST_INVALID_PARAM when HandlerType is invalid.

Note: Invoking this function for a handler that already has been installed replaces it with the new handler.

References XCanPs::ErrorHandler, XCanPs::ErrorRef, XCanPs::EventHandler, XCanPs::EventRef, XCanPs::IsReady, XCanPs::RecvHandler, XCanPs::RecvRef, XCanPs::SendHandler, XCanPs::SendRef, XCANPS_HANDLER_ERROR, XCANPS_HANDLER_EVENT, XCANPS_HANDLER_RECV, and XCANPS_HANDLER_SEND.

Referenced by CanPsIntrExample(), and CanPsWatermarkIntrExample().

s32 XCanPs_SetRxIntrWatermark	(	XCanPs *	InstancePtr,
		u8	Threshold
	)

This routine sets the Rx Full threshold in the Watermark Interrupt Register.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
Threshold	is the threshold to be set. The valid values are from 1 to 63.

Returns

XST_FAILURE - If the CAN device is not in Configuration Mode.
XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.

Note: The threshold can only be set when the CAN device is in the configuration mode.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_GetMode(), XCANPS_MODE_CONFIG, XCanPs_ReadReg, XCANPS_WIR_EW_MASK, XCANPS_WIR_FW_MASK, XCANPS_WIR_OFFSET, and XCanPs_WriteReg.

s32 XCanPs_SetTxIntrWatermark	(	XCanPs *	InstancePtr,
		u8	Threshold
	)

This routine sets the Tx Empty Threshold in the Watermark Interrupt Register.

Parameters

InstancePtr	is a pointer to the XCanPs instance.
Threshold	is the threshold to be set. The valid values are from 1 to 63.

Returns

XST_FAILURE - If the CAN device is not in Configuration Mode.
XST_SUCCESS - If the threshold is set in Watermark Interrupt Register.

Note: The threshold can only be set when the CAN device is in the configuration mode.

References XCanPs_Config::BaseAddr, XCanPs::CanConfig, XCanPs::IsReady, XCanPs_GetMode(), XCANPS_MODE_CONFIG, XCanPs_ReadReg, XCANPS_WIR_EW_MASK, XCANPS_WIR_EW_SHIFT, XCANPS_WIR_FW_MASK, XCANPS_WIR_OFFSET, and XCanPs_WriteReg.

Variable Documentation

XCanPs_Config XCanPs_ConfigTable[XPAR_XCANPS_NUM_INSTANCES]

Initial value:

= {
        {
                (u16)XPAR_XCANPS_0_DEVICE_ID,   
                (u32)XPAR_XCANPS_0_BASEADDR             
        },
}

This table contains configuration information for each CAN device in the system.

Referenced by XCanPs_LookupConfig().

XCanPs_Config XCanPs_ConfigTable[]

This table contains configuration information for each CAN device in the system.

Referenced by XCanPs_LookupConfig().

Data Structures

Macros

Typedefs

Functions

Variables

CAN operation modes

Callback identifiers used as parameters to XCanPs_SetHandler()

Register offsets for the CAN. Each register is 32 bits.

Software Reset Register (SRR) Bit Definitions and Masks

Mode Select Register (MSR) Bit Definitions and Masks

Baud Rate Prescaler register (BRPR) Bit Definitions and Masks

Bit Timing Register (BTR) Bit Definitions and Masks

Error Counter Register (ECR) Bit Definitions and Masks

Error Status Register (ESR) Bit Definitions and Masks

Status Register (SR) Bit Definitions and Masks

Interrupt Status/Enable/Clear Register Bit Definitions and Masks

CAN Timestamp Control Register (TCR) Bit Definitions and Masks

CAN Watermark Register (WIR) Bit Definitions and Masks

CAN Frame Identifier (TX High Priority Buffer/TX/RX/Acceptance Filter

CAN Frame Data Length Code (TX High Priority Buffer/TX/RX)

CAN Frame Data Word 1 (TX High Priority Buffer/TX/RX)

CAN Frame Data Word 2 (TX High Priority Buffer/TX/RX)

Acceptance Filter Register (AFR) Bit Definitions and Masks

CAN frame length constants

Macro Definition Documentation

Typedef Documentation

Function Documentation

Variable Documentation