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rfdc
Xilinx Vitis Drivers API Documentation
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![]() ![]() | RFdc Structure |
![]() ![]() | ADC Tile Structure |
![]() ![]() | ADC Block Analog DataPath Structure |
![]() ![]() | ADC block Analog DataPath Config settings |
![]() ![]() | ADC Block Digital DataPath Structure |
![]() ![]() | DAC block Digital DataPath Config settings |
![]() ![]() | ADC Tile Config Structure |
![]() ![]() | Status of DAC or ADC blocks in the RFSoC Data converter |
![]() ![]() | RFSoC Calibration freeze settings struct |
![]() ![]() | RFSoC Calibration coefficients generic struct |
![]() ![]() | Coarse delay settings |
![]() ![]() | RFdc Config Structure |
![]() ![]() | DAC Tile Structure |
![]() ![]() | DAC Block Analog DataPath Structure |
![]() ![]() | DAC block Analog DataPath Config settings |
![]() ![]() | DAC Block Digital DataPath Structure |
![]() ![]() | DAC block Digital DataPath Config settings |
![]() ![]() | DAC Tile Config structure |
![]() ![]() | Clk Distribution Settings |
![]() ![]() | RFSoC DSA settings |
![]() ![]() | RFSoC Data converter IP status |
![]() ![]() | Mixer settings |
![]() ![]() | MTS DTC Settings |
![]() ![]() | MTS Marker Struct |
![]() ![]() | MTS Sync Settings |
![]() ![]() | PLL settings |
![]() ![]() | RFSoC Power Mode settings |
![]() ![]() | QMC settings |
![]() ![]() | ADC Signal Detect Settings |
![]() ![]() | ADC block Threshold settings |
![]() ![]() | ClkIntraTile Settings |
![]() ![]() | RFSoC Tile status |