Data Structures
struct	XSpiPs_Config
	This typedef contains configuration information for the device. More...

struct	XSpiPs
	The XSpiPs driver instance data. More...

Macros
#define	XSpiPs_SetSlaveIdle(InstancePtr, RegisterValue)
	Set the contents of the slave idle count register. More...

#define	XSpiPs_GetSlaveIdle(InstancePtr)
	Get the contents of the slave idle count register. More...

#define	XSpiPs_SetTXWatermark(InstancePtr, RegisterValue)
	Set the contents of the transmit FIFO watermark register. More...

#define	XSpiPs_GetTXWatermark(InstancePtr) XSpiPs_In32(((InstancePtr)->Config.BaseAddress) + XSPIPS_TXWR_OFFSET)
	Get the contents of the transmit FIFO watermark register. More...

#define	XSpiPs_SetRXWatermark(InstancePtr, RegisterValue)
	Set the contents of the receive FIFO watermark register. More...

#define	XSpiPs_GetRXWatermark(InstancePtr) XSpiPs_In32(((InstancePtr)->Config.BaseAddress) + XSPIPS_RXWR_OFFSET)
	Get the contents of the receive FIFO watermark register. More...

#define	XSpiPs_Enable(InstancePtr)
	Enable the device and uninhibit master transactions. More...

#define	XSpiPs_Disable(InstancePtr) XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + XSPIPS_ER_OFFSET, 0U)
	Disable the device. More...

#define	XSpiPs_ReadReg(BaseAddress, RegOffset) XSpiPs_In32((BaseAddress) + (RegOffset))
	Read a register. More...

#define	XSpiPs_WriteReg(BaseAddress, RegOffset, RegisterValue) XSpiPs_Out32((BaseAddress) + (RegOffset), (RegisterValue))
	Write to a register. More...

Typedefs
typedef void(*	XSpiPs_StatusHandler )(const void *CallBackRef, u32 StatusEvent, u32 ByteCount)
	The handler data type allows the user to define a callback function to handle the asynchronous processing for the SPI device. More...

Functions
s32	XSpiPs_CfgInitialize (XSpiPs InstancePtr, const XSpiPs_Config ConfigPtr, u32 EffectiveAddr)
	Initializes a specific XSpiPs instance such that the driver is ready to use. More...

void	XSpiPs_Reset (XSpiPs *InstancePtr)
	Resets the SPI device. More...

s32	XSpiPs_Transfer (XSpiPs InstancePtr, u8 SendBufPtr, u8 *RecvBufPtr, u32 ByteCount)
	Transfers specified data on the SPI bus. More...

s32	XSpiPs_PolledTransfer (XSpiPs InstancePtr, u8 SendBufPtr, u8 *RecvBufPtr, u32 ByteCount)
	Transfers specified data on the SPI bus in polled mode. More...

s32	XSpiPs_SetSlaveSelect (XSpiPs *InstancePtr, u8 SlaveSel)
	Selects or deselect the slave with which the master communicates. More...

u8	XSpiPs_GetSlaveSelect (const XSpiPs *InstancePtr)
	Gets the current slave select setting for the SPI device. More...

void	XSpiPs_SetStatusHandler (XSpiPs InstancePtr, void CallBackRef, XSpiPs_StatusHandler FunctionPtr)
	Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software. More...

void	XSpiPs_InterruptHandler (XSpiPs *InstancePtr)
	The interrupt handler for SPI interrupts. More...

void	XSpiPs_Abort (XSpiPs *InstancePtr)
	Aborts a transfer in progress by disabling the device and resetting the FIFOs if present. More...

XSpiPs_Config *	XSpiPs_LookupConfig (u16 DeviceId)
	Looks up the device configuration based on the unique device ID. More...

s32	XSpiPs_SelfTest (XSpiPs *InstancePtr)
	Runs a self-test on the driver/device. More...

s32	XSpiPs_SetOptions (const XSpiPs *InstancePtr, u32 Options)
	This function sets the options for the SPI device driver. More...

u32	XSpiPs_GetOptions (const XSpiPs *InstancePtr)
	This function gets the options for the SPI device. More...

s32	XSpiPs_SetClkPrescaler (const XSpiPs *InstancePtr, u8 Prescaler)
	This function sets the clock prescaler for an SPI device. More...

u8	XSpiPs_GetClkPrescaler (const XSpiPs *InstancePtr)
	This function gets the clock prescaler of an SPI device. More...

s32	XSpiPs_SetDelays (const XSpiPs *InstancePtr, u8 DelayNss, u8 DelayBtwn, u8 DelayAfter, u8 DelayInit)
	This function sets the delay register for the SPI device driver. More...

void	XSpiPs_GetDelays (const XSpiPs InstancePtr, u8 DelayNss, u8 DelayBtwn, u8 DelayAfter, u8 *DelayInit)
	This function gets the delay settings for an SPI device. More...

void	XSpiPs_ResetHw (u32 BaseAddress)
	Resets the spi module. More...

Variables
XSpiPs_Config	XSpiPs_ConfigTable [XPAR_XSPIPS_NUM_INSTANCES]
	This table contains configuration information for each SPI device in the system. More...

XSpiPs_Config	XSpiPs_ConfigTable [XPAR_XSPIPS_NUM_INSTANCES]
	This table contains configuration information for each SPI device in the system. More...

Configuration options
The following options are supported to enable/disable certain features of an SPI device. Each of the options is a bit mask, so more than one may be specified. The Master option configures the SPI device as a master. By default, the device is a slave. The Active Low Clock option configures the device's clock polarity. Setting this option means the clock is active low and the SCK signal idles high. By default, the clock is active high and SCK idles low. The Clock Phase option configures the SPI device for one of two transfer formats. A clock phase of 0, the default, means data is valid on the first SCK edge (rising or falling) after the slave select (SS) signal has been asserted. A clock phase of 1 means data is valid on the second SCK edge (rising or falling) after SS has been asserted. The Slave Select Decode Enable option selects how the SPI_SS_outN are controlled by the SPI Slave Select Decode bits. 0: Use this setting for the standard configuration of up to three slave select outputs. Only one of the three slave select outputs will be low. (Default) 1: Use this setting for the optional configuration of an additional decoder to support 8 slave select outputs. SPI_SS_outN reflects the value in the register. The SPI Force Slave Select option is used to enable manual control of the signals SPI_SS_outN. 0: The SPI_SS_outN signals are controlled by the SPI controller during transfers. (Default) 1: The SPI_SS_outN signal indicated by the Slave Select Control bit is forced active (driven low) regardless of any transfers in progress. NOTE: The driver will handle setting and clearing the Slave Select when the user sets the "FORCE_SSELECT_OPTION". Using this option will allow the SPI clock to be set to a faster speed. If the SPI clock is too fast, the processor cannot empty and refill the FIFOs before the TX FIFO is empty When the SPI hardware is controlling the Slave Select signals, this will cause slave to be de-selected and terminate the transfer. The Manual Start option is used to enable manual control of the Start command to perform data transfer. 0: The Start command is controlled by the SPI controller during transfers(Default). Data transmission starts as soon as there is data in the TXFIFO and stalls when the TXFIFO is empty 1: The Start command must be issued by software to perform data transfer. Bit 15 of Configuration register is used to issue Start command. This bit must be set whenever TXFIFO is filled with new data. NOTE: The driver will set the Manual Start Enable bit in Configuration Register, if Manual Start option is selected. Software will issue Manual Start command whenever TXFIFO is filled with data. When there is no further data, driver will clear the Manual Start Enable bit.
#define	XSPIPS_MASTER_OPTION 0x00000001U
	Master mode option. More...

#define	XSPIPS_CLK_ACTIVE_LOW_OPTION 0x00000002U
	Active Low Clock option. More...

#define	XSPIPS_CLK_PHASE_1_OPTION 0x00000004U
	Clock Phase one option. More...

#define	XSPIPS_DECODE_SSELECT_OPTION 0x00000008U
	Select 16 slaves Option. More...

#define	XSPIPS_FORCE_SSELECT_OPTION 0x00000010U
	Force Slave Select. More...

#define	XSPIPS_MANUAL_START_OPTION 0x00000020U
	Manual Start mode option. More...

SPI Clock Prescaler options
The SPI Clock Prescaler Configuration bits are used to program master mode bit rate. The bit rate can be programmed in divide-by-two decrements from pclk/4 to pclk/256.
#define	XSPIPS_CLK_PRESCALE_4 0x01U
	PCLK/4 Prescaler. More...

#define	XSPIPS_CLK_PRESCALE_8 0x02U
	PCLK/8 Prescaler. More...

#define	XSPIPS_CLK_PRESCALE_16 0x03U
	PCLK/16 Prescaler. More...

#define	XSPIPS_CLK_PRESCALE_32 0x04U
	PCLK/32 Prescaler. More...

#define	XSPIPS_CLK_PRESCALE_64 0x05U
	PCLK/64 Prescaler. More...

#define	XSPIPS_CLK_PRESCALE_128 0x06U
	PCLK/128 Prescaler. More...

#define	XSPIPS_CLK_PRESCALE_256 0x07U
	PCLK/256 Prescaler. More...

Callback events
These constants specify the handler events that are passed to a handler from the driver. These constants are not bit masks such that only one will be passed at a time to the handler.
#define	XSPIPS_EVENT_MODE_FAULT 1U
	Mode fault error. More...

#define	XSPIPS_EVENT_TRANSFER_DONE 2U
	Transfer done. More...

#define	XSPIPS_EVENT_TRANSMIT_UNDERRUN 3U
	TX FIFO empty. More...

#define	XSPIPS_EVENT_RECEIVE_OVERRUN 4U
	Receive data loss because RX FIFO full. More...

Register Map
Register offsets from the base address of an SPI device.
#define	XSPIPS_CR_OFFSET 0x00U
	Configuration. More...

#define	XSPIPS_SR_OFFSET 0x04U
	Interrupt Status. More...

#define	XSPIPS_IER_OFFSET 0x08U
	Interrupt Enable. More...

#define	XSPIPS_IDR_OFFSET 0x0CU
	Interrupt Disable. More...

#define	XSPIPS_IMR_OFFSET 0x10U
	Interrupt Enabled Mask. More...

#define	XSPIPS_ER_OFFSET 0x14U
	Enable/Disable Register. More...

#define	XSPIPS_DR_OFFSET 0x18U
	Delay Register. More...

#define	XSPIPS_TXD_OFFSET 0x1CU
	Data Transmit Register. More...

#define	XSPIPS_RXD_OFFSET 0x20U
	Data Receive Register. More...

#define	XSPIPS_SICR_OFFSET 0x24U
	Slave Idle Count. More...

#define	XSPIPS_TXWR_OFFSET 0x28U
	Transmit FIFO Watermark. More...

#define	XSPIPS_RXWR_OFFSET 0x2CU
	Receive FIFO Watermark. More...

Configuration Register
This register contains various control bits that affects the operation of an SPI device. Read/Write.
#define	XSPIPS_CR_MODF_GEN_EN_MASK 0x00020000U
	Modefail Generation Enable. More...

#define	XSPIPS_CR_MANSTRT_MASK 0x00010000U
	Manual Transmission Start. More...

#define	XSPIPS_CR_MANSTRTEN_MASK 0x00008000U
	Manual Transmission Start Enable. More...

#define	XSPIPS_CR_SSFORCE_MASK 0x00004000U
	Force Slave Select. More...

#define	XSPIPS_CR_SSCTRL_MASK 0x00003C00U
	Slave Select Decode. More...

#define	XSPIPS_CR_SSCTRL_SHIFT 10U
	Slave Select Decode shift. More...

#define	XSPIPS_CR_SSCTRL_MAXIMUM 0xFU
	Slave Select maximum value. More...

#define	XSPIPS_CR_SSDECEN_MASK 0x00000200U
	Slave Select Decode Enable. More...

#define	XSPIPS_CR_PRESC_MASK 0x00000038U
	Prescaler Setting. More...

#define	XSPIPS_CR_PRESC_SHIFT 3U
	Prescaler shift. More...

#define	XSPIPS_CR_PRESC_MAXIMUM 0x07U
	Prescaler maximum value. More...

#define	XSPIPS_CR_CPHA_MASK 0x00000004U
	Phase Configuration. More...

#define	XSPIPS_CR_CPOL_MASK 0x00000002U
	Polarity Configuration. More...

#define	XSPIPS_CR_MSTREN_MASK 0x00000001U
	Master Mode Enable. More...

#define	XSPIPS_CR_RESET_STATE 0x00020000U
	Mode Fail Generation Enable. More...

SPI Interrupt Registers
SPI Status Register This register holds the interrupt status flags for an SPI device. Some of the flags are level triggered, which means that they are set as long as the interrupt condition exists. Other flags are edge triggered, which means they are set once the interrupt condition occurs and remain set until they are cleared by software. The interrupts are cleared by writing a '1' to the interrupt bit position in the Status Register. Read/Write. SPI Interrupt Enable Register This register is used to enable chosen interrupts for an SPI device. Writing a '1' to a bit in this register sets the corresponding bit in the SPI Interrupt Mask register. Write only. SPI Interrupt Disable Register This register is used to disable chosen interrupts for an SPI device. Writing a '1' to a bit in this register clears the corresponding bit in the SPI Interrupt Mask register. Write only. SPI Interrupt Mask Register This register shows the enabled/disabled interrupts of an SPI device. Read only. All four registers have the same bit definitions. They are only defined once for each of the Interrupt Enable Register, Interrupt Disable Register, Interrupt Mask Register, and Channel Interrupt Status Register
#define	XSPIPS_IXR_TXUF_MASK 0x00000040U
	Tx FIFO Underflow. More...

#define	XSPIPS_IXR_RXFULL_MASK 0x00000020U
	Rx FIFO Full. More...

#define	XSPIPS_IXR_RXNEMPTY_MASK 0x00000010U
	Rx FIFO Not Empty. More...

#define	XSPIPS_IXR_TXFULL_MASK 0x00000008U
	Tx FIFO Full. More...

#define	XSPIPS_IXR_TXOW_MASK 0x00000004U
	Tx FIFO Overwater. More...

#define	XSPIPS_IXR_MODF_MASK 0x00000002U
	Mode Fault. More...

#define	XSPIPS_IXR_RXOVR_MASK 0x00000001U
	Rx FIFO Overrun. More...

#define	XSPIPS_IXR_DFLT_MASK 0x00000027U
	Default interrupts mask. More...

#define	XSPIPS_IXR_WR_TO_CLR_MASK 0x00000043U
	Interrupts which need write to clear. More...

#define	XSPIPS_ISR_RESET_STATE 0x04U
	Default to tx/rx reg empty. More...

#define	XSPIPS_IXR_DISABLE_ALL_MASK 0x00000043U
	Disable all interrupts. More...

Enable Register
This register is used to enable or disable an SPI device. Read/Write
#define	XSPIPS_ER_ENABLE_MASK 0x00000001U
	SPI Enable Bit Mask. More...

Delay Register
This register is used to program timing delays in slave mode. Read/Write
#define	XSPIPS_DR_NSS_MASK 0xFF000000U
	Delay for slave select de-assertion between word transfers mask. More...

#define	XSPIPS_DR_NSS_SHIFT 24U
	Delay for slave select de-assertion between word transfers shift. More...

#define	XSPIPS_DR_BTWN_MASK 0x00FF0000U
	Delay Between Transfers mask. More...

#define	XSPIPS_DR_BTWN_SHIFT 16U
	Delay Between Transfers shift. More...

#define	XSPIPS_DR_AFTER_MASK 0x0000FF00U
	Delay After Transfers mask. More...

#define	XSPIPS_DR_AFTER_SHIFT 8U
	Delay After Transfers shift. More...

#define	XSPIPS_DR_INIT_MASK 0x000000FFU
	Delay Initially mask. More...

Slave Idle Count Registers
This register defines the number of pclk cycles the slave waits for a the SPI clock to become stable in quiescent state before it can detect the start of the next transfer in CPHA = 1 mode. Read/Write
#define	XSPIPS_SICR_MASK 0x000000FFU
	Slave Idle Count Mask. More...

Transmit FIFO Watermark Register
This register defines the watermark setting for the Transmit FIFO. The transmit FIFO is 128 bytes deep, so the register is 7 bits. Valid values are 1 to 128.
#define	XSPIPS_TXWR_MASK 0x0000007FU
	Transmit Watermark Mask. More...

#define	XSPIPS_TXWR_RESET_VALUE 0x00000001U
	Transmit Watermark register reset value. More...

Receive FIFO Watermark Register
This register defines the watermark setting for the Receive FIFO. The receive FIFO is 128 bytes deep, so the register is 7 bits. Valid values are 1 to 128.
#define	XSPIPS_RXWR_MASK 0x0000007FU
	Receive Watermark Mask. More...

#define	XSPIPS_RXWR_RESET_VALUE 0x00000001U
	Receive Watermark register reset value. More...

FIFO Depth
This macro provides the depth of transmit FIFO and receive FIFO.
#define	XSPIPS_FIFO_DEPTH 128U
	FIFO depth of Tx and Rx. More...

Macro Definition Documentation

#define XSPIPS_CLK_ACTIVE_LOW_OPTION 0x00000002U

Active Low Clock option.

#define XSPIPS_CLK_PHASE_1_OPTION 0x00000004U

Clock Phase one option.

#define XSPIPS_CLK_PRESCALE_128 0x06U

PCLK/128 Prescaler.

#define XSPIPS_CLK_PRESCALE_16 0x03U

PCLK/16 Prescaler.

Referenced by SpiPsTpmPolledExample().

#define XSPIPS_CLK_PRESCALE_256 0x07U

PCLK/256 Prescaler.

#define XSPIPS_CLK_PRESCALE_32 0x04U

PCLK/32 Prescaler.

#define XSPIPS_CLK_PRESCALE_4 0x01U

PCLK/4 Prescaler.

#define XSPIPS_CLK_PRESCALE_64 0x05U

PCLK/64 Prescaler.

Referenced by SpiPsEepromIntrExample(), and SpiPsEepromPolledExample().

#define XSPIPS_CLK_PRESCALE_8 0x02U

PCLK/8 Prescaler.

Referenced by SpiPsFlashIntrExample(), and SpiPsFlashPolledExample().

#define XSPIPS_CR_CPHA_MASK 0x00000004U

Phase Configuration.

Referenced by SpiPsSlavePolledExample(), and XSpiPs_SetOptions().

#define XSPIPS_CR_CPOL_MASK 0x00000002U

Polarity Configuration.

Referenced by SpiPsSlavePolledExample(), and XSpiPs_SetOptions().

#define XSPIPS_CR_MANSTRT_MASK 0x00010000U

Manual Transmission Start.

Referenced by XSpiPs_InterruptHandler(), XSpiPs_PolledTransfer(), and XSpiPs_Transfer().

#define XSPIPS_CR_MANSTRTEN_MASK 0x00008000U

Manual Transmission Start Enable.

#define XSPIPS_CR_MODF_GEN_EN_MASK 0x00020000U

Modefail Generation Enable.

#define XSPIPS_CR_MSTREN_MASK 0x00000001U

Master Mode Enable.

#define XSPIPS_CR_OFFSET 0x00U

Configuration.

Referenced by XSpiPs_GetClkPrescaler(), XSpiPs_GetOptions(), XSpiPs_InterruptHandler(), XSpiPs_PolledTransfer(), XSpiPs_Reset(), XSpiPs_ResetHw(), XSpiPs_SelfTest(), XSpiPs_SetClkPrescaler(), XSpiPs_SetOptions(), XSpiPs_SetSlaveSelect(), and XSpiPs_Transfer().

#define XSPIPS_CR_PRESC_MASK 0x00000038U

Prescaler Setting.

Referenced by XSpiPs_GetClkPrescaler(), and XSpiPs_SetClkPrescaler().

#define XSPIPS_CR_PRESC_MAXIMUM 0x07U

Prescaler maximum value.

Referenced by XSpiPs_SetClkPrescaler().

#define XSPIPS_CR_PRESC_SHIFT 3U

Prescaler shift.

Referenced by XSpiPs_GetClkPrescaler(), and XSpiPs_SetClkPrescaler().

#define XSPIPS_CR_RESET_STATE 0x00020000U

Mode Fail Generation Enable.

Referenced by XSpiPs_Reset(), XSpiPs_ResetHw(), and XSpiPs_SelfTest().

#define XSPIPS_CR_SSCTRL_MASK 0x00003C00U

Slave Select Decode.

Referenced by XSpiPs_GetSlaveSelect(), XSpiPs_InterruptHandler(), XSpiPs_PolledTransfer(), XSpiPs_ResetHw(), XSpiPs_SetSlaveSelect(), and XSpiPs_Transfer().

#define XSPIPS_CR_SSCTRL_MAXIMUM 0xFU

Slave Select maximum value.

Referenced by XSpiPs_GetSlaveSelect(), and XSpiPs_SetSlaveSelect().

#define XSPIPS_CR_SSCTRL_SHIFT 10U

Slave Select Decode shift.

Referenced by XSpiPs_GetSlaveSelect(), and XSpiPs_SetSlaveSelect().

#define XSPIPS_CR_SSDECEN_MASK 0x00000200U

Slave Select Decode Enable.

#define XSPIPS_CR_SSFORCE_MASK 0x00004000U

Force Slave Select.

#define XSPIPS_DECODE_SSELECT_OPTION 0x00000008U

Select 16 slaves Option.

#define XSpiPs_Disable ( InstancePtr ) XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + XSPIPS_ER_OFFSET, 0U)

Disable the device.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: None.

Note: C-Style signature: void XSpiPs_Disable(u32 *InstancePtr)

Referenced by SpiPsSlavePolledExample(), XSpiPs_Abort(), XSpiPs_InterruptHandler(), XSpiPs_PolledTransfer(), and XSpiPs_SetOptions().

#define XSPIPS_DR_AFTER_MASK 0x0000FF00U

Delay After Transfers mask.

Referenced by XSpiPs_GetDelays().

#define XSPIPS_DR_AFTER_SHIFT 8U

Delay After Transfers shift.

Referenced by XSpiPs_GetDelays(), and XSpiPs_SetDelays().

#define XSPIPS_DR_BTWN_MASK 0x00FF0000U

Delay Between Transfers mask.

Referenced by XSpiPs_GetDelays().

#define XSPIPS_DR_BTWN_SHIFT 16U

Delay Between Transfers shift.

Referenced by XSpiPs_GetDelays(), and XSpiPs_SetDelays().

#define XSPIPS_DR_INIT_MASK 0x000000FFU

Delay Initially mask.

Referenced by XSpiPs_GetDelays().

#define XSPIPS_DR_NSS_MASK 0xFF000000U

Delay for slave select de-assertion between word transfers mask.

Referenced by XSpiPs_GetDelays().

#define XSPIPS_DR_NSS_SHIFT 24U

Delay for slave select de-assertion between word transfers shift.

Referenced by XSpiPs_GetDelays(), and XSpiPs_SetDelays().

#define XSPIPS_DR_OFFSET 0x18U

Delay Register.

Referenced by XSpiPs_GetDelays(), and XSpiPs_SetDelays().

#define XSpiPs_Enable ( InstancePtr )

Value:

XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + XSPIPS_ER_OFFSET, \

XSPIPS_ER_ENABLE_MASK)

XSPIPS_ER_OFFSET

#define XSPIPS_ER_OFFSET

Enable/Disable Register.

Definition: xspips_hw.h:63

XSPIPS_ER_ENABLE_MASK

#define XSPIPS_ER_ENABLE_MASK

SPI Enable Bit Mask.

Definition: xspips_hw.h:166

Enable the device and uninhibit master transactions.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: None.

Note: C-Style signature: void XSpiPs_Enable(u32 *InstancePtr)

Referenced by SpiPsSlavePolledExample(), XSpiPs_PolledTransfer(), XSpiPs_SetOptions(), and XSpiPs_Transfer().

#define XSPIPS_ER_ENABLE_MASK 0x00000001U

SPI Enable Bit Mask.

#define XSPIPS_ER_OFFSET 0x14U

Enable/Disable Register.

Referenced by XSpiPs_ResetHw().

#define XSPIPS_EVENT_MODE_FAULT 1U

Mode fault error.

#define XSPIPS_EVENT_RECEIVE_OVERRUN 4U

Receive data loss because RX FIFO full.

#define XSPIPS_EVENT_TRANSFER_DONE 2U

Transfer done.

#define XSPIPS_EVENT_TRANSMIT_UNDERRUN 3U

TX FIFO empty.

#define XSPIPS_FIFO_DEPTH 128U

FIFO depth of Tx and Rx.

Referenced by SpiSlaveWrite(), XSpiPs_Abort(), XSpiPs_InterruptHandler(), XSpiPs_PolledTransfer(), XSpiPs_ResetHw(), and XSpiPs_Transfer().

#define XSPIPS_FORCE_SSELECT_OPTION 0x00000010U

Force Slave Select.

Referenced by SpiPsEepromIntrExample(), SpiPsEepromPolledExample(), SpiPsFlashIntrExample(), SpiPsFlashPolledExample(), and SpiPsTpmPolledExample().

#define XSpiPs_GetRXWatermark ( InstancePtr ) XSpiPs_In32(((InstancePtr)->Config.BaseAddress) + XSPIPS_RXWR_OFFSET)

Get the contents of the receive FIFO watermark register.

Use the XSPIPS_RXWR_* constants defined xspips_hw.h to interpret the bit-mask returned.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: A 8-bit value representing the contents of the RXWR register.

Note: C-Style signature: u32 XSpiPs_GetRXWatermark(u32 *InstancePtr)

#define XSpiPs_GetSlaveIdle ( InstancePtr )

Value:

XSpiPs_In32(((InstancePtr)->Config.BaseAddress) + \

XSPIPS_SICR_OFFSET)

XSPIPS_SICR_OFFSET

#define XSPIPS_SICR_OFFSET

Slave Idle Count.

Definition: xspips_hw.h:67

Get the contents of the slave idle count register.

Use the XSPIPS_SICR_* constants defined in xspips_hw.h to interpret the bit-mask returned.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: 8-bit value representing the contents of the SIC register.

Note: C-Style signature: u32 XSpiPs_GetSlaveIdle(XSpiPs *InstancePtr)

#define XSpiPs_GetTXWatermark ( InstancePtr ) XSpiPs_In32(((InstancePtr)->Config.BaseAddress) + XSPIPS_TXWR_OFFSET)

Get the contents of the transmit FIFO watermark register.

Use the XSPIPS_TXWR_* constants defined xspips_hw.h to interpret the bit-mask returned.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: 8-bit value representing the contents of the TXWR register.

Note: C-Style signature: u32 XSpiPs_GetTXWatermark(u32 *InstancePtr)

#define XSPIPS_IDR_OFFSET 0x0CU

Interrupt Disable.

Referenced by XSpiPs_InterruptHandler(), and XSpiPs_ResetHw().

#define XSPIPS_IER_OFFSET 0x08U

Interrupt Enable.

Referenced by XSpiPs_InterruptHandler(), and XSpiPs_Transfer().

#define XSPIPS_IMR_OFFSET 0x10U

Interrupt Enabled Mask.

#define XSPIPS_ISR_RESET_STATE 0x04U

Default to tx/rx reg empty.

Referenced by XSpiPs_SelfTest().

#define XSPIPS_IXR_DFLT_MASK 0x00000027U

Default interrupts mask.

Referenced by XSpiPs_InterruptHandler(), and XSpiPs_Transfer().

#define XSPIPS_IXR_DISABLE_ALL_MASK 0x00000043U

Disable all interrupts.

Referenced by XSpiPs_ResetHw().

#define XSPIPS_IXR_MODF_MASK 0x00000002U

Mode Fault.

Referenced by XSpiPs_Abort(), XSpiPs_InterruptHandler(), and XSpiPs_PolledTransfer().

#define XSPIPS_IXR_RXFULL_MASK 0x00000020U

Rx FIFO Full.

#define XSPIPS_IXR_RXNEMPTY_MASK 0x00000010U

Rx FIFO Not Empty.

Referenced by SpiSlaveRead(), XSpiPs_Abort(), and XSpiPs_ResetHw().

#define XSPIPS_IXR_RXOVR_MASK 0x00000001U

Rx FIFO Overrun.

Referenced by XSpiPs_InterruptHandler().

#define XSPIPS_IXR_TXFULL_MASK 0x00000008U

Tx FIFO Full.

#define XSPIPS_IXR_TXOW_MASK 0x00000004U

Tx FIFO Overwater.

Referenced by SpiSlaveWrite(), XSpiPs_InterruptHandler(), and XSpiPs_PolledTransfer().

#define XSPIPS_IXR_TXUF_MASK 0x00000040U

Tx FIFO Underflow.

Referenced by XSpiPs_InterruptHandler().

#define XSPIPS_IXR_WR_TO_CLR_MASK 0x00000043U

Interrupts which need write to clear.

Referenced by XSpiPs_InterruptHandler(), XSpiPs_ResetHw(), and XSpiPs_Transfer().

#define XSPIPS_MANUAL_START_OPTION 0x00000020U

Manual Start mode option.

Referenced by SpiPsFlashIntrExample(), SpiPsFlashPolledExample(), and SpiPsTpmPolledExample().

#define XSPIPS_MASTER_OPTION 0x00000001U

Master mode option.

Referenced by SpiPsEepromIntrExample(), SpiPsEepromPolledExample(), SpiPsFlashIntrExample(), SpiPsFlashPolledExample(), and SpiPsTpmPolledExample().

#define XSpiPs_ReadReg	(	BaseAddress,
		RegOffset
	)	XSpiPs_In32((BaseAddress) + (RegOffset))

Read a register.

Parameters

BaseAddress	contains the base address of the device.
RegOffset	contains the offset from the 1st register of the device to the target register.

Returns: The value read from the register.

Note: C-Style signature: u32 XSpiPs_ReadReg(u32 BaseAddress. int RegOffset)

Referenced by SpiSlaveRead(), SpiSlaveWrite(), XSpiPs_Abort(), XSpiPs_GetClkPrescaler(), XSpiPs_GetDelays(), XSpiPs_GetOptions(), XSpiPs_InterruptHandler(), XSpiPs_PolledTransfer(), XSpiPs_ResetHw(), XSpiPs_SelfTest(), XSpiPs_SetClkPrescaler(), XSpiPs_SetOptions(), XSpiPs_SetSlaveSelect(), and XSpiPs_Transfer().

#define XSPIPS_RXD_OFFSET 0x20U

Data Receive Register.

Referenced by XSpiPs_Abort(), and XSpiPs_ResetHw().

#define XSPIPS_RXWR_MASK 0x0000007FU

Receive Watermark Mask.

Referenced by XSpiPs_ResetHw().

#define XSPIPS_RXWR_OFFSET 0x2CU

Receive FIFO Watermark.

Referenced by XSpiPs_ResetHw().

#define XSPIPS_RXWR_RESET_VALUE 0x00000001U

Receive Watermark register reset value.

Referenced by XSpiPs_ResetHw().

#define XSpiPs_SetRXWatermark	(	InstancePtr,
		RegisterValue
	)

Value:

XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + \

XSPIPS_RXWR_OFFSET, (RegisterValue))

XSPIPS_RXWR_OFFSET

#define XSPIPS_RXWR_OFFSET

Receive FIFO Watermark.

Definition: xspips_hw.h:69

Set the contents of the receive FIFO watermark register.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
RegisterValue	is the value to be written, valid values are 1-128.

Returns: None.

Note: C-Style signature: void XSpiPs_SetRXWatermark(XSpiPs *InstancePtr, u32 RegisterValue)

Referenced by SpiPsSlavePolledExample().

#define XSpiPs_SetSlaveIdle	(	InstancePtr,
		RegisterValue
	)

Value:

XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + \

XSPIPS_SICR_OFFSET, (RegisterValue))

XSPIPS_SICR_OFFSET

#define XSPIPS_SICR_OFFSET

Slave Idle Count.

Definition: xspips_hw.h:67

Set the contents of the slave idle count register.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
RegisterValue	is the value to be written, valid values are 0-255.

Returns: None

Note: C-Style signature: void XSpiPs_SetSlaveIdle(XSpiPs *InstancePtr, u32 RegisterValue)

#define XSpiPs_SetTXWatermark	(	InstancePtr,
		RegisterValue
	)

Value:

XSpiPs_Out32(((InstancePtr)->Config.BaseAddress) + \

XSPIPS_TXWR_OFFSET, (RegisterValue))

XSPIPS_TXWR_OFFSET

#define XSPIPS_TXWR_OFFSET

Transmit FIFO Watermark.

Definition: xspips_hw.h:68

Set the contents of the transmit FIFO watermark register.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
RegisterValue	is the value to be written, valid values are 1-128.

Returns: None.

Note: C-Style signature: void XSpiPs_SetTXWatermark(XSpiPs *InstancePtr, u32 RegisterValue)

#define XSPIPS_SICR_MASK 0x000000FFU

Slave Idle Count Mask.

#define XSPIPS_SICR_OFFSET 0x24U

Slave Idle Count.

#define XSPIPS_SR_OFFSET 0x04U

Interrupt Status.

Referenced by SpiSlaveRead(), SpiSlaveWrite(), XSpiPs_Abort(), XSpiPs_InterruptHandler(), XSpiPs_PolledTransfer(), XSpiPs_ResetHw(), XSpiPs_SelfTest(), and XSpiPs_Transfer().

#define XSPIPS_TXD_OFFSET 0x1CU

Data Transmit Register.

#define XSPIPS_TXWR_MASK 0x0000007FU

Transmit Watermark Mask.

Referenced by XSpiPs_ResetHw().

#define XSPIPS_TXWR_OFFSET 0x28U

Transmit FIFO Watermark.

Referenced by XSpiPs_ResetHw().

#define XSPIPS_TXWR_RESET_VALUE 0x00000001U

Transmit Watermark register reset value.

Referenced by XSpiPs_ResetHw().

#define XSpiPs_WriteReg	(	BaseAddress,
		RegOffset,
		RegisterValue
	)	XSpiPs_Out32((BaseAddress) + (RegOffset), (RegisterValue))

Write to a register.

Parameters

BaseAddress	contains the base address of the device.
RegOffset	contains the offset from the 1st register of the device to target register.
RegisterValue	is the value to be written to the register.

Returns: None.

Note: C-Style signature: void XSpiPs_WriteReg(u32 BaseAddress, int RegOffset, u32 RegisterValue)

Referenced by XSpiPs_Abort(), XSpiPs_InterruptHandler(), XSpiPs_PolledTransfer(), XSpiPs_Reset(), XSpiPs_ResetHw(), XSpiPs_SetClkPrescaler(), XSpiPs_SetDelays(), XSpiPs_SetOptions(), XSpiPs_SetSlaveSelect(), and XSpiPs_Transfer().

Typedef Documentation

typedef void(* XSpiPs_StatusHandler)(const void *CallBackRef, u32 StatusEvent, u32 ByteCount)

The handler data type allows the user to define a callback function to handle the asynchronous processing for the SPI device.

The application using this driver is expected to define a handler of this type to support interrupt driven mode. The handler executes in an interrupt context, so only minimal processing should be performed.

Parameters

CallBackRef	is the callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is not important to the driver, so it is a void pointer.
StatusEvent	holds one or more status events that have occurred. See the XSpiPs_SetStatusHandler() for details on the status events that can be passed in the callback.
ByteCount	indicates how many bytes of data were successfully transferred. This may be less than the number of bytes requested if the status event indicates an error.

Function Documentation

void XSpiPs_Abort ( XSpiPs * InstancePtr )

Aborts a transfer in progress by disabling the device and resetting the FIFOs if present.

The byte counts are cleared, the busy flag is cleared, and mode fault is cleared.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: None.

Note

This function does a read/modify/write of the Config register. The user of this function needs to take care of critical sections.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsBusy, XSpiPs::RemainingBytes, XSpiPs::RequestedBytes, XSpiPs_Disable, XSPIPS_FIFO_DEPTH, XSPIPS_IXR_MODF_MASK, XSPIPS_IXR_RXNEMPTY_MASK, XSpiPs_ReadReg, XSPIPS_RXD_OFFSET, XSPIPS_SR_OFFSET, and XSpiPs_WriteReg.

Referenced by XSpiPs_InterruptHandler(), and XSpiPs_Reset().

s32 XSpiPs_CfgInitialize	(	XSpiPs *	InstancePtr,
		const XSpiPs_Config *	ConfigPtr,
		u32	EffectiveAddr
	)

Initializes a specific XSpiPs instance such that the driver is ready to use.

The state of the device after initialization is:

Device is disabled
Slave mode
Active high clock polarity
Clock phase 0

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
ConfigPtr	is a reference to a structure containing information about a specific SPI device. This function initializes an InstancePtr object for a specific device specified by the contents of Config. This function can initialize multiple instance objects with the use of multiple calls giving different Config information on each call.
EffectiveAddr	is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use ConfigPtr->Config.BaseAddress for this device.

Returns

XST_SUCCESS if successful.
XST_DEVICE_IS_STARTED if the device is already started. It must be stopped to re-initialize.

Note: None.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs_Config::DeviceId, XSpiPs_Config::InputClockHz, XSpiPs::IsBusy, XSpiPs::IsReady, XSpiPs::RecvBufferPtr, XSpiPs::RemainingBytes, XSpiPs::RequestedBytes, XSpiPs::SendBufferPtr, and XSpiPs_Reset().

Referenced by SpiPsEepromIntrExample(), SpiPsEepromPolledExample(), SpiPsFlashIntrExample(), SpiPsFlashPolledExample(), SpiPsSelfTestExample(), SpiPsSlavePolledExample(), and SpiPsTpmPolledExample().

u8 XSpiPs_GetClkPrescaler ( const XSpiPs * InstancePtr )

This function gets the clock prescaler of an SPI device.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: The prescaler value.

Note: None.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsReady, XSPIPS_CR_OFFSET, XSPIPS_CR_PRESC_MASK, XSPIPS_CR_PRESC_SHIFT, and XSpiPs_ReadReg.

void XSpiPs_GetDelays	(	const XSpiPs *	InstancePtr,
		u8 *	DelayNss,
		u8 *	DelayBtwn,
		u8 *	DelayAfter,
		u8 *	DelayInit
	)

This function gets the delay settings for an SPI device.

The delay register controls the Delay Between Transfers, Delay After Transfers, and the Delay Initially. The default value is 0x0.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
DelayNss	is a pointer to the delay for which the chip select outputs will be de-asserted between words when CPHA=0.
DelayBtwn	is a pointer to the Delay Between transfers value. This is a return parameter.
DelayAfter	is a pointer to the Delay After transfer value. This is a return parameter.
DelayInit	is a pointer to the Delay Initially value. This is a return parameter.

Returns: None.

Note: None.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsReady, XSPIPS_DR_AFTER_MASK, XSPIPS_DR_AFTER_SHIFT, XSPIPS_DR_BTWN_MASK, XSPIPS_DR_BTWN_SHIFT, XSPIPS_DR_INIT_MASK, XSPIPS_DR_NSS_MASK, XSPIPS_DR_NSS_SHIFT, XSPIPS_DR_OFFSET, and XSpiPs_ReadReg.

Referenced by XSpiPs_SelfTest().

u32 XSpiPs_GetOptions ( const XSpiPs * InstancePtr )

This function gets the options for the SPI device.

The options control how the device behaves relative to the SPI bus.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns

Options contains the specified options currently set. This is a bit value where a 1 means the option is on, and a 0 means the option is off. See the bit definitions named XSPIPS_*_OPTIONS in file xspips.h.

Note: None.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsReady, XSPIPS_CR_OFFSET, and XSpiPs_ReadReg.

u8 XSpiPs_GetSlaveSelect ( const XSpiPs * InstancePtr )

Gets the current slave select setting for the SPI device.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: The slave number selected (starting from 0).

Note: None.

References XSpiPs::IsReady, XSpiPs::SlaveSelect, XSPIPS_CR_SSCTRL_MASK, XSPIPS_CR_SSCTRL_MAXIMUM, and XSPIPS_CR_SSCTRL_SHIFT.

void XSpiPs_InterruptHandler ( XSpiPs * InstancePtr )

The interrupt handler for SPI interrupts.

This function must be connected by the user to an interrupt controller.

The interrupts that are handled are:

Mode Fault Error. This interrupt is generated if this device is selected as a slave when it is configured as a master. The driver aborts any data transfer that is in progress by resetting FIFOs (if present) and resetting its buffer pointers. The upper layer software is informed of the error.
Data Transmit Register (FIFO) Empty. This interrupt is generated when the transmit register or FIFO is empty. The driver uses this interrupt during a transmission to continually send/receive data until the transfer is done.
Data Transmit Register (FIFO) Underflow. This interrupt is generated when the SPI device, when configured as a slave, attempts to read an empty DTR/FIFO. An empty DTR/FIFO usually means that software is not giving the device data in a timely manner. No action is taken by the driver other than to inform the upper layer software of the error.
Data Receive Register (FIFO) Overflow. This interrupt is generated when the SPI device attempts to write a received byte to an already full DRR/FIFO. A full DRR/FIFO usually means software is not emptying the data in a timely manner. No action is taken by the driver other than to inform the upper layer software of the error.
Slave Mode Fault Error. This interrupt is generated if a slave device is selected as a slave while it is disabled. No action is taken by the driver other than to inform the upper layer software of the error.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: None.

Note

The slave select register is being set to deselect the slave when a transfer is complete. This is being done regardless of whether it is a slave or a master since the hardware does not drive the slave select as a slave.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsBusy, XSpiPs::IsReady, XSpiPs::RecvBufferPtr, XSpiPs::RemainingBytes, XSpiPs::RequestedBytes, XSpiPs::SendBufferPtr, XSpiPs::StatusRef, XSpiPs_Abort(), XSPIPS_CR_MANSTRT_MASK, XSPIPS_CR_OFFSET, XSPIPS_CR_SSCTRL_MASK, XSpiPs_Disable, XSPIPS_FIFO_DEPTH, XSPIPS_IDR_OFFSET, XSPIPS_IER_OFFSET, XSPIPS_IXR_DFLT_MASK, XSPIPS_IXR_MODF_MASK, XSPIPS_IXR_RXOVR_MASK, XSPIPS_IXR_TXOW_MASK, XSPIPS_IXR_TXUF_MASK, XSPIPS_IXR_WR_TO_CLR_MASK, XSpiPs_ReadReg, XSPIPS_SR_OFFSET, and XSpiPs_WriteReg.

Referenced by SpiPsEepromIntrExample(), and SpiPsFlashIntrExample().

XSpiPs_Config * XSpiPs_LookupConfig ( u16 DeviceId )

Looks up the device configuration based on the unique device ID.

A table contains the configuration info for each device in the system.

Parameters

DeviceId contains the ID of the device to look up the configuration for.

Returns

A pointer to the configuration found or NULL if the specified device ID was not found. See xspips.h for the definition of XSpiPs_Config.

Note: None.

Referenced by SpiPsEepromIntrExample(), SpiPsEepromPolledExample(), SpiPsFlashIntrExample(), SpiPsFlashPolledExample(), SpiPsSelfTestExample(), SpiPsSlavePolledExample(), and SpiPsTpmPolledExample().

s32 XSpiPs_PolledTransfer	(	XSpiPs *	InstancePtr,
		u8 *	SendBufPtr,
		u8 *	RecvBufPtr,
		u32	ByteCount
	)

Transfers specified data on the SPI bus in polled mode.

The caller has the option of providing two different buffers for send and receive, or one buffer for both send and receive, or no buffer for receive. The receive buffer must be at least as big as the send buffer to prevent unwanted memory writes. This implies that the byte count passed in as an argument must be the smaller of the two buffers if they differ in size. Here are some sample usages:

  XSpiPs_PolledTransfer(InstancePtr, SendBuf, RecvBuf, ByteCount)
      The caller wishes to send and receive, and provides two different
      buffers for send and receive.

  XSpiPs_PolledTransfer(InstancePtr, SendBuf, NULL, ByteCount)
      The caller wishes only to send and does not care about the received
      data. The driver ignores the received data in this case.

  XSpiPs_PolledTransfer(InstancePtr, SendBuf, SendBuf, ByteCount)
      The caller wishes to send and receive, but provides the same buffer
      for doing both. The driver sends the data and overwrites the send
      buffer with received data as it transfers the data.

  XSpiPs_PolledTransfer(InstancePtr, RecvBuf, RecvBuf, ByteCount)
      The caller wishes to only receive and does not care about sending
      data.  In this case, the caller must still provide a send buffer, but
      it can be the same as the receive buffer if the caller does not care
      what it sends.  The device must send N bytes of data if it wishes to
      receive N bytes of data.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
SendBufPtr	is a pointer to a buffer of data for sending. This buffer must not be NULL.
RecvBufPtr	is a pointer to a buffer for received data. This argument can be NULL if do not care about receiving.
ByteCount	contains the number of bytes to send/receive. The number of bytes received always equals the number of bytes sent.

Returns

XST_SUCCESS if the buffers are successfully handed off to the device for transfer.
XST_DEVICE_BUSY indicates that a data transfer is already in progress. This is determined by the driver.

Note

This function is not thread-safe. The higher layer software must ensure that no two threads are transferring data on the SPI bus at the same time.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsBusy, XSpiPs::IsReady, XSpiPs::RecvBufferPtr, XSpiPs::RemainingBytes, XSpiPs::RequestedBytes, XSpiPs::SendBufferPtr, XSpiPs::SlaveSelect, XSPIPS_CR_MANSTRT_MASK, XSPIPS_CR_OFFSET, XSPIPS_CR_SSCTRL_MASK, XSpiPs_Disable, XSpiPs_Enable, XSPIPS_FIFO_DEPTH, XSPIPS_IXR_MODF_MASK, XSPIPS_IXR_TXOW_MASK, XSpiPs_ReadReg, XSPIPS_SR_OFFSET, and XSpiPs_WriteReg.

Referenced by SpiPsTpmTransfer().

void XSpiPs_Reset ( XSpiPs * InstancePtr )

Resets the SPI device.

Reset must only be called after the driver has been initialized. The configuration of the device after reset is the same as its configuration after initialization. Any data transfer that is in progress is aborted.

The upper layer software is responsible for re-configuring (if necessary) and restarting the SPI device after the reset.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns: None.

Note: None.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsReady, XSpiPs_Abort(), XSPIPS_CR_OFFSET, XSPIPS_CR_RESET_STATE, and XSpiPs_WriteReg.

Referenced by XSpiPs_CfgInitialize(), and XSpiPs_SelfTest().

void XSpiPs_ResetHw ( u32 BaseAddress )

Resets the spi module.

Parameters

BaseAddress is the base address of the device.

Returns: None

Note: None.

References XSPIPS_CR_OFFSET, XSPIPS_CR_RESET_STATE, XSPIPS_CR_SSCTRL_MASK, XSPIPS_ER_OFFSET, XSPIPS_FIFO_DEPTH, XSPIPS_IDR_OFFSET, XSPIPS_IXR_DISABLE_ALL_MASK, XSPIPS_IXR_RXNEMPTY_MASK, XSPIPS_IXR_WR_TO_CLR_MASK, XSpiPs_ReadReg, XSPIPS_RXD_OFFSET, XSPIPS_RXWR_MASK, XSPIPS_RXWR_OFFSET, XSPIPS_RXWR_RESET_VALUE, XSPIPS_SR_OFFSET, XSPIPS_TXWR_MASK, XSPIPS_TXWR_OFFSET, XSPIPS_TXWR_RESET_VALUE, and XSpiPs_WriteReg.

s32 XSpiPs_SelfTest ( XSpiPs * InstancePtr )

Runs a self-test on the driver/device.

The self-test is destructive in that a reset of the device is performed in order to check the reset values of the registers and to get the device into a known state.

Upon successful return from the self-test, the device is reset.

Parameters

InstancePtr is a pointer to the XSpiPs instance.

Returns

XST_SUCCESS if successful

XST_REGISTER_ERROR indicates a register did not read or write correctly.

Note: None.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsReady, XSPIPS_CR_OFFSET, XSPIPS_CR_RESET_STATE, XSpiPs_GetDelays(), XSPIPS_ISR_RESET_STATE, XSpiPs_ReadReg, XSpiPs_Reset(), XSpiPs_SetDelays(), and XSPIPS_SR_OFFSET.

Referenced by SpiPsEepromIntrExample(), SpiPsEepromPolledExample(), SpiPsFlashIntrExample(), SpiPsFlashPolledExample(), SpiPsSelfTestExample(), and SpiPsTpmPolledExample().

s32 XSpiPs_SetClkPrescaler	(	const XSpiPs *	InstancePtr,
		u8	Prescaler
	)

This function sets the clock prescaler for an SPI device.

The device must be idle rather than busy transferring data before setting these device options.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
Prescaler	is the value that determine how much the clock should be divided by. Use the XSPIPS_CLK_PRESCALE_* constants defined in xspips.h for this setting.

Returns

XST_SUCCESS if options are successfully set.
XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting options.

Note: This function is not thread-safe.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsBusy, XSpiPs::IsReady, XSPIPS_CR_OFFSET, XSPIPS_CR_PRESC_MASK, XSPIPS_CR_PRESC_MAXIMUM, XSPIPS_CR_PRESC_SHIFT, XSpiPs_ReadReg, and XSpiPs_WriteReg.

Referenced by SpiPsEepromIntrExample(), SpiPsEepromPolledExample(), SpiPsFlashIntrExample(), SpiPsFlashPolledExample(), and SpiPsTpmPolledExample().

s32 XSpiPs_SetDelays	(	const XSpiPs *	InstancePtr,
		u8	DelayNss,
		u8	DelayBtwn,
		u8	DelayAfter,
		u8	DelayInit
	)

This function sets the delay register for the SPI device driver.

The delay register controls the Delay Between Transfers, Delay After Transfers, and the Delay Initially. The default value is 0x0. The range of each delay value is 0-255.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
DelayNss	is the delay for which the chip select outputs will be de-asserted between words when CPHA=0.
DelayBtwn	is the delay between one Slave Select being de-activated and the activation of another slave. The delay is the number of master clock periods given by DelayBtwn + 2.
DelayAfter	define the delay between the last bit of the current byte transfer and the first bit of the next byte transfer. The delay in number of master clock periods is given as: CPHA=0:DelayInit+DelayAfter+3 CPHA=1:DelayAfter+1
DelayInit	is the delay between asserting the slave select signal and the first bit transfer. The delay int number of master clock periods is DelayInit+1.

Returns

XST_SUCCESS if delays are successfully set.
XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting options.

Note: None.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsBusy, XSpiPs::IsReady, XSPIPS_DR_AFTER_SHIFT, XSPIPS_DR_BTWN_SHIFT, XSPIPS_DR_NSS_SHIFT, XSPIPS_DR_OFFSET, and XSpiPs_WriteReg.

Referenced by XSpiPs_SelfTest().

s32 XSpiPs_SetOptions	(	const XSpiPs *	InstancePtr,
		u32	Options
	)

This function sets the options for the SPI device driver.

The options control how the device behaves relative to the SPI bus. The device must be idle rather than busy transferring data before setting these device options.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
Options	contains the specified options to be set. This is a bit mask where a 1 means to turn the option on, and a 0 means to turn the option off. One or more bit values may be contained in the mask. See the bit definitions named XSPIPS_*_OPTIONS in the file xspips.h.

Returns

XST_SUCCESS if options are successfully set.
XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting options.

Note: This function is not thread-safe.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsBusy, XSpiPs::IsReady, XSPIPS_CR_CPHA_MASK, XSPIPS_CR_CPOL_MASK, XSPIPS_CR_OFFSET, XSpiPs_Disable, XSpiPs_Enable, XSpiPs_ReadReg, and XSpiPs_WriteReg.

Referenced by SpiPsEepromIntrExample(), SpiPsEepromPolledExample(), SpiPsFlashIntrExample(), SpiPsFlashPolledExample(), SpiPsSlavePolledExample(), and SpiPsTpmPolledExample().

s32 XSpiPs_SetSlaveSelect	(	XSpiPs *	InstancePtr,
		u8	SlaveSel
	)

Selects or deselect the slave with which the master communicates.

This setting affects the SPI_ss_outN signals. The behavior depends on the setting of the CR_SSDECEN bit. If CR_SSDECEN is 0, the SPI_ss_outN bits will be output with a single signal low. If CR_SSDECEN is 1, the SPI_ss_outN bits will reflect the value set.

The user is not allowed to deselect the slave while a transfer is in progress. If no transfer is in progress, the user can select a new slave, which implicitly deselects the current slave. In order to explicitly deselect the current slave, a value of all 1's, 0x0F can be passed in as the argument to the function.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
SlaveSel	is the slave number to be selected. Normally, 3 slaves can be selected with values 0-2. In case, 3-8 decode option is set, then up to 8 slaves can be selected. Only one slave can be selected at a time.

Returns

XST_SUCCESS if the slave is selected or deselected successfully.
XST_DEVICE_BUSY if a transfer is in progress, slave cannot be changed.

Note

This function only sets the slave which will be selected when a transfer occurs. The slave is not selected when the SPI is idle. The slave select has no affect when the device is configured as a slave.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsBusy, XSpiPs::IsReady, XSpiPs::SlaveSelect, XSPIPS_CR_OFFSET, XSPIPS_CR_SSCTRL_MASK, XSPIPS_CR_SSCTRL_MAXIMUM, XSPIPS_CR_SSCTRL_SHIFT, XSpiPs_ReadReg, and XSpiPs_WriteReg.

Referenced by SpiPsEepromIntrExample(), SpiPsEepromPolledExample(), SpiPsFlashIntrExample(), SpiPsFlashPolledExample(), and SpiPsTpmPolledExample().

void XSpiPs_SetStatusHandler	(	XSpiPs *	InstancePtr,
		void *	CallBackRef,
		XSpiPs_StatusHandler	FunctionPtr
	)

Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software.

The handler executes in an interrupt context, so it must minimize the amount of processing performed. One of the following status events is passed to the status handler.

XST_SPI_MODE_FAULT              A mode fault error occurred, meaning the device
                        is selected as slave while being a master.

XST_SPI_TRANSFER_DONE           The requested data transfer is done

XST_SPI_TRANSMIT_UNDERRUN       As a slave device, the master clocked data
                        but there were none available in the transmit
                        register/FIFO. This typically means the slave
                        application did not issue a transfer request
                        fast enough, or the processor/driver could not
                        fill the transmit register/FIFO fast enough.

XST_SPI_RECEIVE_OVERRUN The SPI device lost data. Data was received
                        but the receive data register/FIFO was full.

XST_SPI_SLAVE_MODE_FAULT        A slave SPI device was selected as a slave
                        while it was disabled. This indicates the
                        master is already transferring data (which is
                        being dropped until the slave application
                        issues a transfer).

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
CallBackRef	is the upper layer callback reference passed back when the callback function is invoked.
FunctionPtr	is the pointer to the callback function.

Returns: None.

Note

The handler is called within interrupt context, so it should do its work quickly and queue potentially time-consuming work to a task-level thread.

References XSpiPs::IsReady, and XSpiPs::StatusRef.

Referenced by SpiPsEepromIntrExample(), and SpiPsFlashIntrExample().

s32 XSpiPs_Transfer	(	XSpiPs *	InstancePtr,
		u8 *	SendBufPtr,
		u8 *	RecvBufPtr,
		u32	ByteCount
	)

Transfers specified data on the SPI bus.

If the SPI device is configured as a master, this function initiates bus communication and sends/receives the data to/from the selected SPI slave. If the SPI device is configured as a slave, this function prepares the buffers to be sent/received when selected by a master. For every byte sent, a byte is received. This function should be used to perform interrupt based transfers.

The caller has the option of providing two different buffers for send and receive, or one buffer for both send and receive, or no buffer for receive. The receive buffer must be at least as big as the send buffer to prevent unwanted memory writes. This implies that the byte count passed in as an argument must be the smaller of the two buffers if they differ in size. Here are some sample usages:

  XSpiPs_Transfer(InstancePtr, SendBuf, RecvBuf, ByteCount)
      The caller wishes to send and receive, and provides two different
      buffers for send and receive.

  XSpiPs_Transfer(InstancePtr, SendBuf, NULL, ByteCount)
      The caller wishes only to send and does not care about the received
      data. The driver ignores the received data in this case.

  XSpiPs_Transfer(InstancePtr, SendBuf, SendBuf, ByteCount)
      The caller wishes to send and receive, but provides the same buffer
      for doing both. The driver sends the data and overwrites the send
      buffer with received data as it transfers the data.

  XSpiPs_Transfer(InstancePtr, RecvBuf, RecvBuf, ByteCount)
      The caller wishes to only receive and does not care about sending
      data.  In this case, the caller must still provide a send buffer, but
      it can be the same as the receive buffer if the caller does not care
      what it sends.  The device must send N bytes of data if it wishes to
      receive N bytes of data.

Although this function takes entire buffers as arguments, the driver can only transfer a limited number of bytes at a time, limited by the size of the FIFO. A call to this function only starts the transfer, then subsequent transfers of the data is performed by the interrupt service routine until the entire buffer has been transferred. The status callback function is called when the entire buffer has been sent/received.

This function is non-blocking. As a master, the SetSlaveSelect function must be called prior to this function.

Parameters

InstancePtr	is a pointer to the XSpiPs instance.
SendBufPtr	is a pointer to a buffer of data for sending. This buffer must not be NULL.
RecvBufPtr	is a pointer to a buffer for received data. This argument can be NULL if do not care about receiving.
ByteCount	contains the number of bytes to send/receive. The number of bytes received always equals the number of bytes sent.

Returns

XST_SUCCESS if the buffers are successfully handed off to the device for transfer.
XST_DEVICE_BUSY indicates that a data transfer is already in progress. This is determined by the driver.

Note

This function is not thread-safe. The higher layer software must ensure that no two threads are transferring data on the SPI bus at the same time.

References XSpiPs_Config::BaseAddress, XSpiPs::Config, XSpiPs::IsBusy, XSpiPs::IsReady, XSpiPs::RecvBufferPtr, XSpiPs::RemainingBytes, XSpiPs::RequestedBytes, XSpiPs::SendBufferPtr, XSpiPs::SlaveSelect, XSPIPS_CR_MANSTRT_MASK, XSPIPS_CR_OFFSET, XSPIPS_CR_SSCTRL_MASK, XSpiPs_Enable, XSPIPS_FIFO_DEPTH, XSPIPS_IER_OFFSET, XSPIPS_IXR_DFLT_MASK, XSPIPS_IXR_WR_TO_CLR_MASK, XSpiPs_ReadReg, XSPIPS_SR_OFFSET, and XSpiPs_WriteReg.

Referenced by EepromRead(), and EepromWrite().

Variable Documentation

XSpiPs_Config XSpiPs_ConfigTable[XPAR_XSPIPS_NUM_INSTANCES]

This table contains configuration information for each SPI device in the system.

XSpiPs_Config XSpiPs_ConfigTable[XPAR_XSPIPS_NUM_INSTANCES]

Initial value:

= {
        {
                (u16)XPAR_XSPIPS_0_DEVICE_ID, 
                (u32)XPAR_XSPIPS_0_BASEADDR,  
                (u32)XPAR_XSPIPS_0_SPI_CLK_FREQ_HZ
        },
}

This table contains configuration information for each SPI device in the system.

Data Structures

Macros

Typedefs

Functions

Variables

Configuration options

SPI Clock Prescaler options

Callback events

Register Map

Configuration Register

SPI Interrupt Registers

Enable Register

Delay Register

Slave Idle Count Registers

Transmit FIFO Watermark Register

Receive FIFO Watermark Register

FIFO Depth

Macro Definition Documentation

Typedef Documentation

Function Documentation

Variable Documentation