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sysmonpsu
Vitis Drivers API Documentation
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sysmonpsu
Vitis Drivers API Documentation
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Macros | |
| #define | XSYSMONPSU_BASEADDR 0xFFA50000U |
| XSysmonPsu Base Address. More... | |
| #define | XSYSMONPSU_MISC_OFFSET 0x00000000U |
| Register: XSysmonPsuMisc. More... | |
| #define | XSYSMONPSU_ISR_0_OFFSET 0x00000010U |
| Register: XSysmonPsuIsr0. More... | |
| #define | XSYSMONPSU_ISR_1_OFFSET 0x00000014U |
| Register: XSysmonPsuIsr1. More... | |
| #define | XSYSMONPSU_IMR_0_OFFSET 0x00000018U |
| Register: XSysmonPsuImr0. More... | |
| #define | XSYSMONPSU_IMR_1_OFFSET 0x0000001CU |
| Register: XSysmonPsuImr1. More... | |
| #define | XSYSMONPSU_IER_0_OFFSET 0x00000020U |
| Register: XSysmonPsuIer0. More... | |
| #define | XSYSMONPSU_IER_1_OFFSET 0x00000024U |
| Register: XSysmonPsuIer1. More... | |
| #define | XSYSMONPSU_IDR_0_OFFSET 0x00000028U |
| Register: XSysmonPsuIdr0. More... | |
| #define | XSYSMONPSU_IDR_1_OFFSET 0x0000002CU |
| Register: XSysmonPsuIdr1. More... | |
| #define | XSYSMONPSU_PS_SYSMON_CSTS_OFFSET 0x00000040U |
| Register: XSysmonPsuPsSysmonSts. More... | |
| #define | XSYSMONPSU_PL_SYSMON_CSTS_OFFSET 0x00000044U |
| Register: XSysmonPsuPlSysmonSts. More... | |
| #define | XSYSMONPSU_MON_STS_OFFSET 0x00000050U |
| Register: XSysmonPsuMonSts. More... | |
| #define | XSYSMONPSU_VCC_PSPLL0_OFFSET 0x00000060U |
| Register: XSysmonPsuVccPspll0. More... | |
| #define | XSYSMONPSU_VCC_PSPLL1_OFFSET 0x00000064U |
| Register: XSysmonPsuVccPspll1. More... | |
| #define | XSYSMONPSU_VCC_PSPLL2_OFFSET 0x00000068U |
| Register: XSysmonPsuVccPspll2. More... | |
| #define | XSYSMONPSU_VCC_PSPLL3_OFFSET 0x0000006CU |
| Register: XSysmonPsuVccPspll3. More... | |
| #define | XSYSMONPSU_VCC_PSPLL4_OFFSET 0x00000070U |
| Register: XSysmonPsuVccPspll4. More... | |
| #define | XSYSMONPSU_VCC_PSBATT_OFFSET 0x00000074U |
| Register: XSysmonPsuVccPsbatt. More... | |
| #define | XSYSMONPSU_VCCINT_OFFSET 0x00000078U |
| Register: XSysmonPsuVccint. More... | |
| #define | XSYSMONPSU_VCCBRAM_OFFSET 0x0000007CU |
| Register: XSysmonPsuVccbram. More... | |
| #define | XSYSMONPSU_VCCAUX_OFFSET 0x00000080U |
| Register: XSysmonPsuVccaux. More... | |
| #define | XSYSMONPSU_VCC_PSDDRPLL_OFFSET 0x00000084U |
| Register: XSysmonPsuVccPsddrpll. More... | |
| #define | XSYSMONPSU_DDRPHY_VREF_OFFSET 0x00000088U |
| Register: XSysmonPsuDdrphyVref. More... | |
| #define | XSYSMONPSU_DDRPHY_ATO_OFFSET 0x0000008CU |
| Register: XSysmonPsuDdrphyAto. More... | |
| #define | XSYSMONPSU_PSGT_AT0_OFFSET 0x00000090U |
| Register: XSysmonPsuPsgtAt0. More... | |
| #define | XSYSMONPSU_PSGT_AT1_OFFSET 0x00000094U |
| Register: XSysmonPsuPsgtAt1. More... | |
| #define | XSYSMONPSU_RESERVE0_OFFSET 0x00000098U |
| Register: XSysmonPsuReserve0. More... | |
| #define | XSYSMONPSU_RESERVE1_OFFSET 0x0000009CU |
| Register: XSysmonPsuReserve1. More... | |
| #define | XSYSMONPSU_TEMP_OFFSET 0x00000000U |
| Register: XSysmonPsuTemp. More... | |
| #define | XSYSMONPSU_SUP1_OFFSET 0x00000004U |
| Register: XSysmonPsuSup1. More... | |
| #define | XSYSMONPSU_SUP2_OFFSET 0x00000008U |
| Register: XSysmonPsuSup2. More... | |
| #define | XSYSMONPSU_VP_VN_OFFSET 0x0000000CU |
| Register: XSysmonPsuVpVn. More... | |
| #define | XSYSMONPSU_VREFP_OFFSET 0x00000010U |
| Register: XSysmonPsuVrefp. More... | |
| #define | XSYSMONPSU_VREFN_OFFSET 0x00000014U |
| Register: XSysmonPsuVrefn. More... | |
| #define | XSYSMONPSU_SUP3_OFFSET 0x00000018U |
| Register: XSysmonPsuSup3. More... | |
| #define | XSYSMONPSU_CAL_SUP_OFF_OFFSET 0x00000020U |
| Register: XSysmonPsuCalSupOff. More... | |
| #define | XSYSMONPSU_CAL_ADC_BIPLR_OFF_OFFSET 0x00000024U |
| Register: XSysmonPsuCalAdcBiplrOff. More... | |
| #define | XSYSMONPSU_CAL_GAIN_ERR_OFFSET 0x00000028U |
| Register: XSysmonPsuCalGainErr. More... | |
| #define | XSYSMONPSU_SUP4_OFFSET 0x00000034U |
| Register: XSysmonPsuSup4. More... | |
| #define | XSYSMONPSU_SUP5_OFFSET 0x00000038U |
| Register: XSysmonPsuSup5. More... | |
| #define | XSYSMONPSU_SUP6_OFFSET 0x0000003CU |
| Register: XSysmonPsuSup6. More... | |
| #define | XSYSMONPSU_VAUX00_OFFSET 0x00000040U |
| Register: XSysmonPsuVaux00. More... | |
| #define | XSYSMONPSU_VAUX01_OFFSET 0x00000044U |
| Register: XSysmonPsuVaux01. More... | |
| #define | XSYSMONPSU_VAUX02_OFFSET 0x00000048U |
| Register: XSysmonPsuVaux02. More... | |
| #define | XSYSMONPSU_VAUX03_OFFSET 0x0000004CU |
| Register: XSysmonPsuVaux03. More... | |
| #define | XSYSMONPSU_VAUX04_OFFSET 0x00000050U |
| Register: XSysmonPsuVaux04. More... | |
| #define | XSYSMONPSU_VAUX05_OFFSET 0x00000054U |
| Register: XSysmonPsuVaux05. More... | |
| #define | XSYSMONPSU_VAUX06_OFFSET 0x00000058U |
| Register: XSysmonPsuVaux06. More... | |
| #define | XSYSMONPSU_VAUX07_OFFSET 0x0000005CU |
| Register: XSysmonPsuVaux07. More... | |
| #define | XSYSMONPSU_VAUX08_OFFSET 0x00000060U |
| Register: XSysmonPsuVaux08. More... | |
| #define | XSYSMONPSU_VAUX09_OFFSET 0x00000064U |
| Register: XSysmonPsuVaux09. More... | |
| #define | XSYSMONPSU_VAUX0A_OFFSET 0x00000068U |
| Register: XSysmonPsuVaux0a. More... | |
| #define | XSYSMONPSU_VAUX0B_OFFSET 0x0000006CU |
| Register: XSysmonPsuVaux0b. More... | |
| #define | XSYSMONPSU_VAUX0C_OFFSET 0x00000070U |
| Register: XSysmonPsuVaux0c. More... | |
| #define | XSYSMONPSU_VAUX0D_OFFSET 0x00000074U |
| Register: XSysmonPsuVaux0d. More... | |
| #define | XSYSMONPSU_VAUX0E_OFFSET 0x00000078U |
| Register: XSysmonPsuVaux0e. More... | |
| #define | XSYSMONPSU_VAUX0F_OFFSET 0x0000007CU |
| Register: XSysmonPsuVaux0f. More... | |
| #define | XSYSMONPSU_MAX_TEMP_OFFSET 0x00000080U |
| Register: XSysmonPsuMaxTemp. More... | |
| #define | XSYSMONPSU_MAX_SUP1_OFFSET 0x00000084U |
| Register: XSysmonPsuMaxSup1. More... | |
| #define | XSYSMONPSU_MAX_SUP2_OFFSET 0x00000088U |
| Register: XSysmonPsuMaxSup2. More... | |
| #define | XSYSMONPSU_MAX_SUP3_OFFSET 0x0000008CU |
| Register: XSysmonPsuMaxSup3. More... | |
| #define | XSYSMONPSU_MIN_TEMP_OFFSET 0x00000090U |
| Register: XSysmonPsuMinTemp. More... | |
| #define | XSYSMONPSU_MIN_SUP1_OFFSET 0x00000094U |
| Register: XSysmonPsuMinSup1. More... | |
| #define | XSYSMONPSU_MIN_SUP2_OFFSET 0x00000098U |
| Register: XSysmonPsuMinSup2. More... | |
| #define | XSYSMONPSU_MIN_SUP3_OFFSET 0x0000009CU |
| Register: XSysmonPsuMinSup3. More... | |
| #define | XSYSMONPSU_MAX_SUP4_OFFSET 0x000000A0U |
| Register: XSysmonPsuMaxSup4. More... | |
| #define | XSYSMONPSU_MAX_SUP5_OFFSET 0x000000A4U |
| Register: XSysmonPsuMaxSup5. More... | |
| #define | XSYSMONPSU_MAX_SUP6_OFFSET 0x000000A8U |
| Register: XSysmonPsuMaxSup6. More... | |
| #define | XSYSMONPSU_MIN_SUP4_OFFSET 0x000000B0U |
| Register: XSysmonPsuMinSup4. More... | |
| #define | XSYSMONPSU_MIN_SUP5_OFFSET 0x000000B4U |
| Register: XSysmonPsuMinSup5. More... | |
| #define | XSYSMONPSU_MIN_SUP6_OFFSET 0x000000B8U |
| Register: XSysmonPsuMinSup6. More... | |
| #define | XSYSMONPSU_STS_FLAG_OFFSET 0x000000FCU |
| Register: XSysmonPsuStsFlag. More... | |
| #define | XSYSMONPSU_CFG_REG0_OFFSET 0x00000100U |
| Register: XSysmonPsuCfgReg0. More... | |
| #define | XSYSMONPSU_CFG_REG1_OFFSET 0x00000104U |
| Register: XSysmonPsuCfgReg1. More... | |
| #define | XSYSMONPSU_CFG_REG2_OFFSET 0x00000108U |
| Register: XSysmonPsuCfgReg2. More... | |
| #define | XSYSMONPSU_SEQ_CH0_OFFSET 0x00000120U |
| Register: XSysmonPsuSeqCh0. More... | |
| #define | XSYSMONPSU_SEQ_CH1_OFFSET 0x00000124U |
| Register: XSysmonPsuSeqCh1. More... | |
| #define | XSYSMONPSU_SEQ_AVERAGE0_OFFSET 0x00000128U |
| Register: XSysmonPsuSeqAverage0. More... | |
| #define | XSYSMONPSU_SEQ_AVERAGE1_OFFSET 0x0000012CU |
| Register: XSysmonPsuSeqAverage1. More... | |
| #define | XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET 0x00000130U |
| Register: XSysmonPsuSeqInputMde0. More... | |
| #define | XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET 0x00000134U |
| Register: XSysmonPsuSeqInputMde1. More... | |
| #define | XSYSMONPSU_SEQ_ACQ0_OFFSET 0x00000138U |
| Register: XSysmonPsuSeqAcq0. More... | |
| #define | XSYSMONPSU_SEQ_ACQ1_OFFSET 0x0000013CU |
| Register: XSysmonPsuSeqAcq1. More... | |
| #define | XSYSMONPSU_ALRM_TEMP_UPR_OFFSET 0x00000140U |
| Register: XSysmonPsuAlrmTempUpr. More... | |
| #define | XSYSMONPSU_ALRM_SUP1_UPR_OFFSET 0x00000144U |
| Register: XSysmonPsuAlrmSup1Upr. More... | |
| #define | XSYSMONPSU_ALRM_SUP2_UPR_OFFSET 0x00000148U |
| Register: XSysmonPsuAlrmSup2Upr. More... | |
| #define | XSYSMONPSU_ALRM_OT_UPR_OFFSET 0x0000014CU |
| Register: XSysmonPsuAlrmOtUpr. More... | |
| #define | XSYSMONPSU_ALRM_TEMP_LWR_OFFSET 0x00000150U |
| Register: XSysmonPsuAlrmTempLwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP1_LWR_OFFSET 0x00000154U |
| Register: XSysmonPsuAlrmSup1Lwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP2_LWR_OFFSET 0x00000158U |
| Register: XSysmonPsuAlrmSup2Lwr. More... | |
| #define | XSYSMONPSU_ALRM_OT_LWR_OFFSET 0x0000015CU |
| Register: XSysmonPsuAlrmOtLwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP3_UPR_OFFSET 0x00000160U |
| Register: XSysmonPsuAlrmSup3Upr. More... | |
| #define | XSYSMONPSU_ALRM_SUP4_UPR_OFFSET 0x00000164U |
| Register: XSysmonPsuAlrmSup4Upr. More... | |
| #define | XSYSMONPSU_ALRM_SUP5_UPR_OFFSET 0x00000168U |
| Register: XSysmonPsuAlrmSup5Upr. More... | |
| #define | XSYSMONPSU_ALRM_SUP6_UPR_OFFSET 0x0000016CU |
| Register: XSysmonPsuAlrmSup6Upr. More... | |
| #define | XSYSMONPSU_ALRM_SUP3_LWR_OFFSET 0x00000170U |
| Register: XSysmonPsuAlrmSup3Lwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP4_LWR_OFFSET 0x00000174U |
| Register: XSysmonPsuAlrmSup4Lwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP5_LWR_OFFSET 0x00000178U |
| Register: XSysmonPsuAlrmSup5Lwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP6_LWR_OFFSET 0x0000017CU |
| Register: XSysmonPsuAlrmSup6Lwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP7_UPR_OFFSET 0x00000180U |
| Register: XSysmonPsuAlrmSup7Upr. More... | |
| #define | XSYSMONPSU_ALRM_SUP8_UPR_OFFSET 0x00000184U |
| Register: XSysmonPsuAlrmSup8Upr. More... | |
| #define | XSYSMONPSU_ALRM_SUP9_UPR_OFFSET 0x00000188U |
| Register: XSysmonPsuAlrmSup9Upr. More... | |
| #define | XSYSMONPSU_ALRM_SUP10_UPR_OFFSET 0x0000018CU |
| Register: XSysmonPsuAlrmSup10Upr. More... | |
| #define | XSYSMONPSU_ALRM_VCCAMS_UPR_OFFSET 0x00000190U |
| Register: XSysmonPsuAlrmVccamsUpr. More... | |
| #define | XSYSMONPSU_ALRM_TREMOTE_UPR_OFFSET 0x00000194U |
| Register: XSysmonPsuAlrmTremoteUpr. More... | |
| #define | XSYSMONPSU_ALRM_SUP7_LWR_OFFSET 0x000001A0U |
| Register: XSysmonPsuAlrmSup7Lwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP8_LWR_OFFSET 0x000001A4U |
| Register: XSysmonPsuAlrmSup8Lwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP9_LWR_OFFSET 0x000001A8U |
| Register: XSysmonPsuAlrmSup9Lwr. More... | |
| #define | XSYSMONPSU_ALRM_SUP10_LWR_OFFSET 0x000001ACU |
| Register: XSysmonPsuAlrmSup10Lwr. More... | |
| #define | XSYSMONPSU_ALRM_VCCAMS_LWR_OFFSET 0x000001B0U |
| Register: XSysmonPsuAlrmVccamsLwr. More... | |
| #define | XSYSMONPSU_ALRM_TREMOTE_LWR_OFFSET 0x000001B4U |
| Register: XSysmonPsuAlrmTremoteLwr. More... | |
| #define | XSYSMONPSU_SEQ_ACQ2_OFFSET 0x000001E4U |
| Register: XSysmonPsuSeqAcq2. More... | |
| #define | XSYSMONPSU_SUP7_OFFSET 0x00000200U |
| Register: XSysmonPsuSup7. More... | |
| #define | XSYSMONPSU_SUP8_OFFSET 0x00000204U |
| Register: XSysmonPsuSup8. More... | |
| #define | XSYSMONPSU_SUP9_OFFSET 0x00000208U |
| Register: XSysmonPsuSup9. More... | |
| #define | XSYSMONPSU_SUP10_OFFSET 0x0000020CU |
| Register: XSysmonPsuSup10. More... | |
| #define | XSYSMONPSU_VCCAMS_OFFSET 0x00000210U |
| Register: XSysmonPsuVccams. More... | |
| #define | XSYSMONPSU_TEMP_REMTE_OFFSET 0x00000214U |
| Register: XSysmonPsuTempRemte. More... | |
| #define | XSYSMONPSU_MAX_SUP7_OFFSET 0x00000280U |
| Register: XSysmonPsuMaxSup7. More... | |
| #define | XSYSMONPSU_MAX_SUP8_OFFSET 0x00000284U |
| Register: XSysmonPsuMaxSup8. More... | |
| #define | XSYSMONPSU_MAX_SUP9_OFFSET 0x00000288U |
| Register: XSysmonPsuMaxSup9. More... | |
| #define | XSYSMONPSU_MAX_SUP10_OFFSET 0x0000028CU |
| Register: XSysmonPsuMaxSup10. More... | |
| #define | XSYSMONPSU_MAX_VCCAMS_OFFSET 0x00000290U |
| Register: XSysmonPsuMaxVccams. More... | |
| #define | XSYSMONPSU_MAX_TEMP_REMTE_OFFSET 0x00000294U |
| Register: XSysmonPsuMaxTempRemte. More... | |
| #define | XSYSMONPSU_MIN_SUP7_OFFSET 0x000002A0U |
| Register: XSysmonPsuMinSup7. More... | |
| #define | XSYSMONPSU_MIN_SUP8_OFFSET 0x000002A4U |
| Register: XSysmonPsuMinSup8. More... | |
| #define | XSYSMONPSU_MIN_SUP9_OFFSET 0x000002A8U |
| Register: XSysmonPsuMinSup9. More... | |
| #define | XSYSMONPSU_MIN_SUP10_OFFSET 0x000002ACU |
| Register: XSysmonPsuMinSup10. More... | |
| #define | XSYSMONPSU_MIN_VCCAMS_OFFSET 0x000002B0U |
| Register: XSysmonPsuMinVccams. More... | |
| #define | XSYSMONPSU_MIN_TEMP_REMTE_OFFSET 0x000002B4U |
| Register: XSysmonPsuMinTempRemte. More... | |
| #define | XSysmonPsu_ReadReg(RegisterAddr) Xil_In32(RegisterAddr) |
| This macro reads the given register. More... | |
| #define | XSysmonPsu_WriteReg(RegisterAddr, Data) Xil_Out32(RegisterAddr, (u32)(Data)) |
| This macro writes the given register. More... | |
| #define XSYSMONPSU_ALRM_OT_LWR_OFFSET 0x0000015CU |
Register: XSysmonPsuAlrmOtLwr.
| #define XSYSMONPSU_ALRM_OT_UPR_OFFSET 0x0000014CU |
Register: XSysmonPsuAlrmOtUpr.
| #define XSYSMONPSU_ALRM_SUP10_LWR_OFFSET 0x000001ACU |
Register: XSysmonPsuAlrmSup10Lwr.
| #define XSYSMONPSU_ALRM_SUP10_UPR_OFFSET 0x0000018CU |
Register: XSysmonPsuAlrmSup10Upr.
| #define XSYSMONPSU_ALRM_SUP1_LWR_OFFSET 0x00000154U |
Register: XSysmonPsuAlrmSup1Lwr.
| #define XSYSMONPSU_ALRM_SUP1_UPR_OFFSET 0x00000144U |
Register: XSysmonPsuAlrmSup1Upr.
| #define XSYSMONPSU_ALRM_SUP2_LWR_OFFSET 0x00000158U |
Register: XSysmonPsuAlrmSup2Lwr.
| #define XSYSMONPSU_ALRM_SUP2_UPR_OFFSET 0x00000148U |
Register: XSysmonPsuAlrmSup2Upr.
| #define XSYSMONPSU_ALRM_SUP3_LWR_OFFSET 0x00000170U |
Register: XSysmonPsuAlrmSup3Lwr.
Referenced by SysMonPsuLowLevelExample().
| #define XSYSMONPSU_ALRM_SUP3_UPR_OFFSET 0x00000160U |
Register: XSysmonPsuAlrmSup3Upr.
Referenced by SysMonPsuLowLevelExample().
| #define XSYSMONPSU_ALRM_SUP4_LWR_OFFSET 0x00000174U |
Register: XSysmonPsuAlrmSup4Lwr.
| #define XSYSMONPSU_ALRM_SUP4_UPR_OFFSET 0x00000164U |
Register: XSysmonPsuAlrmSup4Upr.
| #define XSYSMONPSU_ALRM_SUP5_LWR_OFFSET 0x00000178U |
Register: XSysmonPsuAlrmSup5Lwr.
| #define XSYSMONPSU_ALRM_SUP5_UPR_OFFSET 0x00000168U |
Register: XSysmonPsuAlrmSup5Upr.
| #define XSYSMONPSU_ALRM_SUP6_LWR_OFFSET 0x0000017CU |
Register: XSysmonPsuAlrmSup6Lwr.
| #define XSYSMONPSU_ALRM_SUP6_UPR_OFFSET 0x0000016CU |
Register: XSysmonPsuAlrmSup6Upr.
| #define XSYSMONPSU_ALRM_SUP7_LWR_OFFSET 0x000001A0U |
Register: XSysmonPsuAlrmSup7Lwr.
| #define XSYSMONPSU_ALRM_SUP7_UPR_OFFSET 0x00000180U |
Register: XSysmonPsuAlrmSup7Upr.
| #define XSYSMONPSU_ALRM_SUP8_LWR_OFFSET 0x000001A4U |
Register: XSysmonPsuAlrmSup8Lwr.
| #define XSYSMONPSU_ALRM_SUP8_UPR_OFFSET 0x00000184U |
Register: XSysmonPsuAlrmSup8Upr.
| #define XSYSMONPSU_ALRM_SUP9_LWR_OFFSET 0x000001A8U |
Register: XSysmonPsuAlrmSup9Lwr.
| #define XSYSMONPSU_ALRM_SUP9_UPR_OFFSET 0x00000188U |
Register: XSysmonPsuAlrmSup9Upr.
| #define XSYSMONPSU_ALRM_TEMP_LWR_OFFSET 0x00000150U |
Register: XSysmonPsuAlrmTempLwr.
| #define XSYSMONPSU_ALRM_TEMP_UPR_OFFSET 0x00000140U |
Register: XSysmonPsuAlrmTempUpr.
Referenced by SysMonPsuLowLevelExample(), XSysMonPsu_GetAlarmThreshold(), and XSysMonPsu_SetAlarmThreshold().
| #define XSYSMONPSU_ALRM_TREMOTE_LWR_OFFSET 0x000001B4U |
Register: XSysmonPsuAlrmTremoteLwr.
| #define XSYSMONPSU_ALRM_TREMOTE_UPR_OFFSET 0x00000194U |
Register: XSysmonPsuAlrmTremoteUpr.
| #define XSYSMONPSU_ALRM_VCCAMS_LWR_OFFSET 0x000001B0U |
Register: XSysmonPsuAlrmVccamsLwr.
| #define XSYSMONPSU_ALRM_VCCAMS_UPR_OFFSET 0x00000190U |
Register: XSysmonPsuAlrmVccamsUpr.
| #define XSYSMONPSU_BASEADDR 0xFFA50000U |
XSysmonPsu Base Address.
| #define XSYSMONPSU_CAL_ADC_BIPLR_OFF_OFFSET 0x00000024U |
Register: XSysmonPsuCalAdcBiplrOff.
| #define XSYSMONPSU_CAL_GAIN_ERR_OFFSET 0x00000028U |
Register: XSysmonPsuCalGainErr.
| #define XSYSMONPSU_CAL_SUP_OFF_OFFSET 0x00000020U |
Register: XSysmonPsuCalSupOff.
Referenced by XSysMonPsu_GetCalibCoefficient().
| #define XSYSMONPSU_CFG_REG0_OFFSET 0x00000100U |
Register: XSysmonPsuCfgReg0.
Referenced by SysMonPsuLowLevelExample(), XSysMonPsu_GetAvg(), XSysMonPsu_GetExtenalMux(), XSysMonPsu_GetSequencerEvent(), XSysMonPsu_SetAvg(), XSysMonPsu_SetExtenalMux(), XSysMonPsu_SetSequencerEvent(), and XSysMonPsu_SetSingleChParams().
| #define XSYSMONPSU_CFG_REG1_OFFSET 0x00000104U |
Register: XSysmonPsuCfgReg1.
Referenced by SysMonPsuLowLevelExample(), XSysMonPsu_GetAlarmEnables(), XSysMonPsu_GetSequencerMode(), XSysMonPsu_SetAlarmEnables(), and XSysMonPsu_SetSequencerMode().
| #define XSYSMONPSU_CFG_REG2_OFFSET 0x00000108U |
Register: XSysmonPsuCfgReg2.
Referenced by XSysMonPsu_GetAdcClkDivisor(), XSysMonPsu_SetAdcClkDivisor(), and XSysMonPsu_UpdateAdcClkDivisor().
| #define XSYSMONPSU_DDRPHY_ATO_OFFSET 0x0000008CU |
Register: XSysmonPsuDdrphyAto.
| #define XSYSMONPSU_DDRPHY_VREF_OFFSET 0x00000088U |
Register: XSysmonPsuDdrphyVref.
| #define XSYSMONPSU_IDR_0_OFFSET 0x00000028U |
Register: XSysmonPsuIdr0.
Referenced by XSysMonPsu_IntrDisable().
| #define XSYSMONPSU_IDR_1_OFFSET 0x0000002CU |
Register: XSysmonPsuIdr1.
Referenced by XSysMonPsu_IntrDisable().
| #define XSYSMONPSU_IER_0_OFFSET 0x00000020U |
Register: XSysmonPsuIer0.
Referenced by XSysMonPsu_IntrEnable().
| #define XSYSMONPSU_IER_1_OFFSET 0x00000024U |
Register: XSysmonPsuIer1.
Referenced by XSysMonPsu_IntrEnable().
| #define XSYSMONPSU_IMR_0_OFFSET 0x00000018U |
Register: XSysmonPsuImr0.
Referenced by XSysMonPsu_IntrGetEnabled().
| #define XSYSMONPSU_IMR_1_OFFSET 0x0000001CU |
Register: XSysmonPsuImr1.
Referenced by XSysMonPsu_IntrGetEnabled().
| #define XSYSMONPSU_ISR_0_OFFSET 0x00000010U |
Register: XSysmonPsuIsr0.
Referenced by SysMonPsuLowLevelExample(), XSysMonPsu_IntrClear(), and XSysMonPsu_IntrGetStatus().
| #define XSYSMONPSU_ISR_1_OFFSET 0x00000014U |
Register: XSysmonPsuIsr1.
Referenced by SysMonPsuAMSExample(), SysMonPsuLowLevelExample(), XSysMonPsu_IntrClear(), and XSysMonPsu_IntrGetStatus().
| #define XSYSMONPSU_MAX_SUP10_OFFSET 0x0000028CU |
Register: XSysmonPsuMaxSup10.
| #define XSYSMONPSU_MAX_SUP1_OFFSET 0x00000084U |
Register: XSysmonPsuMaxSup1.
| #define XSYSMONPSU_MAX_SUP2_OFFSET 0x00000088U |
Register: XSysmonPsuMaxSup2.
| #define XSYSMONPSU_MAX_SUP3_OFFSET 0x0000008CU |
Register: XSysmonPsuMaxSup3.
Referenced by SysMonPsuLowLevelExample().
| #define XSYSMONPSU_MAX_SUP4_OFFSET 0x000000A0U |
Register: XSysmonPsuMaxSup4.
| #define XSYSMONPSU_MAX_SUP5_OFFSET 0x000000A4U |
Register: XSysmonPsuMaxSup5.
| #define XSYSMONPSU_MAX_SUP6_OFFSET 0x000000A8U |
Register: XSysmonPsuMaxSup6.
| #define XSYSMONPSU_MAX_SUP7_OFFSET 0x00000280U |
Register: XSysmonPsuMaxSup7.
| #define XSYSMONPSU_MAX_SUP8_OFFSET 0x00000284U |
Register: XSysmonPsuMaxSup8.
| #define XSYSMONPSU_MAX_SUP9_OFFSET 0x00000288U |
Register: XSysmonPsuMaxSup9.
| #define XSYSMONPSU_MAX_TEMP_OFFSET 0x00000080U |
Register: XSysmonPsuMaxTemp.
Referenced by SysMonPsuLowLevelExample().
| #define XSYSMONPSU_MAX_TEMP_REMTE_OFFSET 0x00000294U |
Register: XSysmonPsuMaxTempRemte.
| #define XSYSMONPSU_MAX_VCCAMS_OFFSET 0x00000290U |
Register: XSysmonPsuMaxVccams.
| #define XSYSMONPSU_MIN_SUP10_OFFSET 0x000002ACU |
Register: XSysmonPsuMinSup10.
| #define XSYSMONPSU_MIN_SUP1_OFFSET 0x00000094U |
Register: XSysmonPsuMinSup1.
| #define XSYSMONPSU_MIN_SUP2_OFFSET 0x00000098U |
Register: XSysmonPsuMinSup2.
| #define XSYSMONPSU_MIN_SUP3_OFFSET 0x0000009CU |
Register: XSysmonPsuMinSup3.
Referenced by SysMonPsuLowLevelExample().
| #define XSYSMONPSU_MIN_SUP4_OFFSET 0x000000B0U |
Register: XSysmonPsuMinSup4.
| #define XSYSMONPSU_MIN_SUP5_OFFSET 0x000000B4U |
Register: XSysmonPsuMinSup5.
| #define XSYSMONPSU_MIN_SUP6_OFFSET 0x000000B8U |
Register: XSysmonPsuMinSup6.
| #define XSYSMONPSU_MIN_SUP7_OFFSET 0x000002A0U |
Register: XSysmonPsuMinSup7.
| #define XSYSMONPSU_MIN_SUP8_OFFSET 0x000002A4U |
Register: XSysmonPsuMinSup8.
| #define XSYSMONPSU_MIN_SUP9_OFFSET 0x000002A8U |
Register: XSysmonPsuMinSup9.
| #define XSYSMONPSU_MIN_TEMP_OFFSET 0x00000090U |
Register: XSysmonPsuMinTemp.
Referenced by SysMonPsuLowLevelExample().
| #define XSYSMONPSU_MIN_TEMP_REMTE_OFFSET 0x000002B4U |
Register: XSysmonPsuMinTempRemte.
| #define XSYSMONPSU_MIN_VCCAMS_OFFSET 0x000002B0U |
Register: XSysmonPsuMinVccams.
| #define XSYSMONPSU_MISC_OFFSET 0x00000000U |
Register: XSysmonPsuMisc.
| #define XSYSMONPSU_MON_STS_OFFSET 0x00000050U |
Register: XSysmonPsuMonSts.
Referenced by XSysMonPsu_GetMonitorStatus(), and XSysMonPsu_GetStatus().
| #define XSYSMONPSU_PL_SYSMON_CSTS_OFFSET 0x00000044U |
Register: XSysmonPsuPlSysmonSts.
Referenced by XSysMonPsu_CfgInitialize().
| #define XSYSMONPSU_PS_SYSMON_CSTS_OFFSET 0x00000040U |
Register: XSysmonPsuPsSysmonSts.
Referenced by XSysMonPsu_CfgInitialize(), XSysMonPsu_SetPSAutoConversion(), and XSysMonPsu_StartAdcConversion().
| #define XSYSMONPSU_PSGT_AT0_OFFSET 0x00000090U |
Register: XSysmonPsuPsgtAt0.
| #define XSYSMONPSU_PSGT_AT1_OFFSET 0x00000094U |
Register: XSysmonPsuPsgtAt1.
| #define XSysmonPsu_ReadReg | ( | RegisterAddr | ) | Xil_In32(RegisterAddr) |
This macro reads the given register.
| RegisterAddr | is the register address in the address space of the SYSMONPSU device. |
Referenced by SysMonPsuLowLevelExample(), XSysMonPsu_CfgInitialize(), XSysMonPsu_GetAdcClkDivisor(), XSysMonPsu_GetAdcData(), XSysMonPsu_GetAlarmEnables(), XSysMonPsu_GetAlarmThreshold(), XSysMonPsu_GetAvg(), XSysMonPsu_GetCalibCoefficient(), XSysMonPsu_GetExtenalMux(), XSysMonPsu_GetMinMaxMeasurement(), XSysMonPsu_GetMonitorStatus(), XSysMonPsu_GetSeqAcqTime(), XSysMonPsu_GetSeqAvgEnables(), XSysMonPsu_GetSeqChEnables(), XSysMonPsu_GetSeqInputMode(), XSysMonPsu_GetSequencerEvent(), XSysMonPsu_GetSequencerMode(), XSysMonPsu_GetStatus(), XSysMonPsu_IntrClear(), XSysMonPsu_IntrDisable(), XSysMonPsu_IntrEnable(), XSysMonPsu_IntrGetEnabled(), XSysMonPsu_IntrGetStatus(), XSysMonPsu_Reset(), XSysMonPsu_SetAdcClkDivisor(), XSysMonPsu_SetAlarmEnables(), XSysMonPsu_SetAvg(), XSysMonPsu_SetExtenalMux(), XSysMonPsu_SetPSAutoConversion(), XSysMonPsu_SetSequencerEvent(), XSysMonPsu_SetSequencerMode(), XSysMonPsu_SetSingleChParams(), XSysMonPsu_StartAdcConversion(), and XSysMonPsu_UpdateAdcClkDivisor().
| #define XSYSMONPSU_RESERVE0_OFFSET 0x00000098U |
Register: XSysmonPsuReserve0.
| #define XSYSMONPSU_RESERVE1_OFFSET 0x0000009CU |
Register: XSysmonPsuReserve1.
| #define XSYSMONPSU_SEQ_ACQ0_OFFSET 0x00000138U |
Register: XSysmonPsuSeqAcq0.
Referenced by XSysMonPsu_GetSeqAcqTime(), and XSysMonPsu_SetSeqAcqTime().
| #define XSYSMONPSU_SEQ_ACQ1_OFFSET 0x0000013CU |
Register: XSysmonPsuSeqAcq1.
Referenced by XSysMonPsu_GetSeqAcqTime(), and XSysMonPsu_SetSeqAcqTime().
| #define XSYSMONPSU_SEQ_ACQ2_OFFSET 0x000001E4U |
Register: XSysmonPsuSeqAcq2.
Referenced by XSysMonPsu_GetSeqAcqTime(), and XSysMonPsu_SetSeqAcqTime().
| #define XSYSMONPSU_SEQ_AVERAGE0_OFFSET 0x00000128U |
Register: XSysmonPsuSeqAverage0.
Referenced by SysMonPsuLowLevelExample(), XSysMonPsu_GetSeqAvgEnables(), and XSysMonPsu_SetSeqAvgEnables().
| #define XSYSMONPSU_SEQ_AVERAGE1_OFFSET 0x0000012CU |
Register: XSysmonPsuSeqAverage1.
Referenced by XSysMonPsu_GetSeqAvgEnables(), and XSysMonPsu_SetSeqAvgEnables().
| #define XSYSMONPSU_SEQ_CH0_OFFSET 0x00000120U |
Register: XSysmonPsuSeqCh0.
Referenced by SysMonPsuLowLevelExample(), XSysMonPsu_GetSeqChEnables(), and XSysMonPsu_SetSeqChEnables().
| #define XSYSMONPSU_SEQ_CH1_OFFSET 0x00000124U |
Register: XSysmonPsuSeqCh1.
Referenced by XSysMonPsu_GetSeqChEnables(), and XSysMonPsu_SetSeqChEnables().
| #define XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET 0x00000130U |
Register: XSysmonPsuSeqInputMde0.
Referenced by XSysMonPsu_GetSeqInputMode(), and XSysMonPsu_SetSeqInputMode().
| #define XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET 0x00000134U |
Register: XSysmonPsuSeqInputMde1.
Referenced by XSysMonPsu_GetSeqInputMode(), and XSysMonPsu_SetSeqInputMode().
| #define XSYSMONPSU_STS_FLAG_OFFSET 0x000000FCU |
Register: XSysmonPsuStsFlag.
Referenced by SysMonPsuLowLevelExample().
| #define XSYSMONPSU_SUP10_OFFSET 0x0000020CU |
Register: XSysmonPsuSup10.
| #define XSYSMONPSU_SUP1_OFFSET 0x00000004U |
Register: XSysmonPsuSup1.
| #define XSYSMONPSU_SUP2_OFFSET 0x00000008U |
Register: XSysmonPsuSup2.
| #define XSYSMONPSU_SUP3_OFFSET 0x00000018U |
Register: XSysmonPsuSup3.
Referenced by SysMonPsuLowLevelExample().
| #define XSYSMONPSU_SUP4_OFFSET 0x00000034U |
Register: XSysmonPsuSup4.
| #define XSYSMONPSU_SUP5_OFFSET 0x00000038U |
Register: XSysmonPsuSup5.
| #define XSYSMONPSU_SUP6_OFFSET 0x0000003CU |
Register: XSysmonPsuSup6.
| #define XSYSMONPSU_SUP7_OFFSET 0x00000200U |
Register: XSysmonPsuSup7.
| #define XSYSMONPSU_SUP8_OFFSET 0x00000204U |
Register: XSysmonPsuSup8.
| #define XSYSMONPSU_SUP9_OFFSET 0x00000208U |
Register: XSysmonPsuSup9.
| #define XSYSMONPSU_TEMP_OFFSET 0x00000000U |
Register: XSysmonPsuTemp.
Referenced by SysMonPsuLowLevelExample().
| #define XSYSMONPSU_TEMP_REMTE_OFFSET 0x00000214U |
Register: XSysmonPsuTempRemte.
| #define XSYSMONPSU_VAUX00_OFFSET 0x00000040U |
Register: XSysmonPsuVaux00.
| #define XSYSMONPSU_VAUX01_OFFSET 0x00000044U |
Register: XSysmonPsuVaux01.
| #define XSYSMONPSU_VAUX02_OFFSET 0x00000048U |
Register: XSysmonPsuVaux02.
| #define XSYSMONPSU_VAUX03_OFFSET 0x0000004CU |
Register: XSysmonPsuVaux03.
| #define XSYSMONPSU_VAUX04_OFFSET 0x00000050U |
Register: XSysmonPsuVaux04.
| #define XSYSMONPSU_VAUX05_OFFSET 0x00000054U |
Register: XSysmonPsuVaux05.
| #define XSYSMONPSU_VAUX06_OFFSET 0x00000058U |
Register: XSysmonPsuVaux06.
| #define XSYSMONPSU_VAUX07_OFFSET 0x0000005CU |
Register: XSysmonPsuVaux07.
| #define XSYSMONPSU_VAUX08_OFFSET 0x00000060U |
Register: XSysmonPsuVaux08.
| #define XSYSMONPSU_VAUX09_OFFSET 0x00000064U |
Register: XSysmonPsuVaux09.
| #define XSYSMONPSU_VAUX0A_OFFSET 0x00000068U |
Register: XSysmonPsuVaux0a.
| #define XSYSMONPSU_VAUX0B_OFFSET 0x0000006CU |
Register: XSysmonPsuVaux0b.
| #define XSYSMONPSU_VAUX0C_OFFSET 0x00000070U |
Register: XSysmonPsuVaux0c.
| #define XSYSMONPSU_VAUX0D_OFFSET 0x00000074U |
Register: XSysmonPsuVaux0d.
| #define XSYSMONPSU_VAUX0E_OFFSET 0x00000078U |
Register: XSysmonPsuVaux0e.
| #define XSYSMONPSU_VAUX0F_OFFSET 0x0000007CU |
Register: XSysmonPsuVaux0f.
| #define XSYSMONPSU_VCC_PSBATT_OFFSET 0x00000074U |
Register: XSysmonPsuVccPsbatt.
| #define XSYSMONPSU_VCC_PSDDRPLL_OFFSET 0x00000084U |
Register: XSysmonPsuVccPsddrpll.
| #define XSYSMONPSU_VCC_PSPLL0_OFFSET 0x00000060U |
Register: XSysmonPsuVccPspll0.
| #define XSYSMONPSU_VCC_PSPLL1_OFFSET 0x00000064U |
Register: XSysmonPsuVccPspll1.
| #define XSYSMONPSU_VCC_PSPLL2_OFFSET 0x00000068U |
Register: XSysmonPsuVccPspll2.
| #define XSYSMONPSU_VCC_PSPLL3_OFFSET 0x0000006CU |
Register: XSysmonPsuVccPspll3.
| #define XSYSMONPSU_VCC_PSPLL4_OFFSET 0x00000070U |
Register: XSysmonPsuVccPspll4.
| #define XSYSMONPSU_VCCAMS_OFFSET 0x00000210U |
Register: XSysmonPsuVccams.
| #define XSYSMONPSU_VCCAUX_OFFSET 0x00000080U |
Register: XSysmonPsuVccaux.
| #define XSYSMONPSU_VCCBRAM_OFFSET 0x0000007CU |
Register: XSysmonPsuVccbram.
| #define XSYSMONPSU_VCCINT_OFFSET 0x00000078U |
Register: XSysmonPsuVccint.
| #define XSYSMONPSU_VP_VN_OFFSET 0x0000000CU |
Register: XSysmonPsuVpVn.
Referenced by SysMonPsuLowLevelExample(), and XSysMonPsu_Reset().
| #define XSYSMONPSU_VREFN_OFFSET 0x00000014U |
Register: XSysmonPsuVrefn.
| #define XSYSMONPSU_VREFP_OFFSET 0x00000010U |
Register: XSysmonPsuVrefp.
| #define XSysmonPsu_WriteReg | ( | RegisterAddr, | |
| Data | |||
| ) | Xil_Out32(RegisterAddr, (u32)(Data)) |
This macro writes the given register.
| RegisterAddr | is the register address in the address space of the SYSMONPSU device. |
| Data | is the 32-bit value to write to the register. |
Referenced by SysMonPsuLowLevelExample(), XSysMonPsu_IntrClear(), XSysMonPsu_IntrDisable(), XSysMonPsu_IntrEnable(), XSysMonPsu_Reset(), XSysMonPsu_SetAdcClkDivisor(), XSysMonPsu_SetAlarmEnables(), XSysMonPsu_SetAlarmThreshold(), XSysMonPsu_SetAvg(), XSysMonPsu_SetExtenalMux(), XSysMonPsu_SetPSAutoConversion(), XSysMonPsu_SetSeqAcqTime(), XSysMonPsu_SetSeqAvgEnables(), XSysMonPsu_SetSeqChEnables(), XSysMonPsu_SetSeqInputMode(), XSysMonPsu_SetSequencerEvent(), XSysMonPsu_SetSequencerMode(), XSysMonPsu_SetSingleChParams(), XSysMonPsu_StartAdcConversion(), and XSysMonPsu_UpdateAdcClkDivisor().