uartlite
Vitis Drivers API Documentation
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This component contains the implementation of the XUartLite component which is the driver for the Xilinx UART Lite device. This UART is a minimal hardware implementation with minimal features. Most of the features, including baud rate, parity, and number of data bits are only configurable when the hardware device is built, rather than at run time by software.
The device has 16 byte transmit and receive FIFOs and supports interrupts. The device does not have any way to disable the receiver such that the receive FIFO may contain unwanted data. The FIFOs are not flushed when the driver is initialized, but a function is provided to allow the user to reset the FIFOs if desired.
The driver defaults to no interrupts at initialization such that interrupts must be enabled if desired. An interrupt is generated when the transmit FIFO transitions from having data to being empty or when any data is contained in the receive FIFO.
In order to use interrupts, it's necessary for the user to connect the driver interrupt handler, XUartLite_InterruptHandler, to the interrupt system of the application. This function does not save and restore the processor context such that the user must provide it. Send and receive handlers may be set for the driver such that the handlers are called when transmit and receive interrupts occur. The handlers are called from interrupt context and are designed to allow application specific processing to be performed.
The functions, XUartLite_Send and XUartLite_Recv, are provided in the driver to allow data to be sent and received. They are designed to be used in polled or interrupt modes.
The driver provides a status for each received byte indicating any parity frame or overrun error. The driver provides statistics which allow visibility into these errors.
Initialization & Configuration
The XUartLite_Config structure is used by the driver to configure itself. This configuration structure is typically created by the tool-chain based on HW build properties.
To support multiple runtime loading and initialization strategies employed by various operating systems, the driver instance can be initialized in one of the following ways:
RTOS Independence
This driver is intended to be RTOS and processor independent. It works with physical addresses only. Any needs for dynamic memory management, threads or thread mutual exclusion, virtual memory, or cache control must be satisfied by the layer above this driver.
The driver is partitioned such that a minimal implementation may be used. More features require additional files to be linked in.
MODIFICATION HISTORY:
Ver Who Date Changes
1.00a ecm 08/31/01 First release 1.00b jhl 02/21/02 Repartitioned the driver for smaller files 1.01a jvb 12/14/05 I separated dependency on the static config table and xparameters.h from the driver initialization by moving _Initialize and _LookupConfig to _sinit.c. I also added the new _CfgInitialize routine. 1.02a rpm 02/14/07 Added check for outstanding transmission before calling the send callback (avoids extraneous callback invocations) in interrupt service routine. 1.12a mta 03/31/07 Updated to new coding conventions 1.13a sv 01/21/08 Updated driver to support access through DCR bus 1.14a sdm 08/22/08 Removed support for static interrupt handlers from the MDD file 1.14a sdm 09/26/08 Updated code to avoid race condition in XUartLite_SendBuffer 2.00a ktn 10/20/09 Updated to use HAL Processor APIs. The macros have been renamed to remove _m from the name. XUartLite_mClearStats macro is removed and XUartLite_ClearStats function should be used in its place. 2.01a adk 18/04/13 Updated the code to avoid unused variable warnings when compiling with the -Wextra -Wall flags In the file xuartlite.c. CR:704999. Added notes for CR 710483 that the XUL_FIFO_SIZE is not used in the driver. This is the size of the FIFO for Transmit/Receive FIFOs which cannot be changed. 3.0 adk 17/12/13 Fixed CR:741186,761863 Changes are made in the file xuartlite_selftest.c 3.0 adk 19/12/13 Update the driver as per new TCL API's 3.1 nsk 21/07/15 Updated XUartLite_ReceiveBuffer function in xuartlite.c to update the receive data into user buffer in critical region.CR#865787. 3.2 sk 11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425. Changed the prototype of XUartLite_CfgInitialize API. ms 01/23/17 Added xil_printf statement in main function for all examples to ensure that "Successfully ran" and "Failed" strings are available in all examples. This is a fix for CR-965028. ms 03/17/17 Added readme.txt file in examples folder for doxygen generation. 3.3 sne 09/09/19 Updated driver tcl file for supporting pl and ps ip's. 3.3 sne 09/13/19 Updated driver tcl file for mdm & tmr_sem ip's. 3.7 adk 31/01/22 Fix interrupt controller name in SMP designs, Changes are made in the interrupt app tcl file. 3.7 adk 14/02/22 When generating peripheral tests for TMR subsystem based designs don't pull the driver examples when uartlite is configured as a TMR SEM fix for CR-1121291, changes are made in the uartlite_tapp.tcl file. 3.9 ht 07/18/23 Fixed GCC warnings.