 |
uartlite
Vitis Drivers API Documentation
|
|
uartlite
Vitis Drivers API Documentation
|
This typedef contains configuration information for the device. More...
#include <xuartlite.h>
Data Fields | |
| char * | Name |
| Name of the device. More... | |
| UINTPTR | RegBaseAddr |
| Register base address. More... | |
| u32 | BaudRate |
| Fixed baud rate. More... | |
| u8 | UseParity |
| Parity generator enabled when TRUE. More... | |
| u8 | ParityOdd |
| Parity generated is odd when TRUE, even when FALSE. More... | |
| u8 | DataBits |
| Fixed data bits. More... | |
| u16 | IntrId |
| Bits[11:0] Interrupt-id Bits[15:12] trigger type and level flags. More... | |
| UINTPTR | IntrParent |
| Bit[0] Interrupt parent type Bit[64/32:1] Parent base address. More... | |
This typedef contains configuration information for the device.
| u32 XUartLite_Config::BaudRate |
Fixed baud rate.
| u8 XUartLite_Config::DataBits |
Fixed data bits.
| u16 XUartLite_Config::IntrId |
Bits[11:0] Interrupt-id Bits[15:12] trigger type and level flags.
Referenced by UartLiteIntrExample().
| UINTPTR XUartLite_Config::IntrParent |
Bit[0] Interrupt parent type Bit[64/32:1] Parent base address.
Referenced by UartLiteIntrExample().
| char* XUartLite_Config::Name |
Name of the device.
| u8 XUartLite_Config::ParityOdd |
Parity generated is odd when TRUE, even when FALSE.
| UINTPTR XUartLite_Config::RegBaseAddr |
Register base address.
Referenced by XUartLite_Initialize().
| u8 XUartLite_Config::UseParity |
Parity generator enabled when TRUE.
