Internal Design of Connected Component¶
In graph theory, a component, sometimes called a connected component, of an undirected graph is a subgraph in which any two vertices are connected to each other by paths, and which is connected to no additional vertices in the supergraph (from wikipedia). The API will compute the (weakly) connected component (CC) of each vertex and return a graph with the vertex value containing the lowest vertex id in the CC containing that vertex.
The implemented Connected Component is based on Breadth-first Search graph traversal equiped with one First-In-First-Out queue. The pseduo-code is shown as below:
procedure ConnectedComponent(graph_CSR) grpah_CSC := csr2csc(graph_CSR) for each vertex v in graph result(v) := -1 result(0) := 1 push node 0 into Queue while all vertexs have been labeled while Queue is not empty u := pop Queue for each edge(u, v) in both graph_CSR and graph_CSC if result(v) == -1 then result(v) := u + 1 push v into Queue end if end for end while newRoot := findNewRoot(result) push root node into Queue end while return result
Here, connected component will get all indegree and outdegree of each u when the input graph is directed. As a result, one addition csr2csc operation is required at the begining.
The input should be a directed/undirected graph in compressed sparse row (CSR) format. The result will return a vertex list with each vertex value containing the lowest vertex id in the CC.
The detail algorithm implemention is illustrated as below:
The overall diagram of this kernel is mostly same as BFS kernel except for extra input CSC graph and one mergeSort module. The mergeSort will merge and output one sorted stream for two input indegree and outdegree sorted stream. And the duplicate vertex in the single sorted output stream will be removed before entering the readRes module.
Profiling and Benchmarks¶
The connected component is validated on Alveo U250 board at 280MHz frequency. The hardware resource utilization and benchmark results are shown in the two table below.
|Total||208035 (12%)||552 (21%)||112 (9%)||7 (0%)|
|Datasets||Vertex||Edges||FPGA Time||Spark (4 threads)||Spark (8 threads)||Spark (16 threads)||Spark (32 threads)|
|Spark Time||Speed up||Spark Time||Speed up||Spark Time||Speed up||Spark Time||Speed up|