Dataflow compiler for QNN inference on FPGAs

This project is maintained by Xilinx

FINN v0.2b (beta) is released

28 Feb 2020 - Yaman Umuroglu

We’ve been working on the new version of the FINN compiler for a while, and today we are excited to announce our first beta release to give you a taste of how things are shaping up!

Here’s a quick overview of the key features:

The release (tagged 0.2b) is now available on GitHub. Currently it’s a beta release and only supports fully-connected layers in linear (non-branching) topologies, but we’re actively working on the end-to-end convolution support for the next release. Further down the road, we hope to support more advanced topologies and provide end-to-end examples for MobileNet and ResNet-50.