Types and operations for AIE vector dialect [TOC]
aievec.add
(::xilinx::aievec::AddOp)AIE vector add
AMD-specific advanced add operation that adds two 1-D vectors
with lane selection. The vector sizes are at least 256 bits.
$result =
$lhs + $rhs`.
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
xstart | ::mlir::StringAttr | string attribute |
xoffsets | ::mlir::StringAttr | string attribute |
xoffsets_hi | ::mlir::StringAttr | string attribute |
xsquare | ::mlir::StringAttr | string attribute |
zstart | ::mlir::StringAttr | string attribute |
zoffsets | ::mlir::StringAttr | string attribute |
zoffsets_hi | ::mlir::StringAttr | string attribute |
zsquare | ::mlir::StringAttr | string attribute |
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.add_elem
(::xilinx::aievec::AddElemOp)AIE vector add elem
Syntax:
operation ::= `aievec.add_elem` $lhs `,` $rhs attr-dict `:` type($result)
AMD-specific aie-ml intrinsic that allows you to perform addition operation
on all types of vectors.$result =
$lhs + $rhs`.
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.band
(::xilinx::aievec::BandOp)AIE vector bitwise and
Syntax:
operation ::= `aievec.band` $lhs `,` $rhs attr-dict `:` type($lhs) `,` type($rhs)
`,` type($result)
AMD-specific intrinsic that computes bitwise and of two vectors and returns
the result.
$result = band(
$lhs, $rhs`).
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
rhs |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
Result | Description |
---|---|
result |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
aievec.bneg
(::xilinx::aievec::BnegOp)AIE vector bitwise negation
Syntax:
operation ::= `aievec.bneg` $source attr-dict `:` type($result)
AMD-specific intrinsic that computes bitwise negation of a vector and
returns the result.
$result = bneg(
$source`).
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
source |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
Result | Description |
---|---|
result |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
aievec.bor
(::xilinx::aievec::BorOp)AIE vector bitwise or
Syntax:
operation ::= `aievec.bor` $lhs `,` $rhs attr-dict `:` type($lhs) `,` type($rhs)
`,` type($result)
AMD-specific intrinsic that computes bitwise or of two vectors and returns
the result.
$result = bor(
$lhs, $rhs`).
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
rhs |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
Result | Description |
---|---|
result |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
aievec.broadcast
(::xilinx::aievec::BroadcastOp)AIE-ML broadcast
AMD-specific broadcast intrinsic. Extract element index from vector and broadcasts its
value to all lanes of the vector.
$result = broadcast($source, $idx)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
idx | ::mlir::IntegerAttr | 8-bit signless integer attribute whose value is non-negative |
Operand | Description |
---|---|
source |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.broadcast_scalar
(::xilinx::aievec::BroadcastScalarOp)AIE-ML broadcast scalar
AMD-specific broadcast scalar intrinsic. Broadcasts input value to all vector lanes.
$result = broadcast_scalar($source)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
source |
any type |
Result | Description |
---|---|
result |
vector of any type values |
aievec.bxor
(::xilinx::aievec::BxorOp)AIE vector bitwise xor
Syntax:
operation ::= `aievec.bxor` $lhs `,` $rhs attr-dict `:` type($lhs) `,` type($rhs)
`,` type($result)
AMD-specific intrinsic that computes bitwise xor of two vectors and returns
the result.
$result = bxor(
$lhs, $rhs`).
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
rhs |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
Result | Description |
---|---|
result |
512-bit wide vector, of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer or bfloat16 type |
aievec.cast
(::xilinx::aievec::CastOp)AIE cast
AIE-ML cast intrinsic. Cast values from source data type to result data types.
$result = cast($source, isResAcc)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
isResAcc | ::mlir::BoolAttr | bool attribute |
Operand | Description |
---|---|
source |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.cmp
(::xilinx::aievec::CmpOp)AIE vector comparison
Syntax:
operation ::= `aievec.cmp` $lhs `,` $rhs ` ` `{` `pred` `=` $pred attr-dict `}` `:` type($lhs) `,` type($rhs) `,` type($result)
AMD-specific intrinsic that performs element-wise comparisonof two input vectors. The attribute predicate defines which type of comparison is performed. The following comparisons are supported:
"eq"
)"ne"
)"slt"
)"ult"
)"sle"
)"ule"
)"sgt"
)"ugt"
)"sge"
)"uge"
)Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
pred | ::mlir::StringAttr | string attribute |
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
unsigned integer |
aievec.concat
(::xilinx::aievec::ConcatOp)AIE concat
AMD-specific concat intrinsic. Concatenates two or more smaller
vectors into a bigger vector. The verifier confirms that all the
input vectors have the same number of lanes.
$result = concat($sources[0], $sources[1], ...)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
sources |
variadic of vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.ext
(::xilinx::aievec::ExtOp)AIE ext
AMD-specific vector extract intrinsic. Selects contiguous lanes from
the source vector, and transfers the data from those lanes to the
result. The lane selection is controlled by index.
$result = ext($source, $index)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
index | ::mlir::IntegerAttr | 8-bit signless integer attribute whose minimum value is 0 whose maximum value is 8 |
Operand | Description |
---|---|
source |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.ext_elem
(::xilinx::aievec::ExtElemOp)AIE extract element
Syntax:
operation ::= `aievec.ext_elem` $source `,` $index attr-dict `:` type($source) `,` type($index) `,` type($result)
AMD - specific extract element
intrinsic. Extract element determined by index from vector.
$result = ext_elem($source, $index)
.
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
source |
vector of any type values |
index |
32-bit signless integer |
Result | Description |
---|---|
result |
bfloat16 type or 32-bit float or 32-bit signless integer or 16-bit signless integer or 8-bit signless integer |
aievec.fma_conv
(::xilinx::aievec::FMAConvOp)AIE2 multiply accumulate convolution
AMD-specific multiply accumulate convolution intrinsic. Multiply accumulate convolution
operation of (M x N)matrix with (N x 1)kernel.
$result = mac_convMxN($lhs, $rhs, $acc)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
M | ::mlir::IntegerAttr | 32-bit signless integer attribute |
N | ::mlir::IntegerAttr | 32-bit signless integer attribute |
fmsub | ::mlir::BoolAttr | bool attribute |
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
acc |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.mac
(::xilinx::aievec::FMAOp)AIE vector fused multiply-add
AMD-specific multiply-add operation. It multiplies two 1-D vectors,
and adds the result to an accumulator. The vector sizes are at least
256 bits, and the left operand vector is at least twice the size of
right operand vector. For integers, the lhs and rhs are 8/16/32 bits;
the result and acc are 48-bit or 80-bit accumulator.
$result =
$lhs * $rhs + $acc`.
Note: the same operator can be used as fmsub operator by setting the
‘fmsub’ bool to true.
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
xstart | ::mlir::StringAttr | string attribute |
xoffsets | ::mlir::StringAttr | string attribute |
xoffsets_hi | ::mlir::StringAttr | string attribute |
xstep | ::mlir::StringAttr | string attribute |
xsquare | ::mlir::StringAttr | string attribute |
zstart | ::mlir::StringAttr | string attribute |
zoffsets | ::mlir::StringAttr | string attribute |
zoffsets_hi | ::mlir::StringAttr | string attribute |
zstep | ::mlir::StringAttr | string attribute |
zsquare | ::mlir::StringAttr | string attribute |
fmsub | ::mlir::BoolAttr | bool attribute |
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
acc |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.mac_elem
(::xilinx::aievec::FMAElemOp)AIE-ML element-wise vector fused multiply-add
AMD-specific multiply-add operation. It multiplies two 1-D vectors in the same channel,
and adds the result to an accumulator.
$result =
$lhs * $rhs + $acc`.
Note: the same operator can be used as fmsub operator by setting the
‘fmsub’ bool to true.
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
fmsub | ::mlir::BoolAttr | bool attribute |
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
acc |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.matmul
(::xilinx::aievec::MatMulOp)AIEML matrix-multiply and accummulate
Syntax:
operation ::= `aievec.matmul` $lhs `,` $rhs `,` $acc attr-dict `:` type($lhs) `,`
type($rhs) `into` type($acc)
AMD AIEv2-specific intrinsic that performs a matrix multiplications
between lhs
and rhs
, and accumulates the result in acc
.
Currently, this intrinsic supports the following type combinations:
lhs | rhs | Accumulator
:------------------:|:------------------:|:-----------------:
`vector<4x16xi8>` | `vector<16x8xi4>` | `vector<4x8xi32>`
`vector<4x8xi8>` | `vector<8x8xi8>` | `vector<4x8xi32>`
`vector<4x4xi16>` | `vector<4x8xi8>` | `vector<4x8xi32>`
`vector<4x2xi16>` | `vector<2x8xi16>` | `vector<4x8xi32>`
`vector<2x8xi16>` | `vector<8x8xi8>` | `vector<2x8xi64>`
`vector<4x8xi16>` | `vector<8x4xi8>` | `vector<4x4xi64>`
`vector<2x4xi16>` | `vector<4x8xi16>` | `vector<2x8xi64>`
`vector<4x4xi16>` | `vector<4x4xi16>` | `vector<4x4xi64>`
`vector<4x2xi32>` | `vector<2x4xi16>` | `vector<4x4xi64>`
`vector<4x8xbf16>` | `vector<8x4xbf16>` | `vector<4x4xf32>`
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
a vector compatible with a lhs operand of matrix-multiply and accumulate |
rhs |
a vector compatible with a rhs operand of matrix-multiply and accumulate |
acc |
a vector compatible with an accumulator of matrix-multiply and accumulate |
Result | Description |
---|---|
result |
a vector compatible with an accumulator of matrix-multiply and accumulate |
aievec.max
(::xilinx::aievec::MaxOp)AIE vector maximum
Syntax:
operation ::= `aievec.max` $lhs `,` $rhs attr-dict `:` type($result)
AMD-specific intrinsic that calculates the maximum between two input vectors.
$result = max(
$lhs, $rhs`).
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.min
(::xilinx::aievec::MinOp)AIE vector minimum
Syntax:
operation ::= `aievec.min` $lhs `,` $rhs attr-dict `:` type($result)
AMD-specific intrinsic that calculates the minimum between two input vectors.
$result = min(
$lhs, $rhs`).
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.mul
(::xilinx::aievec::MulOp)AIE vector multiply
AMD-specific multiply operation that multiplies two 1-D vectors.
The vector sizes are at least 256 bits, and the left operand vector
is at least twice the size of right operand vector. For integers, the
lhs and rhs are 8/16/32 bits, and result is a 48-bit or 80-bit accumulator.
$result =
$lhs * $rhs`.
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
xstart | ::mlir::StringAttr | string attribute |
xoffsets | ::mlir::StringAttr | string attribute |
xoffsets_hi | ::mlir::StringAttr | string attribute |
xstep | ::mlir::StringAttr | string attribute |
xsquare | ::mlir::StringAttr | string attribute |
zstart | ::mlir::StringAttr | string attribute |
zoffsets | ::mlir::StringAttr | string attribute |
zoffsets_hi | ::mlir::StringAttr | string attribute |
zstep | ::mlir::StringAttr | string attribute |
zsquare | ::mlir::StringAttr | string attribute |
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.mul_conv
(::xilinx::aievec::MulConvOp)AIE2 multiply convolution
AMD-specific multiply convolution intrinsic. Multiply convolution operation
of (M x N)matrix with (N x 1)kernel.
$result = mul_convMxN($lhs, $rhs)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
M | ::mlir::IntegerAttr | 32-bit signless integer attribute |
N | ::mlir::IntegerAttr | 32-bit signless integer attribute |
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.mul_elem
(::xilinx::aievec::MulElemOp)AIE-ML vector element-wise multiply
AMD-specific multiply operation that multiplies two 1-D vectors in the same channel.
The vector sizes are at least 512 bits.
$result =
$lhs * $rhs`.
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.neg
(::xilinx::aievec::NegOp)AIE vector negative
Syntax:
operation ::= `aievec.neg` $source attr-dict `:` type($result)
AMD-specific intrinsic that negates the vector and returns the result.
$result = neg(
$source`).
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
source |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.pack
(::xilinx::aievec::PackOp)AIE pack
AMD-specific pack intrinsic. Pack a vector of 16-bit values into
a vector of 8-bit values.
$result = pack($source)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
source |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.sel
(::xilinx::aievec::SelOp)AIE vector lane wise selection
Syntax:
operation ::= `aievec.sel` $lhs `,` $rhs `,` $sel attr-dict `:` type($lhs) `,` type($rhs) `,` type($sel) `,` type($result)
AMD-specific intrinsic that performs lane wise selection between two input vectors, if a bit of sel is zero, the lane of vector lhs is selected, else the lane of vector rhs is selected.
$result = sel(
$lhs, $rhs, $sel`).
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
sel |
unsigned integer |
Result | Description |
---|---|
result |
vector of any type values |
aievec.select
(::xilinx::aievec::SelectOp)AIE vector lane selection
AMD-specific vector lane selection operation. It selects between the
first set of lanes or the second one according to the value in ‘select’.
If the bit in select is 0(1), it returns the value in the first(second)
set of lanes.
$result =
select32($select, $xbuff, $xstart, $xoffsets, $ystart, $yoffsets)`
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
select | ::mlir::StringAttr | string attribute |
xstart | ::mlir::StringAttr | string attribute |
xoffsets | ::mlir::StringAttr | string attribute |
xoffsets_hi | ::mlir::StringAttr | string attribute |
xsquare | ::mlir::StringAttr | string attribute |
ystart | ::mlir::StringAttr | string attribute |
yoffsets | ::mlir::StringAttr | string attribute |
yoffsets_hi | ::mlir::StringAttr | string attribute |
ysquare | ::mlir::StringAttr | string attribute |
Operand | Description |
---|---|
xbuff |
vector of any type values |
ybuff |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.shift
(::xilinx::aievec::ShiftOp)AIE2 concat and shift
AMD-specific shift intrinsic. Concatenates two
vectors into a bigger vector, interprets them as a vector of 128 bytes
and returns v1::v2[shift: shift+64]. The verifier confirms that all the
input vectors have the same number of lanes.
$result = shift($lhs, $rhs, $shift)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
isAcc | ::mlir::BoolAttr | bool attribute |
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
shift |
32-bit signless integer |
Result | Description |
---|---|
result |
vector of any type values |
aievec.shuffle
(::xilinx::aievec::ShuffleOp)AIE2 shuffle
AMD-specific vector shuffle intrinsic by a specific shuffle mode.
$result = shuffle($source, $mode)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
mode | ::mlir::IntegerAttr | 32-bit signless integer attribute |
Operand | Description |
---|---|
source |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.srs
(::xilinx::aievec::SRSOp)AIE srs
AMD-specific shift-round-saturate intrinsic. Moves values from
accumulator data type to AIE vector data types. The adjustment in
precision is controlled by the shift parameter.
$result = srs($source, $shift)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
source |
vector of any type values |
shift |
integer |
Result | Description |
---|---|
result |
vector of any type values |
aievec.sub
(::xilinx::aievec::SubOp)AIE vector subtract
AMD-specific advanced sub operation that subtracts two 1-D vectors
with lane selection. The vector sizes are at least 256 bits.
$result =
$lhs - $rhs`.
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
xstart | ::mlir::StringAttr | string attribute |
xoffsets | ::mlir::StringAttr | string attribute |
xoffsets_hi | ::mlir::StringAttr | string attribute |
xsquare | ::mlir::StringAttr | string attribute |
zstart | ::mlir::StringAttr | string attribute |
zoffsets | ::mlir::StringAttr | string attribute |
zoffsets_hi | ::mlir::StringAttr | string attribute |
zsquare | ::mlir::StringAttr | string attribute |
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.sub_elem
(::xilinx::aievec::SubElemOp)AIE vector sub elem
Syntax:
operation ::= `aievec.sub_elem` $lhs `,` $rhs attr-dict `:` type($result)
AMD-specific aie-ml intrinsic that allows you to perform substraction operation
on all types of vectors.$result =
$lhs - $rhs`.
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
lhs |
vector of any type values |
rhs |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.unpack
(::xilinx::aievec::UnpackOp)AIE unpack
AMD-specific unpack intrinsic. Unpack a vector of 8-bit values into
a vector of 16-bit values.
$result = unpack($source)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operand | Description |
---|---|
source |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.upd
(::xilinx::aievec::UPDOp)AIE upd
AMD-specific update intrinsic. General upd intrinsic updates contiguous
lanes of the result vector from a smaller source vector. This form of
upd intrinsic combines the load of data from memory into a vector
register, and then updating the lanes of the result vector using it.
$result = upd($source[$indices], $offset, $index)
Traits: AlwaysSpeculatableImplTrait, AttrSizedOperandSegments
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
offset | ::mlir::IntegerAttr | 32-bit signless integer attribute |
index | ::mlir::IntegerAttr | 8-bit signless integer attribute whose minimum value is 0 whose maximum value is 1 |
Operand | Description |
---|---|
source |
shaped of any type values |
indices |
variadic of index |
vector |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |
aievec.ups
(::xilinx::aievec::UPSOp)AIE ups
AMD-specific upshift intrinsic. Moves data from AIE vector data type
to accumulator data type. The adjustment in precision is controlled by
the shift parameter.
$result = ups($source, $shift)
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attribute | MLIR Type | Description |
---|---|---|
shift | ::mlir::IntegerAttr | 8-bit signless integer attribute whose value is non-negative |
Operand | Description |
---|---|
source |
vector of any type values |
Result | Description |
---|---|
result |
vector of any type values |