#include "aie/Dialect/AIE/IR/AIETargetModel.h"

Inheritance diagram for xilinx::AIE::AIE1TargetModel:

Collaboration diagram for xilinx::AIE::AIE1TargetModel:

Public Member Functions
	AIE1TargetModel (TargetModelKind k)

AIEArch	getTargetArch () const override
	AIE1 TargetModel.

std::optional< TileID >	getMemWest (TileID src) const override
	Return the tile ID of the memory to the west of the given tile, if it exists.

std::optional< TileID >	getMemEast (TileID src) const override
	Return the tile ID of the memory to the east of the given tile, if it exists.

std::optional< TileID >	getMemNorth (TileID src) const override
	Return the tile ID of the memory to the north of the given tile, if it exists.

std::optional< TileID >	getMemSouth (TileID src) const override
	Return the tile ID of the memory to the south of the given tile, if it exists.

bool	isMemWest (int srcCol, int srcRow, int dstCol, int dstRow) const override
	Return true if src has a memory tile which is West of dst.

bool	isMemEast (int srcCol, int srcRow, int dstCol, int dstRow) const override
	Return true if src has a memory tile which is East of dst.

bool	isMemNorth (int srcCol, int srcRow, int dstCol, int dstRow) const override
	Return true if src has a memory tile which is North of dst.

bool	isMemSouth (int srcCol, int srcRow, int dstCol, int dstRow) const override
	Return true if src has a memory tile which is South of dst.

bool	isLegalMemAffinity (int coreCol, int coreRow, int memCol, int memRow) const override
	Return true if core can access the memory in mem.

uint32_t	getMemInternalBaseAddress (TileID src) const override
	Return the base address in the local address map for a core.

uint32_t	getMemSouthBaseAddress () const override
	Return the base address in the local address map for a core.

uint32_t	getMemWestBaseAddress () const override
	Return the base address in the local address map for a core.

uint32_t	getMemNorthBaseAddress () const override
	Return the base address in the local address map for a core.

uint32_t	getMemEastBaseAddress () const override
	Return the base address in the local address map for a core.

uint32_t	getLocalMemorySize () const override
	Return the size (in bytes) of the local data memory of a core.

uint32_t	getAccumulatorCascadeSize () const override
	Return the size (in bits) of the accumulator/cascade.

uint32_t	getNumLocks (AIETileType tileType) const override
	Return the number of lock objects for a given tile type.

uint32_t	getMaxLockValue () const override
	Return the maximum value that can be stored in a lock register.

std::optional< uint32_t >	getLocalLockAddress (uint32_t lockId, TileID tile) const override

uint32_t	getNumBDs (AIETileType tileType) const override
	Return the number of buffer descriptors for a given tile type.

bool	isBdChannelAccessible (int col, int row, uint32_t bd_id, int channel) const override
	Return true iff buffer descriptor `bd_id` on tile (`col`, `row`) can be submitted on channel `channel`.

uint64_t	getDmaBdAddress (int col, int row, uint32_t bd_id, int channel, AIE::DMAChannelDir direction) const override
	Return the array address of the dma buffer descriptor for the given col, row, buffer descriptor id, channel and direction.

uint32_t	getDmaBdAddressOffset (int col, int row) const override
	Return the offset of the base address field within the shim dma buffer descriptor.

uint32_t	getDmaControlAddress (int col, int row, int channel, AIE::DMAChannelDir direction) const override
	Return the array address of the dma task queue register for the given col, row, channel and direction.

uint32_t	getNumMemTileRows () const override

uint32_t	getMemTileSize () const override
	Return the size (in bytes) of a MemTile.

uint32_t	getNumBanks (int col, int row) const override
	Return the number of memory banks of a given tile.

uint32_t	getMaxChannelNumForAdjacentMemTile (int col, int row) const override

uint32_t	getNumDestSwitchboxConnections (int col, int row, WireBundle bundle) const override
	Return the number of destinations of connections inside a switchbox.

uint32_t	getNumSourceSwitchboxConnections (int col, int row, WireBundle bundle) const override
	Return the number of sources of connections inside a switchbox.

uint32_t	getNumDestShimMuxConnections (int col, int row, WireBundle bundle) const override
	Return the number of destinations of connections inside a shimmux.

uint32_t	getNumSourceShimMuxConnections (int col, int row, WireBundle bundle) const override
	Return the number of sources of connections inside a shimmux.

bool	isLegalTileConnection (int col, int row, WireBundle srcBundle, int srcChan, WireBundle dstBundle, int dstChan) const override

std::optional< uint32_t >	getStreamSwitchPortIndex (int col, int row, WireBundle bundle, uint32_t channel, bool master) const override
	Get stream switch port index for a given port specification Return port index for Stream_Switch_Event_Port_Selection register, or nullopt if invalid.

uint32_t	getColumnShift () const override

uint32_t	getRowShift () const override

std::vector< std::pair< uint32_t, uint32_t > >	getShimBurstEncodingsAndLengths () const override

virtual uint32_t	getNumLocks (AIETileType tileType) const=0
	Return the number of lock objects for a given tile type.

uint32_t	getNumLocks (int col, int row) const
	Return the number of lock objects for a tile at the given coordinates.

Public Member Functions inherited from xilinx::AIE::AIETargetModel
TargetModelKind	getKind () const

	AIETargetModel (TargetModelKind k)

virtual	~AIETargetModel ()

virtual uint32_t	getAddressGenGranularity () const =0
	Return the data bus width of the device.

virtual int	columns () const =0
	Return the number of columns in the device.

virtual int	rows () const =0
	Return the number of rows in the device.

virtual AIETileType	getTileType (int col, int row) const =0
	Return the tile type for the given tile coordinates.

bool	isCoreTile (int col, int row) const
	Return true if the given tile is a Core tile.

bool	isMemTile (int col, int row) const
	Return true if the given tile is a Mem tile.

bool	isShimNOCTile (int col, int row) const
	Return true if the given tile is a ShimNOC tile.

bool	isShimPLTile (int col, int row) const
	Return true if the given tile is a ShimPL tile.

bool	isShimNOCorPLTile (int col, int row) const
	Return true if the given tile is either a ShimNOC or ShimPL tile.

virtual bool	isValidTile (TileID src) const
	Return true if the given tile ID is valid.

bool	isInternal (int srcCol, int srcRow, int dstCol, int dstRow) const
	Return true if src is the internal memory of dst.

bool	isWest (int srcCol, int srcRow, int dstCol, int dstRow) const
	Return true if src is West of dst.

bool	isEast (int srcCol, int srcRow, int dstCol, int dstRow) const
	Return true if src is East of dst.

bool	isNorth (int srcCol, int srcRow, int dstCol, int dstRow) const
	Return true if src is North of dst.

bool	isSouth (int srcCol, int srcRow, int dstCol, int dstRow) const
	Return true if src is South of dst.

std::optional< uint32_t >	getLockLocalBaseIndex (int localCol, int localRow, int lockCol, int lockRow) const
	Return the lock base index (or offset) in the local tile when accessing a neighbor's lock or an empty optional if an invalid neighbor is given Takes into account differences between Memory and Core tiles.

std::optional< uint32_t >	getMemLocalBaseAddress (int localCol, int localRow, int memCol, int memRow) const
	Return the memory base address (or offset) in the local tile when accessing a neighbor's memory or an empty optional if an invalid neighbor is given Takes into account differences between Memory and Core tiles.

uint32_t	getNumLocks (int col, int row) const
	Return the number of lock objects for a tile at the given coordinates.

uint32_t	getNumBDs (int col, int row) const
	Return the number of buffer descriptors supported by the DMA in the given tile.

uint32_t	getNumBDsForChannel (int col, int row, int channel) const
	Return the number of buffer descriptors accessible on channel `channel` for the tile at (`col`, `row`).

void	validate () const

uint32_t	getModelProperties () const

void	addModelProperty (uint32_t prop)

bool	hasProperty (ModelProperty Prop) const

virtual bool	isSupportedBlockFormat (std::string const &format) const

const RegisterInfo *	lookupRegister (llvm::StringRef name, TileID tile, bool isMem=false) const
	Register Database API - provides access to register and event information for trace configuration and low-level register access.

std::optional< uint32_t >	lookupEvent (llvm::StringRef name, TileID tile, bool isMem=false) const
	Lookup event number by name and tile.

uint32_t	encodeFieldValue (const BitFieldInfo &field, uint32_t value) const
	Encode a field value with proper bit shifting.

std::optional< uint32_t >	getFieldMask (const BitFieldInfo &field) const
	Compute a 32-bit mask for a register field.

std::optional< uint32_t >	resolvePortValue (llvm::StringRef value, TileID tile, bool master) const
	Resolve stream switch port specification to port index.

Static Public Member Functions
static bool	classof (const AIETargetModel *model)

Additional Inherited Members
Public Types inherited from xilinx::AIE::AIETargetModel
enum	TargetModelKind { TK_AIE1_VC1902 , TK_AIE1_Last , TK_AIE2_VE2302 , TK_AIE2_VE2802 , TK_AIE2_NPU1_1Col , TK_AIE2_NPU1_2Col , TK_AIE2_NPU1_3Col , TK_AIE2_NPU1_4Col , TK_AIE2_NPU1_Last , TK_AIE2_NPU2 = TK_AIE2_NPU1_Last , TK_AIE2_NPU2_1Col , TK_AIE2_NPU2_2Col , TK_AIE2_NPU2_3Col , TK_AIE2_NPU2_4Col , TK_AIE2_NPU2_5Col , TK_AIE2_NPU2_6Col , TK_AIE2_NPU2_7Col , TK_AIE2_NPU2_Last , TK_AIE2_Last = TK_AIE2_NPU2_Last }

enum	ModelProperty { UsesSemaphoreLocks = 1U << 0 , IsNPU = 1U << 1 , IsVirtualized = 1U << 2 , UsesMultiDimensionalBDs = 1U << 3 }

Protected Member Functions inherited from xilinx::AIE::AIETargetModel
virtual std::unique_ptr< RegisterDatabase >	loadRegisterDatabase () const
	Subclasses override to provide architecture-specific database loading.

const RegisterDatabase *	getRegisterDatabase () const
	Get the register database, loading it lazily on first access.

Detailed Description

Definition at line 415 of file AIETargetModel.h.

Constructor & Destructor Documentation

◆ AIE1TargetModel()

xilinx::AIE::AIE1TargetModel::AIE1TargetModel ( TargetModelKind k )

inline

Definition at line 417 of file AIETargetModel.h.

Member Function Documentation

◆ classof()

static bool xilinx::AIE::AIE1TargetModel::classof ( const AIETargetModel * model )

inlinestatic

Definition at line 501 of file AIETargetModel.h.

References xilinx::AIE::AIETargetModel::getKind(), xilinx::AIE::AIETargetModel::TK_AIE1_Last, and xilinx::AIE::AIETargetModel::TK_AIE1_VC1902.

◆ getAccumulatorCascadeSize()

uint32_t xilinx::AIE::AIE1TargetModel::getAccumulatorCascadeSize ( ) const

inlineoverridevirtual

Return the size (in bits) of the accumulator/cascade.

Implements xilinx::AIE::AIETargetModel.

Definition at line 449 of file AIETargetModel.h.

◆ getColumnShift()

uint32_t xilinx::AIE::AIE1TargetModel::getColumnShift ( ) const

inlineoverridevirtual

Implements xilinx::AIE::AIETargetModel.

Definition at line 498 of file AIETargetModel.h.

Referenced by getDmaBdAddress(), and getDmaControlAddress().

◆ getDmaBdAddress()

uint64_t xilinx::AIE::AIE1TargetModel::getDmaBdAddress	(	int	col,
		int	row,
		uint32_t	bd_id,
		int	channel,
		AIE::DMAChannelDir	direction
	)		const

overridevirtual

Return the array address of the dma buffer descriptor for the given col, row, buffer descriptor id, channel and direction.

Not all architecture variants will use channel and direction so these have default values.

Implements xilinx::AIE::AIETargetModel.

Definition at line 228 of file AIETargetModel.cpp.

References xilinx::AIE::col, getColumnShift(), getRowShift(), xilinx::AIE::AIETargetModel::isCoreTile(), xilinx::AIE::AIETargetModel::isShimNOCTile(), and xilinx::AIE::row.

◆ getDmaBdAddressOffset()

uint32_t xilinx::AIE::AIE1TargetModel::getDmaBdAddressOffset	(	int	col,
		int	row
	)		const

overridevirtual

Return the offset of the base address field within the shim dma buffer descriptor.

Implements xilinx::AIE::AIETargetModel.

Definition at line 244 of file AIETargetModel.cpp.

References xilinx::AIE::col, xilinx::AIE::AIETargetModel::isCoreTile(), xilinx::AIE::AIETargetModel::isShimNOCTile(), and xilinx::AIE::row.

◆ getDmaControlAddress()

uint32_t xilinx::AIE::AIE1TargetModel::getDmaControlAddress	(	int	col,
		int	row,
		int	channel,
		AIE::DMAChannelDir	direction
	)		const

overridevirtual

Return the array address of the dma task queue register for the given col, row, channel and direction.

Implements xilinx::AIE::AIETargetModel.

Definition at line 253 of file AIETargetModel.cpp.

References xilinx::AIE::channel, xilinx::AIE::col, getColumnShift(), getRowShift(), xilinx::AIE::AIETargetModel::isCoreTile(), xilinx::AIE::AIETargetModel::isShimNOCTile(), and xilinx::AIE::row.

◆ getLocalLockAddress()

std::optional< uint32_t > xilinx::AIE::AIE1TargetModel::getLocalLockAddress	(	uint32_t	lockId,
		TileID	tile
	)		const

overridevirtual

Implements xilinx::AIE::AIETargetModel.

Definition at line 460 of file AIETargetModel.cpp.

◆ getLocalMemorySize()

uint32_t xilinx::AIE::AIE1TargetModel::getLocalMemorySize ( ) const

inlineoverridevirtual

Return the size (in bytes) of the local data memory of a core.

Implements xilinx::AIE::AIETargetModel.

Definition at line 448 of file AIETargetModel.h.

◆ getMaxChannelNumForAdjacentMemTile()

uint32_t xilinx::AIE::AIE1TargetModel::getMaxChannelNumForAdjacentMemTile	(	int	col,
		int	row
	)		const

inlineoverridevirtual

Implements xilinx::AIE::AIETargetModel.

Definition at line 477 of file AIETargetModel.h.

◆ getMaxLockValue()

uint32_t xilinx::AIE::AIE1TargetModel::getMaxLockValue ( ) const

inlineoverridevirtual

Return the maximum value that can be stored in a lock register.

Implements xilinx::AIE::AIETargetModel.

Definition at line 454 of file AIETargetModel.h.

◆ getMemEast()

std::optional< TileID > xilinx::AIE::AIE1TargetModel::getMemEast ( TileID src ) const

overridevirtual

Return the tile ID of the memory to the east of the given tile, if it exists.

Implements xilinx::AIE::AIETargetModel.

Definition at line 160 of file AIETargetModel.cpp.

References xilinx::AIE::AIETargetModel::isValidTile(), and xilinx::AIE::src.

◆ getMemEastBaseAddress()

uint32_t xilinx::AIE::AIE1TargetModel::getMemEastBaseAddress ( ) const

inlineoverridevirtual

Return the base address in the local address map for a core.

Implements xilinx::AIE::AIETargetModel.

Definition at line 447 of file AIETargetModel.h.

Referenced by getMemInternalBaseAddress().

◆ getMemInternalBaseAddress()

uint32_t xilinx::AIE::AIE1TargetModel::getMemInternalBaseAddress ( TileID src ) const

inlineoverridevirtual

Return the base address in the local address map for a core.

Implements xilinx::AIE::AIETargetModel.

Definition at line 436 of file AIETargetModel.h.

References getMemEastBaseAddress(), getMemWestBaseAddress(), and xilinx::AIE::src.

◆ getMemNorth()

std::optional< TileID > xilinx::AIE::AIE1TargetModel::getMemNorth ( TileID src ) const

overridevirtual

Return the tile ID of the memory to the north of the given tile, if it exists.

Implements xilinx::AIE::AIETargetModel.

Definition at line 173 of file AIETargetModel.cpp.

References xilinx::AIE::AIETargetModel::isValidTile(), and xilinx::AIE::src.

◆ getMemNorthBaseAddress()

uint32_t xilinx::AIE::AIE1TargetModel::getMemNorthBaseAddress ( ) const

inlineoverridevirtual

Return the base address in the local address map for a core.

Implements xilinx::AIE::AIETargetModel.

Definition at line 446 of file AIETargetModel.h.

◆ getMemSouth()

std::optional< TileID > xilinx::AIE::AIE1TargetModel::getMemSouth ( TileID src ) const

overridevirtual

Return the tile ID of the memory to the south of the given tile, if it exists.

Implements xilinx::AIE::AIETargetModel.

Definition at line 180 of file AIETargetModel.cpp.

References xilinx::AIE::AIETargetModel::isValidTile(), and xilinx::AIE::src.

◆ getMemSouthBaseAddress()

uint32_t xilinx::AIE::AIE1TargetModel::getMemSouthBaseAddress ( ) const

inlineoverridevirtual

Return the base address in the local address map for a core.

Implements xilinx::AIE::AIETargetModel.

Definition at line 444 of file AIETargetModel.h.

◆ getMemTileSize()

uint32_t xilinx::AIE::AIE1TargetModel::getMemTileSize ( ) const

inlineoverridevirtual

Return the size (in bytes) of a MemTile.

Implements xilinx::AIE::AIETargetModel.

Definition at line 474 of file AIETargetModel.h.

◆ getMemWest()

std::optional< TileID > xilinx::AIE::AIE1TargetModel::getMemWest ( TileID src ) const

overridevirtual

Return the tile ID of the memory to the west of the given tile, if it exists.

Implements xilinx::AIE::AIETargetModel.

Definition at line 147 of file AIETargetModel.cpp.

References xilinx::AIE::AIETargetModel::isValidTile(), and xilinx::AIE::src.

◆ getMemWestBaseAddress()

uint32_t xilinx::AIE::AIE1TargetModel::getMemWestBaseAddress ( ) const

inlineoverridevirtual

Return the base address in the local address map for a core.

Implements xilinx::AIE::AIETargetModel.

Definition at line 445 of file AIETargetModel.h.

Referenced by getMemInternalBaseAddress().

◆ getNumBanks()

uint32_t xilinx::AIE::AIE1TargetModel::getNumBanks	(	int	col,
		int	row
	)		const

inlineoverridevirtual

Return the number of memory banks of a given tile.

Implements xilinx::AIE::AIETargetModel.

Definition at line 475 of file AIETargetModel.h.

◆ getNumBDs()

uint32_t xilinx::AIE::AIE1TargetModel::getNumBDs ( AIETileType tileType ) const

inlineoverridevirtual

Return the number of buffer descriptors for a given tile type.

Implements xilinx::AIE::AIETargetModel.

Definition at line 457 of file AIETargetModel.h.

◆ getNumDestShimMuxConnections()

uint32_t xilinx::AIE::AIE1TargetModel::getNumDestShimMuxConnections	(	int	col,
		int	row,
		WireBundle	bundle
	)		const

overridevirtual

Return the number of destinations of connections inside a shimmux.

These are the targets of connect operations in the switchbox.

Implements xilinx::AIE::AIETargetModel.

Definition at line 387 of file AIETargetModel.cpp.

References xilinx::AIE::col, xilinx::AIE::AIETargetModel::isShimNOCorPLTile(), and xilinx::AIE::row.

◆ getNumDestSwitchboxConnections()

uint32_t xilinx::AIE::AIE1TargetModel::getNumDestSwitchboxConnections	(	int	col,
		int	row,
		WireBundle	bundle
	)		const

overridevirtual

Return the number of destinations of connections inside a switchbox.

These are the targets of connect operations in the switchbox.

Implements xilinx::AIE::AIETargetModel.

Definition at line 272 of file AIETargetModel.cpp.

References xilinx::AIE::col, xilinx::AIE::AIETargetModel::columns(), xilinx::AIE::AIETargetModel::isShimNOCTile(), xilinx::AIE::AIETargetModel::isShimPLTile(), xilinx::AIE::row, and xilinx::AIE::AIETargetModel::rows().

Referenced by isLegalTileConnection().

◆ getNumLocks() [1/3]

uint32_t xilinx::AIE::AIE1TargetModel::getNumLocks ( AIETileType tileType ) const

inlineoverridevirtual

Return the number of lock objects for a given tile type.

Implements xilinx::AIE::AIETargetModel.

Definition at line 451 of file AIETargetModel.h.

◆ getNumLocks() [2/3]

virtual uint32_t xilinx::AIE::AIETargetModel::getNumLocks ( AIETileType tileType ) const

virtual

Return the number of lock objects for a given tile type.

Implements xilinx::AIE::AIETargetModel.

◆ getNumLocks() [3/3]

uint32_t xilinx::AIE::AIETargetModel::getNumLocks	(	int	col,
		int	row
	)		const

inline

Return the number of lock objects for a tile at the given coordinates.

Definition at line 267 of file AIETargetModel.h.

◆ getNumMemTileRows()

uint32_t xilinx::AIE::AIE1TargetModel::getNumMemTileRows ( ) const

inlineoverridevirtual

Implements xilinx::AIE::AIETargetModel.

Definition at line 473 of file AIETargetModel.h.

◆ getNumSourceShimMuxConnections()

uint32_t xilinx::AIE::AIE1TargetModel::getNumSourceShimMuxConnections	(	int	col,
		int	row,
		WireBundle	bundle
	)		const

overridevirtual

Return the number of sources of connections inside a shimmux.

These are the origins of connect operations in the switchbox.

Implements xilinx::AIE::AIETargetModel.

Definition at line 405 of file AIETargetModel.cpp.

References xilinx::AIE::col, xilinx::AIE::AIETargetModel::isShimNOCorPLTile(), and xilinx::AIE::row.

◆ getNumSourceSwitchboxConnections()

uint32_t xilinx::AIE::AIE1TargetModel::getNumSourceSwitchboxConnections	(	int	col,
		int	row,
		WireBundle	bundle
	)		const

overridevirtual

Return the number of sources of connections inside a switchbox.

These are the origins of connect operations in the switchbox.

Implements xilinx::AIE::AIETargetModel.

Definition at line 328 of file AIETargetModel.cpp.

References xilinx::AIE::col, xilinx::AIE::AIETargetModel::columns(), xilinx::AIE::AIETargetModel::isShimNOCTile(), xilinx::AIE::AIETargetModel::isShimPLTile(), xilinx::AIE::row, and xilinx::AIE::AIETargetModel::rows().

Referenced by isLegalTileConnection().

◆ getRowShift()

uint32_t xilinx::AIE::AIE1TargetModel::getRowShift ( ) const

inlineoverridevirtual

Implements xilinx::AIE::AIETargetModel.

Definition at line 499 of file AIETargetModel.h.

Referenced by getDmaBdAddress(), and getDmaControlAddress().

◆ getShimBurstEncodingsAndLengths()

std::vector< std::pair< uint32_t, uint32_t > > xilinx::AIE::AIE1TargetModel::getShimBurstEncodingsAndLengths ( ) const

overridevirtual

Implements xilinx::AIE::AIETargetModel.

Definition at line 455 of file AIETargetModel.cpp.

◆ getStreamSwitchPortIndex()

std::optional< uint32_t > xilinx::AIE::AIE1TargetModel::getStreamSwitchPortIndex	(	int	col,
		int	row,
		WireBundle	bundle,
		uint32_t	channel,
		bool	master
	)		const

overridevirtual

Get stream switch port index for a given port specification Return port index for Stream_Switch_Event_Port_Selection register, or nullopt if invalid.

Implements xilinx::AIE::AIETargetModel.

Definition at line 547 of file AIETargetModel.cpp.

References xilinx::AIE::col, xilinx::AIE::AIETargetModel::isCoreTile(), xilinx::AIE::AIETargetModel::isShimNOCorPLTile(), and xilinx::AIE::row.

◆ getTargetArch()

AIEArch xilinx::AIE::AIE1TargetModel::getTargetArch ( ) const

overridevirtual

AIE1 TargetModel.

Implements xilinx::AIE::AIETargetModel.

Definition at line 144 of file AIETargetModel.cpp.

◆ isBdChannelAccessible()

bool xilinx::AIE::AIE1TargetModel::isBdChannelAccessible	(	int	col,
		int	row,
		uint32_t	bd_id,
		int	channel
	)		const

inlineoverridevirtual

Return true iff buffer descriptor bd_id on tile (col, row) can be submitted on channel channel.

Implements xilinx::AIE::AIETargetModel.

Definition at line 460 of file AIETargetModel.h.

◆ isLegalMemAffinity()

bool xilinx::AIE::AIE1TargetModel::isLegalMemAffinity	(	int	coreCol,
		int	coreRow,
		int	memCol,
		int	memRow
	)		const

overridevirtual

Return true if core can access the memory in mem.

Implements xilinx::AIE::AIETargetModel.

Definition at line 212 of file AIETargetModel.cpp.

References xilinx::AIE::AIETargetModel::isEast(), xilinx::AIE::AIETargetModel::isInternal(), xilinx::AIE::AIETargetModel::isNorth(), xilinx::AIE::AIETargetModel::isSouth(), and xilinx::AIE::AIETargetModel::isWest().

◆ isLegalTileConnection()

bool xilinx::AIE::AIE1TargetModel::isLegalTileConnection	(	int	col,
		int	row,
		WireBundle	srcBundle,
		int	srcChan,
		WireBundle	dstBundle,
		int	dstChan
	)		const

overridevirtual

Implements xilinx::AIE::AIETargetModel.

Definition at line 423 of file AIETargetModel.cpp.

References xilinx::AIE::col, getNumDestSwitchboxConnections(), getNumSourceSwitchboxConnections(), xilinx::AIE::AIETargetModel::isCoreTile(), xilinx::AIE::AIETargetModel::isMemTile(), xilinx::AIE::AIETargetModel::isShimNOCorPLTile(), and xilinx::AIE::row.

◆ isMemEast()

bool xilinx::AIE::AIE1TargetModel::isMemEast	(	int	srcCol,
		int	srcRow,
		int	dstCol,
		int	dstRow
	)		const

overridevirtual

Return true if src has a memory tile which is East of dst.

Implements xilinx::AIE::AIETargetModel.

Definition at line 195 of file AIETargetModel.cpp.

References xilinx::AIE::AIETargetModel::isEast(), and xilinx::AIE::AIETargetModel::isInternal().

◆ isMemNorth()

bool xilinx::AIE::AIE1TargetModel::isMemNorth	(	int	srcCol,
		int	srcRow,
		int	dstCol,
		int	dstRow
	)		const

overridevirtual

Return true if src has a memory tile which is North of dst.

Implements xilinx::AIE::AIETargetModel.

Definition at line 202 of file AIETargetModel.cpp.

References xilinx::AIE::AIETargetModel::isNorth().

◆ isMemSouth()

bool xilinx::AIE::AIE1TargetModel::isMemSouth	(	int	srcCol,
		int	srcRow,
		int	dstCol,
		int	dstRow
	)		const

overridevirtual

Return true if src has a memory tile which is South of dst.

Implements xilinx::AIE::AIETargetModel.

Definition at line 207 of file AIETargetModel.cpp.

References xilinx::AIE::AIETargetModel::isSouth().

◆ isMemWest()

bool xilinx::AIE::AIE1TargetModel::isMemWest	(	int	srcCol,
		int	srcRow,
		int	dstCol,
		int	dstRow
	)		const

overridevirtual

Return true if src has a memory tile which is West of dst.

Implements xilinx::AIE::AIETargetModel.

Definition at line 188 of file AIETargetModel.cpp.

References xilinx::AIE::AIETargetModel::isInternal(), and xilinx::AIE::AIETargetModel::isWest().

The documentation for this class was generated from the following files:

include/aie/Dialect/AIE/IR/AIETargetModel.h
lib/Dialect/AIE/IR/AIETargetModel.cpp

Public Member Functions

Static Public Member Functions

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ AIE1TargetModel()

Member Function Documentation

◆ classof()

◆ getAccumulatorCascadeSize()

◆ getColumnShift()

◆ getDmaBdAddress()

◆ getDmaBdAddressOffset()

◆ getDmaControlAddress()

◆ getLocalLockAddress()

◆ getLocalMemorySize()

◆ getMaxChannelNumForAdjacentMemTile()

◆ getMaxLockValue()

◆ getMemEast()

◆ getMemEastBaseAddress()

◆ getMemInternalBaseAddress()

◆ getMemNorth()

◆ getMemNorthBaseAddress()

◆ getMemSouth()

◆ getMemSouthBaseAddress()

◆ getMemTileSize()

◆ getMemWest()

◆ getMemWestBaseAddress()

◆ getNumBanks()

◆ getNumBDs()

◆ getNumDestShimMuxConnections()

◆ getNumDestSwitchboxConnections()

◆ getNumLocks() [1/3]

◆ getNumLocks() [2/3]

◆ getNumLocks() [3/3]

◆ getNumMemTileRows()

◆ getNumSourceShimMuxConnections()

◆ getNumSourceSwitchboxConnections()

◆ getRowShift()

◆ getShimBurstEncodingsAndLengths()

◆ getStreamSwitchPortIndex()

◆ getTargetArch()

◆ isBdChannelAccessible()

◆ isLegalMemAffinity()

◆ isLegalTileConnection()

◆ isMemEast()

◆ isMemNorth()

◆ isMemSouth()

◆ isMemWest()